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UFC 5 in-game (#883)
* shader: release descriptor dependencies * shader: simplify shared-exit control flow * shader: fix scalar memory loads * shader: fix LDS counter bounds * renderer: skip inactive pixel shaders * shader: respect FP32 mode in comparisons * renderer: fix sampler border colors * shader: resolve descriptors from control flow * shader: resolve descriptors before resource planning * shader: handle scalar guards for image bounds * shader: handle reduced guards for image loops * shader: fix wave guards and material indices * shader: preserve scalar buffer offset alignment and carry * shader: prove masked loop bounds across iteration transitions * shader: preserve source and IR before resource tracking failures * shader: track material keys selected from active lanes * shader: remove obsolete post-dominator analysis * shader: follow bounds guards through control-flow joins
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@@ -147,6 +147,7 @@ struct SamplerResource {
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uint32_t first_use_pc = 0;
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bool force_point_filtering = false;
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bool depth_compare = false;
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bool integer_border = false;
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bool operator==(const SamplerResource& other) const = default;
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};
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@@ -582,10 +583,11 @@ struct Program: ResourcePlan {
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CFG::FailureKind cfg_failure_kind = CFG::FailureKind::None;
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std::string fallback_reason;
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std::vector<BlockInfo> block_info;
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struct ScalarWrite { uint32_t pc; ScalarReg reg; };
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std::vector<ScalarWrite> scalar_writes;
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// Typed memory and export instructions reference shader-local metadata by dense index.
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// Decoder-only details (such as NSA register numbers) have already become IR operands.
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std::vector<ExportInfo> export_info;
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std::vector<Value> dynamic_reads;
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bool shader_info_complete = false;
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BindingLayout bindings;
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bool binding_layout_complete = false;
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