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https://github.com/KytyPS5/KytyPS5.git
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shader: compute DPP permute, rotate, mirror and share lanes with bit-field and XOR ops
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@@ -27298,6 +27298,35 @@ TestCase VectorDppRowShare(u32 wave_size) {
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return test;
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}
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// row_mirror, row_half_mirror and row_ror read lanes within the row; v1 = 100 + lane.
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TestCase VectorDppMirrorAndRotate(u32 wave_size) {
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using O = ShaderOpcode;
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TestCase test;
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test.name = wave_size == 32 ? "VectorDppMirrorAndRotateWave32" : "VectorDppMirrorAndRotateWave64";
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auto &code = test.code;
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AppendVMovU32(&code, 1, 100);
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code.push_back(EncodeVop2(0x25, 1, Vgpr(0), 1));
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for (const u32 control : {0x140u, 0x141u, 0x121u, 0x125u, 0x12fu}) {
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code.push_back(EncodeVop1(0x01, 2, 250));
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code.push_back(EncodeVop1Dpp(1, control));
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AppendStoreVgprAtLaneDwordOffset(&code, 2, 0, u32(test.expected.size()));
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for (u32 lane = 0; lane < wave_size; ++lane) {
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const u32 source = control == 0x140u ? (lane | 15u) - (lane & 15u)
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: control == 0x141u ? (lane | 7u) - (lane & 7u)
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: (lane & ~15u) | ((lane - (control & 15u)) & 15u);
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test.expected.push_back(100 + source);
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}
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}
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AppendEnd(&code);
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test.opcodes = {O::V_MOV_B32, O::V_ADD_NC_U32, O::BUFFER_STORE_DWORD, O::S_ENDPGM};
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test.compute_info.wave_size = wave_size;
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test.compute_info.threads_num[0] = wave_size;
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test.compute_info.threads_num[1] = test.compute_info.threads_num[2] = 1;
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test.compute_info.thread_ids_num = 1;
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test.has_compute_info = true;
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return test;
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}
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TestCase VectorDppBankMaskPreservesDestination() {
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using O = ShaderOpcode;
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@@ -43058,6 +43087,8 @@ std::vector<TestCase> MakeCases() {
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AddCase(VectorDppRowXmask);
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cases.push_back(VectorDppRowShare(32));
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cases.push_back(VectorDppRowShare(64));
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cases.push_back(VectorDppMirrorAndRotate(32));
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cases.push_back(VectorDppMirrorAndRotate(64));
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cases.push_back(ComputeWave64Minimum(false));
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cases.push_back(ComputeWave64Minimum(true));
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AddCase(VectorDppBankMaskPreservesDestination);
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@@ -49148,6 +49179,8 @@ int main(int argc, char **argv) {
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RunCase(&vulkan, VectorDppRowXmask());
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RunCase(&vulkan, VectorDppRowShare(32));
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RunCase(&vulkan, VectorDppRowShare(64));
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RunCase(&vulkan, VectorDppMirrorAndRotate(32));
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RunCase(&vulkan, VectorDppMirrorAndRotate(64));
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RunCase(&vulkan, VectorDppBankMaskPreservesDestination());
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RunCase(&vulkan, VectorDppBoundsControlZeroPreservesDestination());
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return 0;
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