From 0cdc5c12241fdb0f3293ede9d43c8dfda6e09317 Mon Sep 17 00:00:00 2001 From: nmzik Date: Wed, 21 Oct 2026 23:11:26 +0200 Subject: [PATCH] shader: build the V_MBCNT lanes-below mask with the shared right-mask helper --- src/graphics/shader/recompiler/frontend/translate/Integer.cpp | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/graphics/shader/recompiler/frontend/translate/Integer.cpp b/src/graphics/shader/recompiler/frontend/translate/Integer.cpp index 0a69f9e4c..fa37f84c1 100644 --- a/src/graphics/shader/recompiler/frontend/translate/Integer.cpp +++ b/src/graphics/shader/recompiler/frontend/translate/Integer.cpp @@ -327,8 +327,7 @@ void Translator::V_BCNT_U32_B32(const Decoder::Instruction& inst) { void Translator::V_MBCNT_U32_B32(const Decoder::Instruction& inst, bool low) { const auto lane = IR::U32(ir.Emit(IR::ValueOpcode::LaneId)); const auto local = ir.BitwiseAnd(lane, IR::U32(IR::Value(31u))); - const auto below = - ir.ISub(ir.ShiftLeftLogical(IR::U32(IR::Value(1u)), local), IR::U32(IR::Value(1u))); + const auto below = RightMask32(local); const auto high_lane = IR::U1(ir.Emit(IR::ValueOpcode::UGreaterThanEqual32, {lane, IR::Value(32u)})); const auto thread_mask = low ? ir.Select(high_lane, IR::U32(IR::Value(0xffffffffu)), below)