shader: took fixes from PR 427

- apply c8f34f9's ResourceTracking portability fix
- complete V_CMP_LT_U64 and S_FLBIT_I32_B32 support
- add the sceAmprCommandBufferWaitOnAddress NID from f625a47
- add decoder and compute tests for both shader operations

Co-authored-by: Mac <me@itsmemac.com>

src/graphics/shader/recompiler/frontend/decode/ScalarAluOps.cpp

@@ -45,6 +45,7 @@ constexpr OpcodeMap SOP1_OPCODE_LIST[] = {
     {0x10u, Opcode::S_BCNT1_I32_B64},
     {0x13u, Opcode::S_FF1_I32_B32},
     {0x14u, Opcode::S_FF1_I32_B64},
+    {0x15u, Opcode::S_FLBIT_I32_B32},
     {0x16u, Opcode::S_FLBIT_I32_B64},
     {0x1bu, Opcode::S_BITSET0_B32},
     {0x1du, Opcode::S_BITSET1_B32},

src/graphics/shader/recompiler/frontend/decode/ShaderDecoder.cpp

@@ -476,6 +476,7 @@ std::string InstructionToString(const Instruction& inst) {
 		case Opcode::S_ABS_I32:
 		case Opcode::S_BREV_B32:
 		case Opcode::S_BCNT1_I32_B32:
+		case Opcode::S_FLBIT_I32_B32:
 		case Opcode::S_FF1_I32_B32:
 		case Opcode::S_FF1_I32_B64:
 		case Opcode::S_NOT_B64:

src/graphics/shader/recompiler/frontend/decode/ShaderDecoder.h

@@ -45,6 +45,7 @@ enum class Opcode {
 	S_BCNT1_I32_B64,
 	S_FF1_I32_B32,
 	S_FF1_I32_B64,
+	S_FLBIT_I32_B32,
 	S_FLBIT_I32_B64,
 	S_BITREPLICATE_B64_B32,
 	S_QUADMASK_B64,
@@ -395,6 +396,7 @@ enum class Opcode {
 	V_CMP_GE_U32,
 	V_CMP_T_U32,
 	V_CMP_EQ_I64,
+	V_CMP_LT_U64,
 	V_CMP_EQ_U64,
 	V_CMP_GT_U64,
 	V_CMP_NE_U64,

src/graphics/shader/recompiler/frontend/decode/VectorAluOps.cpp

@@ -240,8 +240,9 @@ constexpr VopcOpcodeInfo VOPC_OPCODE_LIST[] = {
     {0xb5u, Opcode::V_CMPX_NE_I64, false}, {0xd1u, Opcode::V_CMPX_LT_U32},
     {0xd2u, Opcode::V_CMPX_EQ_U32},        {0xd3u, Opcode::V_CMPX_LE_U32},
     {0xd4u, Opcode::V_CMPX_GT_U32},        {0xd5u, Opcode::V_CMPX_NE_U32},
-    {0xd6u, Opcode::V_CMPX_GE_U32},        {0xe2u, Opcode::V_CMP_EQ_U64, false},
-    {0xe4u, Opcode::V_CMP_GT_U64, false},  {0xe5u, Opcode::V_CMP_NE_U64, false},
+    {0xd6u, Opcode::V_CMPX_GE_U32},        {0xe1u, Opcode::V_CMP_LT_U64, false},
+    {0xe2u, Opcode::V_CMP_EQ_U64, false},  {0xe4u, Opcode::V_CMP_GT_U64, false},
+    {0xe5u, Opcode::V_CMP_NE_U64, false},
     {0xf5u, Opcode::V_CMPX_NE_U64, false}, {0xc9u, Opcode::V_CMP_LT_F16},
     {0xcau, Opcode::V_CMP_EQ_F16},         {0xcbu, Opcode::V_CMP_LE_F16},
     {0xccu, Opcode::V_CMP_GT_F16},         {0xcdu, Opcode::V_CMP_LG_F16},