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https://github.com/KytyPS5/KytyPS5.git
synced 2026-10-20 19:07:01 +02:00
graphics: support RDNA2 dependency waits
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@@ -60,12 +60,15 @@ constexpr OpcodeMap SOPK_OPCODE_LIST[] = {
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};
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constexpr OpcodeMap SOPP_OPCODE_LIST[] = {
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{0x00u, Opcode::SNop}, {0x01u, Opcode::SEndpgm}, {0x02u, Opcode::SBranch},
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{0x04u, Opcode::SCbranchScc0}, {0x05u, Opcode::SCbranchScc1}, {0x06u, Opcode::SCbranchVccz},
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{0x07u, Opcode::SCbranchVccnz}, {0x08u, Opcode::SCbranchExecz}, {0x09u, Opcode::SCbranchExecnz},
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{0x0au, Opcode::SBarrier}, {0x0cu, Opcode::SWaitcnt}, {0x0eu, Opcode::SSleep},
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{0x10u, Opcode::SSendmsg}, {0x12u, Opcode::STrap}, {0x16u, Opcode::STtraceData},
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{0x20u, Opcode::SInstPrefetch},
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{0x00u, Opcode::SNop}, {0x01u, Opcode::SEndpgm},
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{0x02u, Opcode::SBranch}, {0x04u, Opcode::SCbranchScc0},
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{0x05u, Opcode::SCbranchScc1}, {0x06u, Opcode::SCbranchVccz},
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{0x07u, Opcode::SCbranchVccnz}, {0x08u, Opcode::SCbranchExecz},
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{0x09u, Opcode::SCbranchExecnz}, {0x0au, Opcode::SBarrier},
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{0x0cu, Opcode::SWaitcnt}, {0x0eu, Opcode::SSleep},
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{0x10u, Opcode::SSendmsg}, {0x12u, Opcode::STrap},
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{0x16u, Opcode::STtraceData}, {0x20u, Opcode::SInstPrefetch},
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{0x23u, Opcode::SWaitcntDepctr},
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};
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constexpr auto SOP1_OPS = Detail::MakeOpcodeTable<0x100>(SOP1_OPCODE_LIST);
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@@ -252,14 +255,14 @@ void DecodeSopp(uint32_t pc, std::span<const uint32_t> code, uint32_t word_index
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inst.src0.signed_val = inst.opcode == Opcode::STrap
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? static_cast<int32_t>(inst.src0.value)
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: static_cast<int32_t>(static_cast<int16_t>(simm));
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inst.src_count = (inst.opcode == Opcode::SNop || inst.opcode == Opcode::SWaitcnt ||
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inst.opcode == Opcode::SSleep || inst.opcode == Opcode::SSendmsg ||
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inst.opcode == Opcode::STrap || inst.opcode == Opcode::STtraceData ||
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inst.opcode == Opcode::SInstPrefetch)
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? 1
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: 0;
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inst.branch_offset = static_cast<int32_t>(static_cast<int16_t>(simm)) * 4;
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inst.branch_target = pc + 4u + static_cast<uint32_t>(inst.branch_offset);
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inst.src_count = (inst.opcode == Opcode::SNop || inst.opcode == Opcode::SWaitcnt ||
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inst.opcode == Opcode::SWaitcntDepctr || inst.opcode == Opcode::SSleep ||
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inst.opcode == Opcode::SSendmsg || inst.opcode == Opcode::STrap ||
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inst.opcode == Opcode::STtraceData || inst.opcode == Opcode::SInstPrefetch)
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? 1
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: 0;
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inst.branch_offset = static_cast<int32_t>(static_cast<int16_t>(simm)) * 4;
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inst.branch_target = pc + 4u + static_cast<uint32_t>(inst.branch_offset);
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SetRawWords(inst, code, word_index, 1);
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if (inst.opcode == Opcode::Unsupported) {
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@@ -944,6 +944,7 @@ std::string OpcodeToString(Opcode opcode) {
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case Opcode::VInterpMovF32: return "v_interp_mov_f32";
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case Opcode::SNop: return "s_nop";
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case Opcode::SWaitcnt: return "s_waitcnt";
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case Opcode::SWaitcntDepctr: return "s_waitcnt_depctr";
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case Opcode::SBarrier: return "s_barrier";
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case Opcode::SBranch: return "s_branch";
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case Opcode::SCbranchScc0: return "s_cbranch_scc0";
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@@ -1058,6 +1059,7 @@ std::string InstructionToString(const Instruction& inst) {
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OperandToString(inst.src1).c_str()));
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case Opcode::SNop:
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case Opcode::SWaitcnt:
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case Opcode::SWaitcntDepctr:
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case Opcode::SSleep:
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case Opcode::STrap:
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case Opcode::SSendmsg:
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@@ -531,6 +531,7 @@ enum class Opcode {
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SNop,
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SWaitcnt,
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SWaitcntDepctr,
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SBarrier,
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SBranch,
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SCbranchScc0,
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@@ -992,6 +992,7 @@ bool LowerControlInstruction(const Decoder::Instruction& decoded, BasicBlock& bl
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case Decoder::Opcode::SNop:
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return LowerControlMarker(decoded, block, Opcode::ControlNop, true, error);
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case Decoder::Opcode::SWaitcnt:
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case Decoder::Opcode::SWaitcntDepctr:
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return LowerControlMarker(decoded, block, Opcode::Waitcnt, true, error);
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case Decoder::Opcode::SBarrier:
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return LowerControlMarker(decoded, block, Opcode::Barrier, false, error);
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@@ -1075,6 +1076,7 @@ bool IsControlOpcode(Decoder::Opcode opcode) {
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switch (opcode) {
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case Decoder::Opcode::SNop:
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case Decoder::Opcode::SWaitcnt:
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case Decoder::Opcode::SWaitcntDepctr:
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case Decoder::Opcode::SBarrier:
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case Decoder::Opcode::SSendmsg:
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case Decoder::Opcode::SSetregB32:
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