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graphics: implement RDNA2 alignbyte shader opcode

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This commit is contained in:
nmzik
2026-08-15 08:44:20 +02:00
parent 30d57bed06
commit 13e87a8e58
9 changed files with 54 additions and 0 deletions
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src/graphics/shader/recompiler/frontend/decode/ShaderDecoder.cpp
+1
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@@ -618,6 +618,7 @@ std::string OpcodeToString(Opcode opcode) {
case Opcode::VBfeI32: return "v_bfe_i32";
case Opcode::VBfiB32: return "v_bfi_b32";
case Opcode::VAlignbitB32: return "v_alignbit_b32";
case Opcode::VAlignbyteB32: return "v_alignbyte_b32";
case Opcode::VMin3F32: return "v_min3_f32";
case Opcode::VMin3I32: return "v_min3_i32";
case Opcode::VMin3U32: return "v_min3_u32";
src/graphics/shader/recompiler/frontend/decode/ShaderDecoder.h
+1
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@@ -216,6 +216,7 @@ enum class Opcode {
VBfeI32,
VBfiB32,
VAlignbitB32,
VAlignbyteB32,
VMin3F32,
VMin3I32,
VMin3U32,
src/graphics/shader/recompiler/frontend/decode/VectorAluOps.cpp
+1
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@@ -272,6 +272,7 @@ constexpr OpcodeMap VOP3_OPS[] = {
{0x371u, Opcode::VAndOrB32}, {0x372u, Opcode::VOr3B32},
{0x377u, Opcode::VPermlane16B32}, {0x378u, Opcode::VPermlanex16B32},
{0x34bu, Opcode::VFmaF16}, {0x36du, Opcode::VAdd3U32},
{0x14fu, Opcode::VAlignbyteB32},
};
constexpr OpcodeMap VOP3P_OPS[] = {
src/graphics/shader/recompiler/frontend/translate/Integer.cpp
+13
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@@ -568,6 +568,19 @@ bool Translator::TranslateExtendedInteger(const IR::Instruction& inst) {
result = ir.BitwiseOr(lo_part, hi_part);
break;
}
case IR::Opcode::AlignByteU32: {
const auto hi = ReadU32(inst.src[0]);
const auto lo = ReadU32(inst.src[1]);
const auto byte_offset = mask(ReadU32(inst.src[2]), 31u);
const auto bit_offset = ir.ShiftLeftLogical(byte_offset, imm(3));
const auto concatenated = ir.PackUint2x32(lo, hi);
const auto shifted = IR::U64(ir.Emit(IR::ValueOpcode::ShiftRightLogical64,
{concatenated, mask(bit_offset, 63u)}));
const auto in_range =
IR::U1(ir.Emit(IR::ValueOpcode::ULessThan32, {byte_offset, imm(8)}));
result = ir.Select(in_range, UnpackU64(shifted)[0], imm(0));
break;
}
case IR::Opcode::ShiftLeftAddU32:
result =
ir.IAdd(ir.ShiftLeftLogical(ReadU32(inst.src[0]), mask(ReadU32(inst.src[1]), 31u)),
src/graphics/shader/recompiler/ir/opcodes/ShaderIROpcodes.cpp
+1
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@@ -151,6 +151,7 @@ constexpr LowerMap LOWER_OPS[] = {
{Decoder::Opcode::VBfeI32, Opcode::BitFieldExtract3I32},
{Decoder::Opcode::VBfiB32, Opcode::BitFieldInsertSelectU32},
{Decoder::Opcode::VAlignbitB32, Opcode::AlignBitU32},
{Decoder::Opcode::VAlignbyteB32, Opcode::AlignByteU32},
{Decoder::Opcode::VMin3F32, Opcode::FMin3F32},
{Decoder::Opcode::VMin3I32, Opcode::IMin3I32},
{Decoder::Opcode::VMin3U32, Opcode::UMin3U32},
src/graphics/shader/recompiler/ir/opcodes/ShaderIROpcodes.inc
+1
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@@ -94,6 +94,7 @@ IR_OPCODE(BitFieldInsertSelectU32, General, ExtendedInteger)
IR_OPCODE(BitCompare0B32, General, ExtendedInteger)
IR_OPCODE(BitCompare1B32, General, ExtendedInteger)
IR_OPCODE(AlignBitU32, General, ExtendedInteger)
IR_OPCODE(AlignByteU32, General, ExtendedInteger)
IR_OPCODE(ShiftLeftAddU32, General, ExtendedInteger)
IR_OPCODE(AddShiftLeftU32, General, ExtendedInteger)
IR_OPCODE(XorAddU32, General, ExtendedInteger)