mirror of
https://github.com/KytyPS5/KytyPS5.git
synced 2026-10-20 02:47:02 +02:00
Initial commit
This commit is contained in:
nmzik
@@ -0,0 +1,268 @@
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#ifndef GRAPHICS_GUEST_GPU_COMMAND_PROCESSOR_COMMAND_PROCESSOR_H
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#define GRAPHICS_GUEST_GPU_COMMAND_PROCESSOR_COMMAND_PROCESSOR_H
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#include "common/assert.h"
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#include "common/threads.h"
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#include "graphics/guest_gpu/hardwareContext.h"
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#include "graphics/host_gpu/renderer/render.h"
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#include "graphics/host_gpu/renderer/renderContext.h"
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#include <array>
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#include <cstdint>
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namespace Libs::Graphics {
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class CommandProcessorGuestAccessScope;
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inline constexpr uint32_t AcquireGcrGl2Writeback = 1u << 15u;
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bool TestWaitRegMemValue(uint64_t value, uint64_t ref, uint64_t mask, uint32_t func);
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class CommandScheduler {
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public:
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static constexpr int BuffersNum = 8;
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void SetQueue(int queue) { m_queue = queue; }
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int Queue() const { return m_queue; }
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bool Active() const { return m_current >= 0 && m_current < BuffersNum; }
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void CheckActive() const { EXIT_IF(!Active()); }
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CommandBuffer* Current() const {
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CheckActive();
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EXIT_IF(m_buffers[m_current] == nullptr);
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return m_buffers[m_current];
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}
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void Init() {
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if (m_current >= 0) {
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return;
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}
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for (auto& buf: m_buffers) {
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EXIT_IF(buf != nullptr);
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buf = new CommandBuffer(m_queue);
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}
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m_current = 0;
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Current()->Begin();
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}
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void Flush() {
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SubmitCurrent();
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BeginNext();
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}
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CommandBuffer* FlushAndGetSubmitted() {
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auto* submitted = SubmitCurrent();
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BeginNext();
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return submitted;
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}
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void CopyBuffers(std::array<CommandBuffer*, BuffersNum>* out) const {
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EXIT_IF(out == nullptr);
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for (int i = 0; i < BuffersNum; i++) {
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auto* buf = m_buffers[i];
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EXIT_IF(buf == nullptr);
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(*out)[i] = buf;
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}
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}
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void WaitAll() {
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for (auto* buf: m_buffers) {
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EXIT_IF(buf == nullptr);
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buf->WaitForFenceAndReset();
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}
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}
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private:
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CommandBuffer* SubmitCurrent() {
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auto* submitted = Current();
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submitted->End();
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submitted->Execute();
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return submitted;
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}
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void BeginNext() {
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m_current = (m_current + 1) % BuffersNum;
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Current()->WaitForFenceAndReset();
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Current()->Begin();
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}
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CommandBuffer* m_buffers[BuffersNum] = {};
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int m_current = -1;
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int m_queue = -1;
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};
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class CommandProcessor {
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public:
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struct FlipInfo {
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int handle = 0;
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int index = 0;
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int flip_mode = 0;
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int64_t flip_arg = 0;
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};
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CommandProcessor() = default;
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~CommandProcessor() { KYTY_NOT_IMPLEMENTED; }
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KYTY_CLASS_NO_COPY(CommandProcessor);
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void Reset();
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void BufferInit();
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void BufferFlush();
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void BufferFlushAndWait();
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void BufferWait();
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[[nodiscard]] int BeginReadbackTransaction(bool mutex_preowned) {
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if (!mutex_preowned) {
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m_mutex.Lock();
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}
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m_scheduler.Flush();
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m_scheduler.WaitAll();
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return m_scheduler.Queue();
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}
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void EndReadbackTransaction(bool mutex_preowned) {
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if (!mutex_preowned) {
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m_mutex.Unlock();
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}
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}
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void RunLock() { m_run_mutex.Lock(); }
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void RunUnlock() { m_run_mutex.Unlock(); }
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HW::Context* GetCtx() { return &m_ctx; }
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HW::UserConfig* GetUcfg() { return &m_ucfg; }
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HW::Shader* GetShCtx() { return &m_sh_ctx; }
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void SetIndexType(uint32_t index_type_and_size);
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void SetIndexBaseAddress(uint64_t index_base_addr);
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void SetIndexBufferSize(uint32_t index_buffer_size);
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void SetDrawIndirectArgsBaseAddress(uint64_t draw_indirect_args_base_addr);
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void SetDispatchIndirectArgsBaseAddress(uint64_t dispatch_indirect_args_base_addr);
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void SetNumInstances(uint32_t num_instances);
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void DrawIndex(uint32_t index_count, const void* index_addr, uint32_t flags, uint32_t type,
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uint32_t instance_count = 0, const void* object_ids = nullptr,
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uint32_t render_target_slice_offset = 0, int32_t vertex_offset_add = 0,
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uint32_t first_instance = 0);
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void DrawIndexOffset(uint32_t index_offset, uint32_t index_count, uint32_t flags);
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void DrawIndexAuto(uint32_t index_count, uint32_t flags,
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uint32_t render_target_slice_offset = 0, uint32_t instance_count = 1,
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uint32_t first_vertex = 0, uint32_t first_instance = 0);
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void DrawIndirect(uint32_t data_offset, uint32_t draw_initiator, bool indexed);
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void DrawIndirectMulti(uint32_t data_offset, uint32_t max_count_or_count,
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const volatile uint32_t* count_addr, uint32_t stride_in_bytes,
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uint32_t draw_initiator, bool indexed);
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void WriteAtEndOfPipe32(uint32_t cache_policy, uint32_t event_write_dest,
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uint32_t eop_event_type, uint32_t cache_action, uint32_t event_index,
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uint32_t event_write_source, void* dst_gpu_addr, uint32_t value,
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uint32_t interrupt_selector, uint32_t interrupt_context_id = 0);
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void WriteAtEndOfPipe64(uint32_t cache_policy, uint32_t event_write_dest,
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uint32_t eop_event_type, uint32_t cache_action, uint32_t event_index,
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uint32_t event_write_source, void* dst_gpu_addr, uint64_t value,
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uint32_t interrupt_selector, uint32_t interrupt_context_id = 0);
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void Flip();
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void Flip(void* dst_gpu_addr, uint32_t value);
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void FlipWithInterrupt(uint32_t eop_event_type, uint32_t cache_action, void* dst_gpu_addr,
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uint32_t value);
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void SynchronizeGpu();
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void SynchronizeGpuRange(uint64_t vaddr, uint64_t size);
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void MemoryBarrier();
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void TriggerEopEventAtEndOfPipe(uint32_t interrupt_context_id);
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void RenderTextureBarrier(uint64_t vaddr, uint64_t size);
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void DepthStencilBarrier(uint64_t vaddr, uint64_t size);
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void DispatchDirect(uint32_t thread_group_x, uint32_t thread_group_y, uint32_t thread_group_z,
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uint32_t mode);
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void DispatchIndirect(uint32_t data_offset, uint32_t mode);
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void WaitFlipDone(uint32_t video_out_handle, uint32_t display_buffer_index);
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void TriggerEvent(uint32_t event_type, uint32_t event_index);
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void SetUserDataMarker(HW::UserSgprType type) { m_user_data_marker = type; }
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[[nodiscard]] HW::UserSgprType GetUserDataMarker() const { return m_user_data_marker; }
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void SetEmbeddedDataMarker(const uint32_t* buffer, uint32_t num_dw, uint32_t align) {}
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void PushMarker(const char* str) {}
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void PopMarker() {}
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void PrefetchL2(void* addr, uint32_t size) {}
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void ClearGds(uint64_t dw_offset, uint32_t dw_num, uint32_t clear_value);
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void ReadGds(uint32_t* dst, uint32_t dw_offset, uint32_t dw_size);
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void ResetDeCe();
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void WaitCe();
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void WaitDeDiff(uint32_t diff);
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void IncremenetDe();
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void IncremenetCe();
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void WriteConstRam(uint32_t offset, const uint32_t* src, uint32_t dw_num);
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void DumpConstRam(uint32_t* dst, uint32_t offset, uint32_t dw_num);
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template <typename T>
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void WaitRegMem(uint32_t func, const T* addr, T ref, T mask, uint32_t poll, uint32_t wait_op);
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void WriteData(uint32_t* dst, const uint32_t* src, uint32_t dw_num, uint32_t write_control);
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void DmaData(uint8_t engine, uint8_t dst_sel, uint8_t dst_cache_policy,
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uint64_t dst_address_or_offset, uint8_t src_sel, uint8_t src_cache_policy,
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uint64_t src_address_or_offset_or_immediate, uint32_t num_bytes,
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uint8_t wait_for_previous, uint8_t write_confirm, uint8_t block_engine);
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void SetPredication(uint32_t condition, uint32_t op, uint32_t wait_op,
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const volatile void* address, uint32_t count_in_dwords);
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[[nodiscard]] bool ShouldSkipPredicatedPackets() const { return m_predicate_skip; }
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void Run(uint32_t* data, uint32_t num_dw);
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void SetQueue(int queue) { m_scheduler.SetQueue(queue); }
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[[nodiscard]] int GetQueue() const { return m_scheduler.Queue(); }
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[[nodiscard]] const FlipInfo& GetFlip() const { return m_flip; }
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void SetFlip(const FlipInfo& flip) { m_flip = flip; }
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[[nodiscard]] uint64_t GetSubmitId() const { return m_submit_id; }
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void SetSubmitId(uint64_t submit_id) { m_submit_id = submit_id; }
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private:
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friend class CommandProcessorGuestAccessScope;
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struct Counter {
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Common::Mutex mutex;
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Common::CondVar cond_var;
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uint32_t value = 0;
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};
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template <typename T>
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void WriteAtEndOfPipe(uint32_t cache_policy, uint32_t event_write_dest, uint32_t eop_event_type,
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uint32_t cache_action, uint32_t event_index, uint32_t event_write_source,
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void* dst_gpu_addr, T value, uint32_t interrupt_selector,
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uint32_t interrupt_context_id);
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CommandBuffer* CurrentBuffer() { return m_scheduler.Current(); }
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void CheckBuffer() const { m_scheduler.CheckActive(); }
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GpuResourceManager* GetGpuResources() const {
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EXIT_IF(g_render_ctx == nullptr);
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return g_render_ctx->GetGpuResources();
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}
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HW::Context m_ctx;
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HW::UserConfig m_ucfg;
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HW::Shader m_sh_ctx;
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HW::UserSgprType m_user_data_marker = HW::UserSgprType::Unknown;
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uint32_t m_index_type_and_size = 0;
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uint32_t m_index_buffer_size = 0;
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uint64_t m_index_base_addr = 0;
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uint64_t m_draw_indirect_args_base_addr = 0;
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uint64_t m_dispatch_indirect_args_base_addr = 0;
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uint32_t m_num_instances = 1;
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Common::Mutex m_mutex;
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Common::Mutex m_run_mutex;
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CommandScheduler m_scheduler;
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Counter m_de_counter;
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Counter m_ce_counter;
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uint32_t m_const_ram[0x3000] = {0};
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FlipInfo m_flip;
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uint64_t m_submit_id = 0;
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bool m_predicate_skip = false;
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};
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} // namespace Libs::Graphics
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#endif // GRAPHICS_GUEST_GPU_COMMAND_PROCESSOR_COMMAND_PROCESSOR_H
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@@ -0,0 +1,260 @@
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#include "graphics/guest_gpu/command_processor/pm4Dispatch.h"
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namespace Libs::Graphics {
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hw_ctx_parser_func_t g_hw_ctx_func[Pm4::CX_NUM] = {};
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hw_ctx_indirect_func_t g_hw_ctx_indirect_func[Pm4::CX_NUM] = {};
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hw_sh_parser_func_t g_hw_sh_func[Pm4::SH_NUM] = {};
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hw_sh_indirect_func_t g_hw_sh_indirect_func[Pm4::SH_NUM] = {};
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hw_uc_parser_func_t g_hw_uc_func[Pm4::UC_NUM] = {};
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hw_uc_indirect_func_t g_hw_uc_indirect_func[Pm4::UC_NUM] = {};
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cp_op_parser_func_t g_cp_op_func[256] = {};
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cp_op_parser_func_t g_cp_op_custom_func[Pm4::R_NUM] = {};
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void GraphicsInitJmpTables() {
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for (auto& func: g_hw_ctx_func) {
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func = nullptr;
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}
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g_hw_ctx_func[Pm4::DB_RENDER_CONTROL] = HwCtxSetRenderControl;
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g_hw_ctx_func[Pm4::DB_COUNT_CONTROL] = HwCtxSetDepthMetadataRegisters;
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g_hw_ctx_func[Pm4::DB_RENDER_OVERRIDE] = HwCtxSetDepthMetadataRegisters;
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g_hw_ctx_func[Pm4::DB_RENDER_OVERRIDE2] = HwCtxSetDepthMetadataRegisters;
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g_hw_ctx_func[Pm4::DB_DFSM_CONTROL] = HwCtxSetDepthMetadataRegisters;
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g_hw_ctx_func[Pm4::DB_RMI_L2_CACHE_CONTROL] = HwCtxSetDepthMetadataRegisters;
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g_hw_ctx_func[Pm4::CB_RMI_GL2_CACHE_CONTROL] = HwCtxSetDepthMetadataRegisters;
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g_hw_ctx_func[Pm4::TA_BC_BASE_ADDR] = HwCtxSetBorderColorTableAddr;
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g_hw_ctx_func[Pm4::TA_BC_BASE_ADDR_HI] = HwCtxSetBorderColorTableAddr;
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g_hw_ctx_func[Pm4::DB_STENCIL_CLEAR] = HwCtxSetStencilClear;
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g_hw_ctx_func[Pm4::DB_DEPTH_CLEAR] = HwCtxSetDepthClear;
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g_hw_ctx_func[Pm4::PA_SC_SCREEN_SCISSOR_TL] = HwCtxSetScreenScissor;
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g_hw_ctx_func[Pm4::DB_Z_INFO] = HwCtxSetDepthRenderTarget;
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g_hw_ctx_func[Pm4::DB_STENCIL_INFO] = HwCtxSetStencilInfo;
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g_hw_ctx_func[Pm4::DB_HTILE_SURFACE] = HwCtxSetDepthHtileSurface;
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g_hw_ctx_func[Pm4::PA_SU_HARDWARE_SCREEN_OFFSET] = HwCtxSetHardwareScreenOffset;
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g_hw_ctx_func[Pm4::PA_SC_WINDOW_OFFSET] = HwCtxSetWindowOffset;
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g_hw_ctx_func[Pm4::PA_SC_WINDOW_SCISSOR_TL] = HwCtxSetWindowScissor;
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for (auto cmd_offset = Pm4::PA_SC_CLIPRECT_RULE; cmd_offset < Pm4::PA_SC_CLIPRECT_0_TL + 8u;
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cmd_offset++) {
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g_hw_ctx_func[cmd_offset] = HwCtxSetClipRect;
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}
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g_hw_ctx_func[Pm4::CB_TARGET_MASK] = HwCtxSetRenderTargetMask;
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g_hw_ctx_func[Pm4::PA_SC_GENERIC_SCISSOR_TL] = HwCtxSetGenericScissor;
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g_hw_ctx_func[Pm4::CB_BLEND_RED] = HwCtxSetBlendColor;
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g_hw_ctx_func[Pm4::CB_DCC_CONTROL] = HwCtxSetCbDccControl;
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g_hw_ctx_func[Pm4::DB_STENCIL_CONTROL] = HwCtxSetStencilControl;
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g_hw_ctx_func[Pm4::DB_STENCILREFMASK] = HwCtxSetStencilMask;
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g_hw_ctx_func[Pm4::SPI_PS_INPUT_CNTL_0] = HwCtxSetPsInput;
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g_hw_ctx_func[Pm4::SPI_TMPRING_SIZE] = HwCtxSetSpiTmpringSize;
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g_hw_ctx_func[Pm4::DB_DEPTH_CONTROL] = HwCtxSetDepthControl;
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g_hw_ctx_func[Pm4::DB_EQAA] = HwCtxSetEqaaControl;
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g_hw_ctx_func[Pm4::CB_COLOR_CONTROL] = HwCtxSetColorControl;
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g_hw_ctx_func[Pm4::DB_DEPTH_BOUNDS_MIN] = HwCtxSetDepthBounds;
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g_hw_ctx_func[Pm4::DB_DEPTH_BOUNDS_MAX] = HwCtxSetDepthBounds;
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g_hw_ctx_func[Pm4::PA_SU_POINT_SIZE] = HwCtxSetPointState;
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g_hw_ctx_func[Pm4::PA_SU_POINT_MINMAX] = HwCtxSetPointState;
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g_hw_ctx_func[Pm4::PA_CL_CLIP_CNTL] = HwCtxSetClipControl;
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g_hw_ctx_func[Pm4::PA_SU_SC_MODE_CNTL] = HwCtxSetModeControl;
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g_hw_ctx_func[Pm4::PA_SU_POLY_OFFSET_DB_FMT_CNTL] = HwCtxSetPolyOffsetRegisters;
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g_hw_ctx_func[Pm4::PA_SU_POLY_OFFSET_CLAMP] = HwCtxSetPolyOffsetRegisters;
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g_hw_ctx_func[Pm4::PA_SU_POLY_OFFSET_FRONT_SCALE] = HwCtxSetPolyOffsetRegisters;
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g_hw_ctx_func[Pm4::PA_SU_POLY_OFFSET_FRONT_OFFSET] = HwCtxSetPolyOffsetRegisters;
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g_hw_ctx_func[Pm4::PA_SU_POLY_OFFSET_BACK_SCALE] = HwCtxSetPolyOffsetRegisters;
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g_hw_ctx_func[Pm4::PA_SU_POLY_OFFSET_BACK_OFFSET] = HwCtxSetPolyOffsetRegisters;
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g_hw_ctx_func[Pm4::PA_CL_VTE_CNTL] = HwCtxSetViewportTransformControl;
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g_hw_ctx_func[Pm4::PA_SU_LINE_CNTL] = HwCtxSetLineControl;
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g_hw_ctx_func[Pm4::PA_SC_FOV_WINDOW_LR] = HwCtxSetFovWindow;
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g_hw_ctx_func[Pm4::PA_SC_FOV_WINDOW_TB] = HwCtxSetFovWindow;
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g_hw_ctx_func[Pm4::PA_SC_MODE_CNTL_0] = HwCtxSetScanModeControl;
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g_hw_ctx_func[Pm4::PA_SC_MODE_CNTL_1] = HwCtxSetScanModeControl1;
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g_hw_ctx_func[Pm4::PA_SC_AA_CONFIG] = HwCtxSetAaConfig;
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for (auto cmd_offset = Pm4::PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0;
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cmd_offset < Pm4::PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 + 16; cmd_offset++) {
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g_hw_ctx_func[cmd_offset] = HwCtxSetAaSampleControl;
|
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}
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g_hw_ctx_func[Pm4::PA_SC_CENTROID_PRIORITY_0] = HwCtxSetCentroidPriority;
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g_hw_ctx_func[Pm4::PA_SC_CENTROID_PRIORITY_1] = HwCtxSetCentroidPriority;
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g_hw_ctx_func[Pm4::PA_SC_AA_MASK_X0Y0_X1Y0] = HwCtxSetAaMask;
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g_hw_ctx_func[Pm4::PA_SC_AA_MASK_X0Y1_X1Y1] = HwCtxSetAaMask;
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g_hw_ctx_func[Pm4::PA_SU_VTX_CNTL] = HwCtxSetVtxControl;
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||||
g_hw_ctx_func[Pm4::PS_SHADER_SAMPLE_EXCLUSION_MASK] = HwCtxSetAaMask;
|
||||
g_hw_ctx_func[Pm4::PA_SC_BINNER_CNTL_0] = HwCtxSetPaScExtendedControl;
|
||||
g_hw_ctx_func[Pm4::PA_SC_BINNER_CNTL_1] = HwCtxSetPaScExtendedControl;
|
||||
g_hw_ctx_func[Pm4::PA_SC_CONSERVATIVE_RASTERIZATION_CNTL] = HwCtxSetPaScExtendedControl;
|
||||
g_hw_ctx_func[Pm4::PA_SC_NGG_MODE_CNTL] = HwCtxSetPaScExtendedControl;
|
||||
g_hw_ctx_func[Pm4::DB_ALPHA_TO_MASK] = HwCtxSetAlphaToMask;
|
||||
g_hw_ctx_func[Pm4::VGT_DRAW_PAYLOAD_CNTL] = HwCtxSetDrawPayloadControl;
|
||||
g_hw_ctx_func[Pm4::VGT_PRIMITIVEID_RESET] = HwCtxSetPrimitiveIdReset;
|
||||
g_hw_ctx_func[Pm4::PA_CL_OBJPRIM_ID_CNTL] = HwCtxSetObjprimIdControl;
|
||||
g_hw_ctx_func[Pm4::VGT_SHADER_STAGES_EN] = HwCtxSetShaderStages;
|
||||
g_hw_ctx_func[Pm4::PA_CL_GB_VERT_CLIP_ADJ] = HwCtxSetGuardBands;
|
||||
|
||||
for (uint32_t slot = 0; slot < 8; slot++) {
|
||||
g_hw_ctx_func[Pm4::CB_COLOR0_BASE + slot * 15] = HwCtxSetRenderTarget;
|
||||
g_hw_ctx_func[Pm4::CB_COLOR0_INFO + slot * 15] = HwCtxSetColorInfo;
|
||||
|
||||
g_hw_ctx_func[Pm4::CB_BLEND0_CONTROL + slot * 1] = HwCtxSetBlendControl;
|
||||
}
|
||||
|
||||
for (uint32_t viewport = 0; viewport < 16; viewport++) {
|
||||
g_hw_ctx_func[Pm4::PA_SC_VPORT_SCISSOR_0_TL + viewport * 2] = HwCtxSetViewportScissor;
|
||||
g_hw_ctx_func[Pm4::PA_SC_VPORT_SCISSOR_0_BR + viewport * 2] = HwCtxSetViewportScissor;
|
||||
g_hw_ctx_func[Pm4::PA_SC_VPORT_ZMIN_0 + viewport * 2] = HwCtxSetViewportZ;
|
||||
g_hw_ctx_func[Pm4::PA_SC_VPORT_ZMAX_0 + viewport * 2] = HwCtxSetViewportZ;
|
||||
for (uint32_t field = 0; field < 6; field++) {
|
||||
g_hw_ctx_func[Pm4::PA_CL_VPORT_XSCALE + viewport * 6 + field] =
|
||||
HwCtxSetViewportScaleOffset;
|
||||
}
|
||||
}
|
||||
|
||||
for (auto& func: g_hw_sh_func) {
|
||||
func = nullptr;
|
||||
}
|
||||
|
||||
for (uint32_t slot = 0; slot < 32; slot++) {
|
||||
g_hw_sh_func[Pm4::SPI_SHADER_USER_DATA_PS_0 + slot * 1] = HwShSetPsUserSgpr;
|
||||
g_hw_sh_func[Pm4::SPI_SHADER_USER_DATA_GS_0 + slot * 1] = HwShSetGsUserSgpr;
|
||||
g_hw_sh_func[Pm4::SPI_SHADER_USER_DATA_HS_0 + slot * 1] = HwShSetHsUserSgpr;
|
||||
}
|
||||
for (uint32_t slot = 0; slot < 16; slot++) {
|
||||
g_hw_sh_func[Pm4::COMPUTE_USER_DATA_0 + slot * 1] = HwShSetCsUserSgpr;
|
||||
}
|
||||
|
||||
for (uint32_t slot = 0; slot < 4; slot++) {
|
||||
g_hw_sh_func[Pm4::SPI_SHADER_USER_ACCUM_PS_0 + slot] = HwShSetPsUserAccumSgpr;
|
||||
}
|
||||
|
||||
for (uint32_t slot = 0; slot < 4; slot++) {
|
||||
g_hw_sh_func[Pm4::SPI_SHADER_USER_ACCUM_ESGS_0 + slot] = HwShSetGsUserAccumSgpr;
|
||||
}
|
||||
for (uint32_t slot = 0; slot < 4; slot++) {
|
||||
g_hw_sh_func[Pm4::SPI_SHADER_USER_ACCUM_LSHS_0 + slot] = HwShSetHsUserAccumSgpr;
|
||||
}
|
||||
|
||||
for (uint32_t slot = 0; Pm4::COMPUTE_USER_ACCUM_0 + slot < Pm4::COMPUTE_USER_DATA_0; slot++) {
|
||||
g_hw_sh_func[Pm4::COMPUTE_USER_ACCUM_0 + slot] = HwShSetCsUserAccumSgpr;
|
||||
}
|
||||
g_hw_sh_func[Pm4::COMPUTE_PGM_LO] = HwShSetCsRegisters;
|
||||
g_hw_sh_func[Pm4::COMPUTE_PGM_HI] = HwShSetCsRegisters;
|
||||
g_hw_sh_func[Pm4::COMPUTE_TBA_LO] = HwShSetCsRegisters;
|
||||
g_hw_sh_func[Pm4::COMPUTE_TBA_HI] = HwShSetCsRegisters;
|
||||
g_hw_sh_func[Pm4::COMPUTE_TMA_LO] = HwShSetCsRegisters;
|
||||
g_hw_sh_func[Pm4::COMPUTE_TMA_HI] = HwShSetCsRegisters;
|
||||
g_hw_sh_func[Pm4::COMPUTE_PGM_RSRC1] = HwShSetCsRegisters;
|
||||
g_hw_sh_func[Pm4::COMPUTE_PGM_RSRC2] = HwShSetCsRegisters;
|
||||
g_hw_sh_func[Pm4::COMPUTE_START_X] = HwShSetCsRegisters;
|
||||
g_hw_sh_func[Pm4::COMPUTE_START_Y] = HwShSetCsRegisters;
|
||||
g_hw_sh_func[Pm4::COMPUTE_START_Z] = HwShSetCsRegisters;
|
||||
g_hw_sh_func[Pm4::COMPUTE_NUM_THREAD_X] = HwShSetCsRegisters;
|
||||
g_hw_sh_func[Pm4::COMPUTE_NUM_THREAD_Y] = HwShSetCsRegisters;
|
||||
g_hw_sh_func[Pm4::COMPUTE_NUM_THREAD_Z] = HwShSetCsRegisters;
|
||||
g_hw_sh_func[Pm4::COMPUTE_RESOURCE_LIMITS] = HwShSetCsRegisters;
|
||||
g_hw_sh_func[Pm4::COMPUTE_DESTINATION_EN_SE0] = HwShSetCsRegisters;
|
||||
g_hw_sh_func[Pm4::COMPUTE_DESTINATION_EN_SE1] = HwShSetCsRegisters;
|
||||
g_hw_sh_func[Pm4::COMPUTE_TMPRING_SIZE] = HwShSetCsRegisters;
|
||||
g_hw_sh_func[Pm4::COMPUTE_DESTINATION_EN_SE2] = HwShSetCsRegisters;
|
||||
g_hw_sh_func[Pm4::COMPUTE_DESTINATION_EN_SE3] = HwShSetCsRegisters;
|
||||
g_hw_sh_func[Pm4::COMPUTE_PGM_RSRC3] = HwShSetCsRegisters;
|
||||
g_hw_sh_func[Pm4::COMPUTE_SHADER_CHKSUM] = HwShSetCsRegisters;
|
||||
g_hw_sh_func[Pm4::COMPUTE_DISPATCH_TUNNEL] = HwShSetCsRegisters;
|
||||
g_hw_sh_func[Pm4::SPI_SHADER_TBA_LO_PS] = HwShIgnoreRegisters;
|
||||
g_hw_sh_func[Pm4::SPI_SHADER_PGM_RSRC3_PS] = HwShIgnoreRegisters;
|
||||
g_hw_sh_func[Pm4::SPI_SHADER_PGM_RSRC4_PS] = HwShIgnoreRegisters;
|
||||
g_hw_sh_func[Pm4::SPI_SHADER_TMA_LO_PS] = HwShIgnoreRegisters;
|
||||
g_hw_sh_func[Pm4::SPI_SHADER_TMA_HI_PS] = HwShIgnoreRegisters;
|
||||
g_hw_sh_func[Pm4::SPI_SHADER_REQ_CTRL_PS] = HwShIgnoreRegisters;
|
||||
g_hw_sh_func[Pm4::SPI_SHADER_PGM_RSRC3_GS] = HwShIgnoreRegisters;
|
||||
g_hw_sh_func[Pm4::SPI_SHADER_PGM_RSRC4_GS] = HwShIgnoreRegisters;
|
||||
g_hw_sh_func[Pm4::SPI_SHADER_USER_DATA_ADDR_LO_GS] = HwShIgnoreRegisters;
|
||||
g_hw_sh_func[Pm4::SPI_SHADER_USER_DATA_ADDR_HI_GS] = HwShIgnoreRegisters;
|
||||
g_hw_sh_func[Pm4::SPI_SHADER_REQ_CTRL_ESGS] = HwShIgnoreRegisters;
|
||||
g_hw_sh_func[Pm4::SPI_SHADER_PGM_RSRC3_HS] = HwShIgnoreRegisters;
|
||||
g_hw_sh_func[Pm4::SPI_SHADER_PGM_RSRC4_HS] = HwShIgnoreRegisters;
|
||||
g_hw_sh_func[Pm4::SPI_SHADER_USER_DATA_ADDR_LO_HS] = HwShIgnoreRegisters;
|
||||
g_hw_sh_func[Pm4::SPI_SHADER_USER_DATA_ADDR_HI_HS] = HwShIgnoreRegisters;
|
||||
g_hw_sh_func[Pm4::SPI_SHADER_REQ_CTRL_LSHS] = HwShIgnoreRegisters;
|
||||
|
||||
for (auto& func: g_hw_uc_func) {
|
||||
func = nullptr;
|
||||
}
|
||||
|
||||
g_hw_uc_func[Pm4::VGT_PRIMITIVE_TYPE] = HwUcSetPrimitiveType;
|
||||
g_hw_uc_func[Pm4::VGT_INDEX_TYPE] = HwUcSetIndexType;
|
||||
g_hw_uc_func[Pm4::VGT_OBJECT_ID] = HwUcSetObjectId;
|
||||
g_hw_uc_func[Pm4::TEXTURE_GRADIENT_FACTORS] = HwUcSetTextureGradientFactors;
|
||||
g_hw_uc_func[Pm4::IA_MULTI_VGT_PARAM] = HwUcSetIaMultiVgtParam;
|
||||
g_hw_uc_func[Pm4::GE_MULTI_PRIM_IB_RESET_EN] = HwUcSetMultiPrimIbReset;
|
||||
g_hw_uc_func[Pm4::TA_CS_BC_BASE_ADDR] = HwUcSetBorderColorTableAddr;
|
||||
g_hw_uc_func[Pm4::TA_CS_BC_BASE_ADDR_HI] = HwUcSetBorderColorTableAddr;
|
||||
g_hw_uc_func[Pm4::GE_INDX_OFFSET] = HwUcSetGeIndexOffset;
|
||||
g_hw_uc_func[Pm4::GDS_OA_CNTL] = HwUcSetGdsOaRegisters;
|
||||
g_hw_uc_func[Pm4::GDS_OA_COUNTER] = HwUcSetGdsOaRegisters;
|
||||
g_hw_uc_func[Pm4::GDS_OA_ADDRESS] = HwUcSetGdsOaRegisters;
|
||||
|
||||
for (auto& func: g_cp_op_func) {
|
||||
func = nullptr;
|
||||
}
|
||||
|
||||
g_cp_op_func[Pm4::IT_NOP] = CpOpNop;
|
||||
g_cp_op_func[Pm4::IT_SET_BASE] = CpOpSetBase;
|
||||
g_cp_op_func[Pm4::IT_CLEAR_STATE] = CpOpClearState;
|
||||
g_cp_op_func[Pm4::IT_INDEX_BASE] = CpOpIndexBase;
|
||||
g_cp_op_func[Pm4::IT_INDEX_BUFFER_SIZE] = CpOpIndexBufferSize;
|
||||
g_cp_op_func[Pm4::IT_DISPATCH_DIRECT] = CpOpDispatchDirect;
|
||||
g_cp_op_func[Pm4::IT_DISPATCH_INDIRECT] = CpOpDispatchIndirect;
|
||||
g_cp_op_func[Pm4::IT_DRAW_INDIRECT] = CpOpDrawIndirect;
|
||||
g_cp_op_func[Pm4::IT_DRAW_INDEX_INDIRECT] = CpOpDrawIndirect;
|
||||
g_cp_op_func[Pm4::IT_DRAW_INDIRECT_MULTI] = CpOpDrawIndirectMulti;
|
||||
g_cp_op_func[Pm4::IT_DRAW_INDEX_INDIRECT_MULTI] = CpOpDrawIndirectMulti;
|
||||
g_cp_op_func[Pm4::IT_DRAW_INDEX_2] = CpOpDrawIndex;
|
||||
g_cp_op_func[Pm4::IT_DRAW_INDEX_OFFSET_2] = CpOpDrawIndexOffset;
|
||||
g_cp_op_func[Pm4::IT_DISPATCH_DRAW_PREAMBLE] = CpOpDrawIndex;
|
||||
g_cp_op_func[Pm4::IT_PFP_SYNC_ME] = CpOpPfpSyncMe;
|
||||
g_cp_op_func[Pm4::IT_INDEX_TYPE] = CpOpIndexType;
|
||||
g_cp_op_func[Pm4::IT_NUM_INSTANCES] = CpOpNumInstances;
|
||||
g_cp_op_func[Pm4::IT_DRAW_INDEX_AUTO] = CpOpDrawIndexAuto;
|
||||
g_cp_op_func[Pm4::IT_COND_EXEC] = CpOpCondExec;
|
||||
g_cp_op_func[Pm4::IT_SET_PREDICATION] = CpOpSetPredication;
|
||||
g_cp_op_func[Pm4::IT_WRITE_DATA] = CpOpWriteData;
|
||||
g_cp_op_func[Pm4::IT_INDIRECT_BUFFER] = CpOpIndirectBuffer;
|
||||
g_cp_op_func[Pm4::IT_COPY_DATA] = CpOpCopyData;
|
||||
g_cp_op_func[Pm4::IT_EVENT_WRITE] = CpOpEventWrite;
|
||||
g_cp_op_func[Pm4::IT_EVENT_WRITE_EOP] = CpOpEventWriteEop;
|
||||
g_cp_op_func[Pm4::IT_EVENT_WRITE_EOS] = CpOpEventWriteEos;
|
||||
g_cp_op_func[Pm4::IT_DMA_DATA] = CpOpDmaData;
|
||||
g_cp_op_func[Pm4::IT_ACQUIRE_MEM] = CpOpAcquireMem;
|
||||
g_cp_op_func[Pm4::IT_SET_CONTEXT_REG] = CpOpSetContextReg;
|
||||
g_cp_op_func[Pm4::IT_SET_SH_REG] = CpOpSetShaderReg;
|
||||
g_cp_op_func[Pm4::IT_SET_UCONFIG_REG] = CpOpSetUconfigReg;
|
||||
g_cp_op_func[Pm4::IT_SET_UCONFIG_REG_INDEX] = CpOpSetUconfigReg;
|
||||
g_cp_op_func[Pm4::IT_SET_CONTEXT_REG_INDIRECT] = CpOpIndirectCxRegs;
|
||||
g_cp_op_func[Pm4::IT_SET_SH_REG_INDIRECT] = CpOpIndirectShRegs;
|
||||
g_cp_op_func[Pm4::IT_SET_UCONFIG_REG_INDIRECT] = CpOpIndirectUcRegs;
|
||||
g_cp_op_func[Pm4::IT_WRITE_CONST_RAM] = CpOpWriteConstRam;
|
||||
g_cp_op_func[Pm4::IT_DUMP_CONST_RAM] = CpOpDumpConstRam;
|
||||
g_cp_op_func[Pm4::IT_INCREMENT_CE_COUNTER] = CpOpIncrementCeCounter;
|
||||
g_cp_op_func[Pm4::IT_INCREMENT_DE_COUNTER] = CpOpIncrementDeCounter;
|
||||
g_cp_op_func[Pm4::IT_WAIT_ON_CE_COUNTER] = CpOpWaitOnCeCounter;
|
||||
g_cp_op_func[Pm4::IT_WAIT_ON_DE_COUNTER_DIFF] = CpOpWaitOnDeCounterDiff;
|
||||
g_cp_op_func[Pm4::IT_GET_LOD_STATS] = CpOpGetLodStats;
|
||||
|
||||
for (auto& func: g_cp_op_custom_func) {
|
||||
func = nullptr;
|
||||
}
|
||||
|
||||
g_cp_op_custom_func[Pm4::R_DISPATCH_RESET] = CpOpDispatchReset;
|
||||
g_cp_op_custom_func[Pm4::R_WAIT_MEM_32] = CpOpWaitRegMem32;
|
||||
g_cp_op_custom_func[Pm4::R_WAIT_FLIP_DONE] = CpOpWaitFlipDone;
|
||||
g_cp_op_custom_func[Pm4::R_PUSH_MARKER] = CpOpPushMarker;
|
||||
g_cp_op_custom_func[Pm4::R_POP_MARKER] = CpOpPopMarker;
|
||||
g_cp_op_custom_func[Pm4::R_ACQUIRE_MEM] = CpOpAcquireMem;
|
||||
g_cp_op_custom_func[Pm4::R_WAIT_MEM_64] = CpOpWaitRegMem64;
|
||||
g_cp_op_custom_func[Pm4::R_FLIP] = CpOpFlip;
|
||||
g_cp_op_custom_func[Pm4::R_RELEASE_MEM] = CpOpReleaseMem;
|
||||
|
||||
GraphicsInitJmpTablesCxIndirect();
|
||||
GraphicsInitJmpTablesShIndirect();
|
||||
GraphicsInitJmpTablesUcIndirect();
|
||||
}
|
||||
|
||||
} // namespace Libs::Graphics
|
||||
@@ -0,0 +1,171 @@
|
||||
#ifndef GRAPHICS_GUEST_GPU_COMMAND_PROCESSOR_PM4_DISPATCH_H
|
||||
#define GRAPHICS_GUEST_GPU_COMMAND_PROCESSOR_PM4_DISPATCH_H
|
||||
|
||||
#include "graphics/guest_gpu/pm4.h"
|
||||
|
||||
#include <cstdint>
|
||||
|
||||
namespace Libs::Graphics {
|
||||
|
||||
class CommandProcessor;
|
||||
|
||||
using hw_ctx_parser_func_t = uint32_t (*)(CommandProcessor*, uint32_t, uint32_t, const uint32_t*,
|
||||
uint32_t);
|
||||
using hw_uc_parser_func_t = uint32_t (*)(CommandProcessor*, uint32_t, uint32_t, const uint32_t*,
|
||||
uint32_t);
|
||||
using hw_sh_parser_func_t = uint32_t (*)(CommandProcessor*, uint32_t, uint32_t, const uint32_t*,
|
||||
uint32_t);
|
||||
using cp_op_parser_func_t = uint32_t (*)(CommandProcessor*, uint32_t, const uint32_t*, uint32_t,
|
||||
uint32_t);
|
||||
using hw_ctx_indirect_func_t = void (*)(CommandProcessor*, uint32_t, uint32_t);
|
||||
using hw_uc_indirect_func_t = void (*)(CommandProcessor*, uint32_t, uint32_t);
|
||||
using hw_sh_indirect_func_t = void (*)(CommandProcessor*, uint32_t, uint32_t);
|
||||
|
||||
extern hw_ctx_parser_func_t g_hw_ctx_func[Pm4::CX_NUM];
|
||||
extern hw_ctx_indirect_func_t g_hw_ctx_indirect_func[Pm4::CX_NUM];
|
||||
extern hw_sh_parser_func_t g_hw_sh_func[Pm4::SH_NUM];
|
||||
extern hw_sh_indirect_func_t g_hw_sh_indirect_func[Pm4::SH_NUM];
|
||||
extern hw_uc_parser_func_t g_hw_uc_func[Pm4::UC_NUM];
|
||||
extern hw_uc_indirect_func_t g_hw_uc_indirect_func[Pm4::UC_NUM];
|
||||
extern cp_op_parser_func_t g_cp_op_func[256];
|
||||
extern cp_op_parser_func_t g_cp_op_custom_func[Pm4::R_NUM];
|
||||
|
||||
void GraphicsInitJmpTables();
|
||||
void GraphicsInitJmpTablesCxIndirect();
|
||||
void GraphicsInitJmpTablesShIndirect();
|
||||
void GraphicsInitJmpTablesUcIndirect();
|
||||
|
||||
uint32_t HwCtxSetRenderControl(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetDepthMetadataRegisters(CommandProcessor*, uint32_t, uint32_t, const uint32_t*,
|
||||
uint32_t);
|
||||
uint32_t HwCtxSetBorderColorTableAddr(CommandProcessor*, uint32_t, uint32_t, const uint32_t*,
|
||||
uint32_t);
|
||||
uint32_t HwCtxSetStencilClear(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetDepthClear(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetScreenScissor(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetDepthRenderTarget(CommandProcessor*, uint32_t, uint32_t, const uint32_t*,
|
||||
uint32_t);
|
||||
uint32_t HwCtxSetStencilInfo(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetDepthHtileSurface(CommandProcessor*, uint32_t, uint32_t, const uint32_t*,
|
||||
uint32_t);
|
||||
uint32_t HwCtxSetHardwareScreenOffset(CommandProcessor*, uint32_t, uint32_t, const uint32_t*,
|
||||
uint32_t);
|
||||
uint32_t HwCtxSetWindowOffset(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetWindowScissor(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetClipRect(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetRenderTargetMask(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetGenericScissor(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetBlendColor(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetCbDccControl(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetStencilControl(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetStencilMask(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetPsInput(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetSpiTmpringSize(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetDepthControl(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetEqaaControl(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetColorControl(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetDepthBounds(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetPointState(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetClipControl(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetModeControl(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetPolyOffsetRegisters(CommandProcessor*, uint32_t, uint32_t, const uint32_t*,
|
||||
uint32_t);
|
||||
uint32_t HwCtxSetViewportTransformControl(CommandProcessor*, uint32_t, uint32_t, const uint32_t*,
|
||||
uint32_t);
|
||||
uint32_t HwCtxSetLineControl(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetFovWindow(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetScanModeControl(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetScanModeControl1(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetAaConfig(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetAaSampleControl(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetCentroidPriority(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetAaMask(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetVtxControl(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetPaScExtendedControl(CommandProcessor*, uint32_t, uint32_t, const uint32_t*,
|
||||
uint32_t);
|
||||
uint32_t HwCtxSetAlphaToMask(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetDrawPayloadControl(CommandProcessor*, uint32_t, uint32_t, const uint32_t*,
|
||||
uint32_t);
|
||||
uint32_t HwCtxSetPrimitiveIdReset(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetObjprimIdControl(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetShaderStages(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetGuardBands(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetRenderTarget(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetColorInfo(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetBlendControl(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetViewportScissor(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetViewportZ(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwCtxSetViewportScaleOffset(CommandProcessor*, uint32_t, uint32_t, const uint32_t*,
|
||||
uint32_t);
|
||||
uint32_t HwShSetPsUserSgpr(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwShSetGsUserSgpr(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwShSetHsUserSgpr(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwShSetCsUserSgpr(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwShSetPsUserAccumSgpr(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwShSetGsUserAccumSgpr(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwShSetHsUserAccumSgpr(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwShSetCsUserAccumSgpr(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwShSetCsRegisters(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwShIgnoreRegisters(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwUcSetPrimitiveType(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwUcSetIndexType(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwUcSetObjectId(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwUcSetTextureGradientFactors(CommandProcessor*, uint32_t, uint32_t, const uint32_t*,
|
||||
uint32_t);
|
||||
uint32_t HwUcSetIaMultiVgtParam(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwUcSetMultiPrimIbReset(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwUcSetBorderColorTableAddr(CommandProcessor*, uint32_t, uint32_t, const uint32_t*,
|
||||
uint32_t);
|
||||
uint32_t HwUcSetGeIndexOffset(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
uint32_t HwUcSetGdsOaRegisters(CommandProcessor*, uint32_t, uint32_t, const uint32_t*, uint32_t);
|
||||
|
||||
uint32_t CpOpNop(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpSetBase(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpClearState(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpIndexBase(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpIndexBufferSize(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpDispatchDirect(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpDispatchIndirect(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpDrawIndirect(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpDrawIndirectMulti(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpDrawIndex(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpDrawIndexOffset(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpPfpSyncMe(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpIndexType(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpNumInstances(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpDrawIndexAuto(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpCondExec(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpSetPredication(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpWriteData(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpIndirectBuffer(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpCopyData(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpEventWrite(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpEventWriteEop(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpEventWriteEos(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpDmaData(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpAcquireMem(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpSetContextReg(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpSetShaderReg(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpSetUconfigReg(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpIndirectCxRegs(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpIndirectShRegs(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpIndirectUcRegs(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpWriteConstRam(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpDumpConstRam(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpIncrementCeCounter(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpIncrementDeCounter(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpWaitOnCeCounter(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpWaitOnDeCounterDiff(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpGetLodStats(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpDispatchReset(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpWaitRegMem32(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpWaitFlipDone(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpPushMarker(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpPopMarker(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpWaitRegMem64(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpFlip(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
uint32_t CpOpReleaseMem(CommandProcessor*, uint32_t, const uint32_t*, uint32_t, uint32_t);
|
||||
|
||||
} // namespace Libs::Graphics
|
||||
|
||||
#endif // GRAPHICS_GUEST_GPU_COMMAND_PROCESSOR_PM4_DISPATCH_H
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,437 @@
|
||||
#ifndef EMULATOR_INCLUDE_EMULATOR_GRAPHICS_GUEST_GPU_GPU_DEFS_H_
|
||||
#define EMULATOR_INCLUDE_EMULATOR_GRAPHICS_GUEST_GPU_GPU_DEFS_H_
|
||||
|
||||
#include "common/common.h"
|
||||
|
||||
#include <type_traits>
|
||||
|
||||
namespace Libs::Graphics::Prospero {
|
||||
|
||||
template <typename T>
|
||||
constexpr auto GpuEnumValue(T value) {
|
||||
return static_cast<std::underlying_type_t<T>>(value);
|
||||
}
|
||||
|
||||
enum class PrimitiveType : uint32_t {
|
||||
kNone = 0,
|
||||
kPointList = 1,
|
||||
kLineList = 2,
|
||||
kLineStrip = 3,
|
||||
kTriList = 4,
|
||||
kTriFan = 5,
|
||||
kTriStrip = 6,
|
||||
kRectList = 7,
|
||||
kPatch = 9,
|
||||
kLineListAdjacency = 10,
|
||||
kLineStripAdjacency = 11,
|
||||
kTriListAdjacency = 12,
|
||||
kTriStripAdjacency = 13,
|
||||
kRectListLegacy = 17,
|
||||
kLineLoop = 18,
|
||||
kQuadListLegacy = 19,
|
||||
kQuadStripLegacy = 20,
|
||||
kPolygon = 21,
|
||||
};
|
||||
|
||||
enum class IndexType : uint32_t {
|
||||
kIndex16 = 0,
|
||||
kIndex32 = 1,
|
||||
kIndex8 = 2,
|
||||
};
|
||||
|
||||
enum class ShaderBinaryType : uint8_t {
|
||||
kCs = 0,
|
||||
kPs = 1,
|
||||
kGs = 2,
|
||||
kHs = 3,
|
||||
kGsFront = 4,
|
||||
kHsFront = 5,
|
||||
kGsBack = 6,
|
||||
kHsBack = 7,
|
||||
kFs = 8,
|
||||
};
|
||||
|
||||
enum class GsOutputPrimitiveType : uint32_t {
|
||||
kPoints = 0,
|
||||
kLines = 1,
|
||||
kTriangles = 2,
|
||||
k2dRectangle = 3,
|
||||
kRectList = 4,
|
||||
};
|
||||
|
||||
enum class ChannelLayout : uint32_t {
|
||||
kInvalid = 0,
|
||||
k8 = 1,
|
||||
k16 = 2,
|
||||
k8_8 = 3,
|
||||
k32 = 4,
|
||||
k16_16 = 5,
|
||||
k11_11_10 = 6,
|
||||
k10_10_10_2 = 9,
|
||||
k8_8_8_8 = 10,
|
||||
k32_32 = 11,
|
||||
k16_16_16_16 = 12,
|
||||
k32_32_32_32 = 14,
|
||||
k5_5_5_1 = 17,
|
||||
k4_4_4_4 = 19,
|
||||
kBc1 = 35,
|
||||
kBc2 = 36,
|
||||
kBc3 = 37,
|
||||
};
|
||||
|
||||
enum class ChannelType : uint32_t {
|
||||
kUNorm = 0,
|
||||
kSNorm = 1,
|
||||
kUInt = 4,
|
||||
kSInt = 5,
|
||||
kSrgb = 6,
|
||||
kFloat = 7,
|
||||
};
|
||||
|
||||
enum class NumberFormat : uint32_t {
|
||||
kUNorm = 0,
|
||||
kSNorm = 1,
|
||||
kUInt = 4,
|
||||
kSInt = 5,
|
||||
kFloat = 7,
|
||||
kSrgb = 9,
|
||||
};
|
||||
|
||||
enum class ChannelOrder : uint32_t {
|
||||
kStandard = 0,
|
||||
kAlt = 1,
|
||||
kReversed = 2,
|
||||
kAltReversed = 3,
|
||||
};
|
||||
|
||||
enum class DepthFormat : uint32_t {
|
||||
kInvalid = 0,
|
||||
kZ16 = 1,
|
||||
kZ32F = 3,
|
||||
};
|
||||
|
||||
enum class StencilFormat : uint32_t {
|
||||
kInvalid = 0,
|
||||
k8UInt = 1,
|
||||
};
|
||||
|
||||
enum class TileMode : uint32_t {
|
||||
kLinear = 0x00,
|
||||
kStandard256B = 0x01,
|
||||
kStandard4KB = 0x05,
|
||||
kStandard64KB = 0x09,
|
||||
kPrt = 0x11,
|
||||
kDepth = 0x18,
|
||||
kRenderTarget = 0x1b,
|
||||
};
|
||||
|
||||
enum class StencilOp : uint32_t {
|
||||
kKeep = 0x00,
|
||||
kZero = 0x01,
|
||||
kOnes = 0x02,
|
||||
kReplaceTest = 0x03,
|
||||
kReplaceOp = 0x04,
|
||||
kAddClamp = 0x05,
|
||||
kSubClamp = 0x06,
|
||||
kInvert = 0x07,
|
||||
kAddWrap = 0x08,
|
||||
kSubWrap = 0x09,
|
||||
kAnd = 0x0a,
|
||||
kOr = 0x0b,
|
||||
kXor = 0x0c,
|
||||
kNand = 0x0d,
|
||||
kNor = 0x0e,
|
||||
kXnor = 0x0f,
|
||||
};
|
||||
|
||||
enum class BlendFactor : uint32_t {
|
||||
kZero = 0x00,
|
||||
kOne = 0x01,
|
||||
kSrcColor = 0x02,
|
||||
kOneMinusSrcColor = 0x03,
|
||||
kSrcAlpha = 0x04,
|
||||
kOneMinusSrcAlpha = 0x05,
|
||||
kDstAlpha = 0x06,
|
||||
kOneMinusDstAlpha = 0x07,
|
||||
kDstColor = 0x08,
|
||||
kOneMinusDstColor = 0x09,
|
||||
kSrcAlphaSaturate = 0x0a,
|
||||
kConstantColor = 0x0d,
|
||||
kOneMinusConstantColor = 0x0e,
|
||||
kSrc1Color = 0x0f,
|
||||
kOneMinusSrc1Color = 0x10,
|
||||
kSrc1Alpha = 0x11,
|
||||
kOneMinusSrc1Alpha = 0x12,
|
||||
kConstantAlpha = 0x13,
|
||||
kOneMinusConstantAlpha = 0x14,
|
||||
};
|
||||
|
||||
enum class BlendOp : uint32_t {
|
||||
kAdd = 0x00,
|
||||
kSubtract = 0x01,
|
||||
kMin = 0x02,
|
||||
kMax = 0x03,
|
||||
kReverseSubtract = 0x04,
|
||||
};
|
||||
|
||||
enum class CompSwizzle : uint32_t {
|
||||
kZero = 0,
|
||||
kOne = 1,
|
||||
kRed = 4,
|
||||
kGreen = 5,
|
||||
kBlue = 6,
|
||||
kAlpha = 7,
|
||||
};
|
||||
|
||||
enum class SamplerClampMode : uint32_t {
|
||||
kWrap = 0,
|
||||
kMirror = 1,
|
||||
kClampLastTexel = 2,
|
||||
kMirrorOnceLastTexel = 3,
|
||||
kClampHalfBorder = 4,
|
||||
kMirrorOnceHalfBorder = 5,
|
||||
kClampBorder = 6,
|
||||
kMirrorOnceBorder = 7,
|
||||
};
|
||||
|
||||
enum class SamplerAnisoRatio : uint32_t {
|
||||
kOne = 0,
|
||||
kTwo = 1,
|
||||
kFour = 2,
|
||||
kEight = 3,
|
||||
kSixteen = 4,
|
||||
};
|
||||
|
||||
enum class SamplerBorderColor : uint32_t {
|
||||
kTransBlack = 0,
|
||||
kOpaqueBlack = 1,
|
||||
kOpaqueWhite = 2,
|
||||
kFromTable = 3,
|
||||
};
|
||||
|
||||
enum class SamplerFilter : uint32_t {
|
||||
kPoint = 0,
|
||||
kBilinear = 1,
|
||||
kAnisoPoint = 2,
|
||||
kAnisoLinear = 3,
|
||||
};
|
||||
|
||||
enum class SamplerMipFilter : uint32_t {
|
||||
kNone = 0,
|
||||
kPoint = 1,
|
||||
kLinear = 2,
|
||||
};
|
||||
|
||||
enum class ImageType : uint32_t {
|
||||
kColor1D = 8,
|
||||
kColor2D = 9,
|
||||
kColor3D = 10,
|
||||
kCube = 11,
|
||||
kColor1DArray = 12,
|
||||
kColor2DArray = 13,
|
||||
kColor2DMsaa = 14,
|
||||
kColor2DMsaaArray = 15,
|
||||
};
|
||||
|
||||
enum class DescriptorKind : uint32_t {
|
||||
kBuffer = 1,
|
||||
kSampler = 2,
|
||||
kUnused = 3,
|
||||
};
|
||||
|
||||
enum class ShaderUsageType : uint32_t {
|
||||
kReadOnlyResource = 0x00,
|
||||
kSampler = 0x01,
|
||||
kConstantBuffer = 0x02,
|
||||
kReadWriteResource = 0x04,
|
||||
kGdsMemoryRange = 0x07,
|
||||
kFetchShader = 0x12,
|
||||
kVertexBufferTable = 0x17,
|
||||
kExtendedUserData = 0x1b,
|
||||
};
|
||||
|
||||
enum class BufferFormat : uint32_t {
|
||||
kInvalid = 0,
|
||||
k8UNorm = 1,
|
||||
k8SNorm = 2,
|
||||
k8UScaled = 3,
|
||||
k8SScaled = 4,
|
||||
k8UInt = 5,
|
||||
k8SInt = 6,
|
||||
k16UNorm = 7,
|
||||
k16SNorm = 8,
|
||||
k16UScaled = 9,
|
||||
k16SScaled = 10,
|
||||
k16UInt = 11,
|
||||
k16SInt = 12,
|
||||
k16Float = 13,
|
||||
k8_8UNorm = 14,
|
||||
k8_8SNorm = 15,
|
||||
k8_8UScaled = 16,
|
||||
k8_8SScaled = 17,
|
||||
k8_8UInt = 18,
|
||||
k8_8SInt = 19,
|
||||
k32UInt = 20,
|
||||
k32SInt = 21,
|
||||
k32Float = 22,
|
||||
k16_16UNorm = 23,
|
||||
k16_16SNorm = 24,
|
||||
k16_16UScaled = 25,
|
||||
k16_16SScaled = 26,
|
||||
k16_16UInt = 27,
|
||||
k16_16SInt = 28,
|
||||
k16_16Float = 29,
|
||||
k11_11_10UNorm = 30,
|
||||
k11_11_10SNorm = 31,
|
||||
k11_11_10UScaled = 32,
|
||||
k11_11_10SScaled = 33,
|
||||
k11_11_10UInt = 34,
|
||||
k11_11_10SInt = 35,
|
||||
k11_11_10Float = 36,
|
||||
k10_11_11UNorm = 37,
|
||||
k10_11_11SNorm = 38,
|
||||
k10_11_11UScaled = 39,
|
||||
k10_11_11SScaled = 40,
|
||||
k10_11_11UInt = 41,
|
||||
k10_11_11SInt = 42,
|
||||
k10_11_11Float = 43,
|
||||
k2_10_10_10UNorm = 44,
|
||||
k2_10_10_10SNorm = 45,
|
||||
k2_10_10_10UScaled = 46,
|
||||
k2_10_10_10SScaled = 47,
|
||||
k2_10_10_10UInt = 48,
|
||||
k2_10_10_10SInt = 49,
|
||||
k10_10_10_2UNorm = 50,
|
||||
k10_10_10_2SNorm = 51,
|
||||
k10_10_10_2UScaled = 52,
|
||||
k10_10_10_2SScaled = 53,
|
||||
k10_10_10_2UInt = 54,
|
||||
k10_10_10_2SInt = 55,
|
||||
k8_8_8_8UNorm = 56,
|
||||
k8_8_8_8SNorm = 57,
|
||||
k8_8_8_8UScaled = 58,
|
||||
k8_8_8_8SScaled = 59,
|
||||
k8_8_8_8UInt = 60,
|
||||
k8_8_8_8SInt = 61,
|
||||
k32_32UInt = 62,
|
||||
k32_32SInt = 63,
|
||||
k32_32Float = 64,
|
||||
k16_16_16_16UNorm = 65,
|
||||
k16_16_16_16SNorm = 66,
|
||||
k16_16_16_16UScaled = 67,
|
||||
k16_16_16_16SScaled = 68,
|
||||
k16_16_16_16UInt = 69,
|
||||
k16_16_16_16SInt = 70,
|
||||
k16_16_16_16Float = 71,
|
||||
k32_32_32UInt = 72,
|
||||
k32_32_32SInt = 73,
|
||||
k32_32_32Float = 74,
|
||||
k32_32_32_32UInt = 75,
|
||||
k32_32_32_32SInt = 76,
|
||||
k32_32_32_32Float = 77,
|
||||
k8_8_8_8Srgb = 130,
|
||||
k9_9_9_5Float = 132,
|
||||
k5_6_5UNorm = 133,
|
||||
k5_5_5_1UNorm = 134,
|
||||
k4_4_4_4UNorm = 136,
|
||||
kFmask8_S4_F4 = 161,
|
||||
kBc1UNorm = 169,
|
||||
kBc1Srgb = 170,
|
||||
kBc2UNorm = 171,
|
||||
kBc2Srgb = 172,
|
||||
kBc3UNorm = 173,
|
||||
kBc3Srgb = 174,
|
||||
kBc4UNorm = 175,
|
||||
kBc4SNorm = 176,
|
||||
kBc5UNorm = 177,
|
||||
kBc5SNorm = 178,
|
||||
kBc6UFloat = 179,
|
||||
kBc6SFloat = 180,
|
||||
kBc7UNorm = 181,
|
||||
kBc7Srgb = 182,
|
||||
};
|
||||
|
||||
enum class VertexAttribFormat : uint32_t {
|
||||
kInvalid = 0,
|
||||
k8UNorm = 4,
|
||||
k8SNorm = 8,
|
||||
k8UScaled = 12,
|
||||
k8SScaled = 16,
|
||||
k8UInt = 20,
|
||||
k8SInt = 24,
|
||||
k16UNorm = 28,
|
||||
k16SNorm = 32,
|
||||
k16UScaled = 36,
|
||||
k16SScaled = 40,
|
||||
k16UInt = 44,
|
||||
k16SInt = 48,
|
||||
k16Float = 52,
|
||||
k8_8UNorm = 57,
|
||||
k8_8SNorm = 61,
|
||||
k8_8UScaled = 65,
|
||||
k8_8SScaled = 69,
|
||||
k8_8UInt = 73,
|
||||
k8_8SInt = 77,
|
||||
k32UInt = 80,
|
||||
k32SInt = 84,
|
||||
k32Float = 88,
|
||||
k16_16UNorm = 93,
|
||||
k16_16SNorm = 97,
|
||||
k16_16UScaled = 101,
|
||||
k16_16SScaled = 105,
|
||||
k16_16UInt = 109,
|
||||
k16_16SInt = 113,
|
||||
k16_16Float = 117,
|
||||
k11_11_10UNorm = 122,
|
||||
k11_11_10SNorm = 126,
|
||||
k11_11_10UScaled = 130,
|
||||
k11_11_10SScaled = 134,
|
||||
k11_11_10UInt = 138,
|
||||
k11_11_10SInt = 142,
|
||||
k11_11_10Float = 146,
|
||||
k10_11_11UNorm = 150,
|
||||
k10_11_11SNorm = 154,
|
||||
k10_11_11UScaled = 158,
|
||||
k10_11_11SScaled = 162,
|
||||
k10_11_11UInt = 166,
|
||||
k10_11_11SInt = 170,
|
||||
k10_11_11Float = 174,
|
||||
k2_10_10_10UNorm = 179,
|
||||
k2_10_10_10SNorm = 183,
|
||||
k2_10_10_10UScaled = 187,
|
||||
k2_10_10_10SScaled = 191,
|
||||
k2_10_10_10UInt = 195,
|
||||
k2_10_10_10SInt = 199,
|
||||
k10_10_10_2UNorm = 203,
|
||||
k10_10_10_2SNorm = 207,
|
||||
k10_10_10_2UScaled = 211,
|
||||
k10_10_10_2SScaled = 215,
|
||||
k10_10_10_2UInt = 219,
|
||||
k10_10_10_2SInt = 223,
|
||||
k8_8_8_8UNorm = 227,
|
||||
k8_8_8_8SNorm = 231,
|
||||
k8_8_8_8UScaled = 235,
|
||||
k8_8_8_8SScaled = 239,
|
||||
k8_8_8_8UInt = 243,
|
||||
k8_8_8_8SInt = 247,
|
||||
k32_32UInt = 249,
|
||||
k32_32SInt = 253,
|
||||
k32_32Float = 257,
|
||||
k16_16_16_16UNorm = 263,
|
||||
k16_16_16_16SNorm = 267,
|
||||
k16_16_16_16UScaled = 271,
|
||||
k16_16_16_16SScaled = 275,
|
||||
k16_16_16_16UInt = 279,
|
||||
k16_16_16_16SInt = 283,
|
||||
k16_16_16_16Float = 287,
|
||||
k32_32_32UInt = 290,
|
||||
k32_32_32SInt = 294,
|
||||
k32_32_32Float = 298,
|
||||
k32_32_32_32UInt = 303,
|
||||
k32_32_32_32SInt = 307,
|
||||
k32_32_32_32Float = 311,
|
||||
};
|
||||
|
||||
} // namespace Libs::Graphics::Prospero
|
||||
|
||||
#endif /* EMULATOR_INCLUDE_EMULATOR_GRAPHICS_GUEST_GPU_GPU_DEFS_H_ */
|
||||
@@ -0,0 +1,145 @@
|
||||
#include "graphics/guest_gpu/gpu_format.h"
|
||||
|
||||
#include "graphics/guest_gpu/gpu_defs.h"
|
||||
|
||||
#include <array>
|
||||
|
||||
namespace Libs::Graphics::Prospero {
|
||||
namespace {
|
||||
|
||||
constexpr FormatInfo kFormatInfo[] = {
|
||||
{GpuEnumValue(BufferFormat::k8UNorm), VK_FORMAT_R8_UNORM, 1, 0, 1, true, false},
|
||||
{GpuEnumValue(BufferFormat::k8SNorm), VK_FORMAT_UNDEFINED, 0, 0, 1, false, false},
|
||||
{GpuEnumValue(BufferFormat::k8UInt), VK_FORMAT_R8_UINT, 1, 0, 1, true, true},
|
||||
{GpuEnumValue(BufferFormat::k16UNorm), VK_FORMAT_R16_UNORM, 2, 0, 2, true, false},
|
||||
{GpuEnumValue(BufferFormat::k16SNorm), VK_FORMAT_R16_SNORM, 2, 0, 2, true, false},
|
||||
{GpuEnumValue(BufferFormat::k16UInt), VK_FORMAT_R16_UINT, 2, 0, 2, true, true},
|
||||
{GpuEnumValue(BufferFormat::k16SInt), VK_FORMAT_R16_SINT, 2, 0, 2, false, false},
|
||||
{GpuEnumValue(BufferFormat::k16Float), VK_FORMAT_R16_SFLOAT, 2, 0, 2, true, false},
|
||||
{GpuEnumValue(BufferFormat::k8_8UNorm), VK_FORMAT_R8G8_UNORM, 2, 0, 2, true, false},
|
||||
{GpuEnumValue(BufferFormat::k8_8SNorm), VK_FORMAT_R8G8_SNORM, 2, 0, 2, true, false},
|
||||
{GpuEnumValue(BufferFormat::k8_8UInt), VK_FORMAT_R8G8_UINT, 2, 0, 2, true, true},
|
||||
{GpuEnumValue(BufferFormat::k8_8SInt), VK_FORMAT_R8G8_SINT, 2, 0, 2, false, false},
|
||||
{GpuEnumValue(BufferFormat::k32UInt), VK_FORMAT_R32_UINT, 4, 0, 4, true, true},
|
||||
{GpuEnumValue(BufferFormat::k32SInt), VK_FORMAT_R32_SINT, 4, 0, 4, false, false},
|
||||
{GpuEnumValue(BufferFormat::k32Float), VK_FORMAT_R32_SFLOAT, 4, 0, 4, true, false},
|
||||
{GpuEnumValue(BufferFormat::k16_16UNorm), VK_FORMAT_R16G16_UNORM, 4, 0, 4, true, false},
|
||||
{GpuEnumValue(BufferFormat::k16_16SNorm), VK_FORMAT_R16G16_SNORM, 4, 0, 4, true, false},
|
||||
{GpuEnumValue(BufferFormat::k16_16UInt), VK_FORMAT_R16G16_UINT, 4, 0, 4, true, true},
|
||||
{GpuEnumValue(BufferFormat::k16_16SInt), VK_FORMAT_R16G16_SINT, 4, 0, 4, false, false},
|
||||
{GpuEnumValue(BufferFormat::k16_16Float), VK_FORMAT_R16G16_SFLOAT, 4, 0, 4, true, false},
|
||||
{GpuEnumValue(BufferFormat::k11_11_10Float), VK_FORMAT_B10G11R11_UFLOAT_PACK32, 4, 0, 4,
|
||||
true, false},
|
||||
{GpuEnumValue(BufferFormat::k10_10_10_2UNorm), VK_FORMAT_A2B10G10R10_UNORM_PACK32, 4, 0, 4,
|
||||
true, false},
|
||||
{GpuEnumValue(BufferFormat::k8_8_8_8UNorm), VK_FORMAT_R8G8B8A8_UNORM, 4, 0, 4, true, false},
|
||||
{GpuEnumValue(BufferFormat::k8_8_8_8SNorm), VK_FORMAT_R8G8B8A8_SNORM, 4, 0, 4, true, false},
|
||||
{GpuEnumValue(BufferFormat::k8_8_8_8UInt), VK_FORMAT_R8G8B8A8_UINT, 4, 0, 4, true, true},
|
||||
{GpuEnumValue(BufferFormat::k8_8_8_8SInt), VK_FORMAT_R8G8B8A8_SINT, 4, 0, 4, false, false},
|
||||
{GpuEnumValue(BufferFormat::k32_32UInt), VK_FORMAT_R32G32_UINT, 8, 0, 8, true, true},
|
||||
{GpuEnumValue(BufferFormat::k32_32SInt), VK_FORMAT_R32G32_SINT, 8, 0, 8, false, false},
|
||||
{GpuEnumValue(BufferFormat::k32_32Float), VK_FORMAT_R32G32_SFLOAT, 8, 0, 8, true, false},
|
||||
{GpuEnumValue(BufferFormat::k16_16_16_16UNorm), VK_FORMAT_R16G16B16A16_UNORM, 8, 0, 8, true,
|
||||
false},
|
||||
{GpuEnumValue(BufferFormat::k16_16_16_16SNorm), VK_FORMAT_R16G16B16A16_SNORM, 8, 0, 8, true,
|
||||
false},
|
||||
{GpuEnumValue(BufferFormat::k16_16_16_16UInt), VK_FORMAT_R16G16B16A16_UINT, 8, 0, 8, true,
|
||||
true},
|
||||
{GpuEnumValue(BufferFormat::k16_16_16_16SInt), VK_FORMAT_R16G16B16A16_SINT, 8, 0, 8, false,
|
||||
false},
|
||||
{GpuEnumValue(BufferFormat::k16_16_16_16Float), VK_FORMAT_R16G16B16A16_SFLOAT, 8, 0, 8, true,
|
||||
false},
|
||||
{GpuEnumValue(BufferFormat::k32_32_32UInt), VK_FORMAT_R32G32B32_UINT, 12, 0, 12, true, true},
|
||||
{GpuEnumValue(BufferFormat::k32_32_32SInt), VK_FORMAT_R32G32B32_SINT, 12, 0, 12, false,
|
||||
false},
|
||||
{GpuEnumValue(BufferFormat::k32_32_32Float), VK_FORMAT_R32G32B32_SFLOAT, 12, 0, 12, true,
|
||||
false},
|
||||
{GpuEnumValue(BufferFormat::k32_32_32_32UInt), VK_FORMAT_R32G32B32A32_UINT, 16, 0, 16, true,
|
||||
true},
|
||||
{GpuEnumValue(BufferFormat::k32_32_32_32SInt), VK_FORMAT_R32G32B32A32_SINT, 16, 0, 16, false,
|
||||
false},
|
||||
{GpuEnumValue(BufferFormat::k32_32_32_32Float), VK_FORMAT_R32G32B32A32_SFLOAT, 16, 0, 16,
|
||||
true, false},
|
||||
{GpuEnumValue(BufferFormat::k8_8_8_8Srgb), VK_FORMAT_R8G8B8A8_SRGB, 4, 0, 4, true, false},
|
||||
{GpuEnumValue(BufferFormat::k9_9_9_5Float), VK_FORMAT_E5B9G9R9_UFLOAT_PACK32, 4, 0, 0, true,
|
||||
false},
|
||||
{GpuEnumValue(BufferFormat::k5_6_5UNorm), VK_FORMAT_B5G6R5_UNORM_PACK16, 2, 0, 2, true,
|
||||
false},
|
||||
{GpuEnumValue(BufferFormat::k5_5_5_1UNorm), VK_FORMAT_R5G5B5A1_UNORM_PACK16, 2, 0, 2, true,
|
||||
false},
|
||||
{GpuEnumValue(BufferFormat::k4_4_4_4UNorm), VK_FORMAT_R4G4B4A4_UNORM_PACK16, 2, 0, 2, true,
|
||||
false},
|
||||
{GpuEnumValue(BufferFormat::kFmask8_S4_F4), VK_FORMAT_R32_SFLOAT, 1, 0, 1, true, false},
|
||||
{GpuEnumValue(BufferFormat::kBc1UNorm), VK_FORMAT_BC1_RGBA_UNORM_BLOCK, 0, 8, 0, true,
|
||||
false},
|
||||
{GpuEnumValue(BufferFormat::kBc1Srgb), VK_FORMAT_BC1_RGBA_SRGB_BLOCK, 0, 8, 0, true, false},
|
||||
{GpuEnumValue(BufferFormat::kBc2UNorm), VK_FORMAT_BC2_UNORM_BLOCK, 0, 16, 0, true, false},
|
||||
{GpuEnumValue(BufferFormat::kBc2Srgb), VK_FORMAT_BC2_SRGB_BLOCK, 0, 16, 0, true, false},
|
||||
{GpuEnumValue(BufferFormat::kBc3UNorm), VK_FORMAT_BC3_UNORM_BLOCK, 0, 16, 0, true, false},
|
||||
{GpuEnumValue(BufferFormat::kBc3Srgb), VK_FORMAT_BC3_SRGB_BLOCK, 0, 16, 0, true, false},
|
||||
{GpuEnumValue(BufferFormat::kBc4UNorm), VK_FORMAT_BC4_UNORM_BLOCK, 0, 8, 0, true, false},
|
||||
{GpuEnumValue(BufferFormat::kBc4SNorm), VK_FORMAT_BC4_SNORM_BLOCK, 0, 8, 0, true, false},
|
||||
{GpuEnumValue(BufferFormat::kBc5UNorm), VK_FORMAT_BC5_UNORM_BLOCK, 0, 16, 0, true, false},
|
||||
{GpuEnumValue(BufferFormat::kBc5SNorm), VK_FORMAT_BC5_SNORM_BLOCK, 0, 16, 0, true, false},
|
||||
{GpuEnumValue(BufferFormat::kBc6UFloat), VK_FORMAT_BC6H_UFLOAT_BLOCK, 0, 16, 0, true, false},
|
||||
{GpuEnumValue(BufferFormat::kBc6SFloat), VK_FORMAT_BC6H_SFLOAT_BLOCK, 0, 16, 0, true, false},
|
||||
{GpuEnumValue(BufferFormat::kBc7UNorm), VK_FORMAT_BC7_UNORM_BLOCK, 0, 16, 0, true, false},
|
||||
{GpuEnumValue(BufferFormat::kBc7Srgb), VK_FORMAT_BC7_SRGB_BLOCK, 0, 16, 0, true, false},
|
||||
};
|
||||
|
||||
constexpr auto MakeFormatInfoLookup() {
|
||||
constexpr uint32_t kMaxFormat = GpuEnumValue(BufferFormat::kBc7Srgb);
|
||||
std::array<const FormatInfo*, kMaxFormat + 1> lookup {};
|
||||
for (const auto& info: kFormatInfo) {
|
||||
lookup[info.format] = &info;
|
||||
}
|
||||
return lookup;
|
||||
}
|
||||
|
||||
constexpr auto kFormatInfoLookup = MakeFormatInfoLookup();
|
||||
|
||||
} // namespace
|
||||
|
||||
std::span<const FormatInfo> Formats() {
|
||||
return kFormatInfo;
|
||||
}
|
||||
|
||||
const FormatInfo* FindFormatInfo(uint32_t format) {
|
||||
return format < kFormatInfoLookup.size() ? kFormatInfoLookup[format] : nullptr;
|
||||
}
|
||||
|
||||
VkFormat SurfaceFormat(uint32_t format) {
|
||||
const auto* info = FindFormatInfo(format);
|
||||
return info != nullptr ? info->vk_format : VK_FORMAT_UNDEFINED;
|
||||
}
|
||||
|
||||
uint32_t NumBytesPerElement(uint32_t format) {
|
||||
const auto* info = FindFormatInfo(format);
|
||||
return info != nullptr ? info->bytes_per_element : 0;
|
||||
}
|
||||
|
||||
uint32_t BlockCompressedBytesPerBlock(uint32_t format) {
|
||||
const auto* info = FindFormatInfo(format);
|
||||
return info != nullptr ? info->block_compressed_bytes_per_block : 0;
|
||||
}
|
||||
|
||||
uint32_t RenderTargetBytesPerElement(uint32_t format) {
|
||||
const auto* info = FindFormatInfo(format);
|
||||
return info != nullptr ? info->render_target_bytes_per_element : 0;
|
||||
}
|
||||
|
||||
bool IsSupportedTextureFormat(uint32_t format) {
|
||||
const auto* info = FindFormatInfo(format);
|
||||
return info != nullptr && info->supported_sampled_texture_format;
|
||||
}
|
||||
|
||||
bool IsUintTextureFormat(uint32_t format) {
|
||||
const auto* info = FindFormatInfo(format);
|
||||
return info != nullptr && info->unsigned_integer_texture_format;
|
||||
}
|
||||
|
||||
bool IsFmaskTextureFormat(uint32_t format) {
|
||||
return format == GpuEnumValue(BufferFormat::kFmask8_S4_F4);
|
||||
}
|
||||
|
||||
} // namespace Libs::Graphics::Prospero
|
||||
@@ -0,0 +1,33 @@
|
||||
#ifndef EMULATOR_INCLUDE_EMULATOR_GRAPHICS_GUEST_GPU_GPU_FORMAT_H_
|
||||
#define EMULATOR_INCLUDE_EMULATOR_GRAPHICS_GUEST_GPU_GPU_FORMAT_H_
|
||||
|
||||
#include "common/common.h"
|
||||
|
||||
#include <span>
|
||||
#include <vulkan/vulkan_core.h>
|
||||
|
||||
namespace Libs::Graphics::Prospero {
|
||||
|
||||
struct FormatInfo {
|
||||
uint32_t format = 0;
|
||||
VkFormat vk_format = VK_FORMAT_UNDEFINED;
|
||||
uint32_t bytes_per_element = 0;
|
||||
uint32_t block_compressed_bytes_per_block = 0;
|
||||
uint32_t render_target_bytes_per_element = 0;
|
||||
bool supported_sampled_texture_format = false;
|
||||
bool unsigned_integer_texture_format = false;
|
||||
};
|
||||
|
||||
std::span<const FormatInfo> Formats();
|
||||
const FormatInfo* FindFormatInfo(uint32_t format);
|
||||
VkFormat SurfaceFormat(uint32_t format);
|
||||
uint32_t NumBytesPerElement(uint32_t format);
|
||||
uint32_t BlockCompressedBytesPerBlock(uint32_t format);
|
||||
uint32_t RenderTargetBytesPerElement(uint32_t format);
|
||||
bool IsSupportedTextureFormat(uint32_t format);
|
||||
bool IsUintTextureFormat(uint32_t format);
|
||||
bool IsFmaskTextureFormat(uint32_t format);
|
||||
|
||||
} // namespace Libs::Graphics::Prospero
|
||||
|
||||
#endif /* EMULATOR_INCLUDE_EMULATOR_GRAPHICS_GUEST_GPU_GPU_FORMAT_H_ */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,38 @@
|
||||
#ifndef EMULATOR_INCLUDE_EMULATOR_GRAPHICS_GRAPHICSRUN_H_
|
||||
#define EMULATOR_INCLUDE_EMULATOR_GRAPHICS_GRAPHICSRUN_H_
|
||||
|
||||
#include "common/abi.h"
|
||||
#include "common/common.h"
|
||||
|
||||
namespace Libs::Graphics {
|
||||
|
||||
class GraphicsRunSubmissionLock final {
|
||||
public:
|
||||
GraphicsRunSubmissionLock();
|
||||
~GraphicsRunSubmissionLock();
|
||||
KYTY_CLASS_NO_COPY(GraphicsRunSubmissionLock);
|
||||
};
|
||||
|
||||
void GraphicsRunInit();
|
||||
|
||||
void GraphicsRunSubmit(uint32_t* cmd_draw_buffer, uint32_t num_draw_dw, uint32_t* cmd_const_buffer,
|
||||
uint32_t num_const_dw, bool trigger_agc_interrupt_on_done = false);
|
||||
void GraphicsRunSubmitCompute(uint32_t queue, uint32_t* cmd_buffer, uint32_t num_dw,
|
||||
bool trigger_agc_interrupt_on_done = false);
|
||||
void GraphicsRunWait();
|
||||
void GraphicsRunDone();
|
||||
int GraphicsRunGetFrameNum();
|
||||
[[nodiscard]] bool GraphicsRunIsCommandProcessorThread() noexcept;
|
||||
[[nodiscard]] bool GraphicsRunIsGuestMemoryPoll() noexcept;
|
||||
[[nodiscard]] bool GraphicsRunIsCommandProcessorGuestAccess() noexcept;
|
||||
[[nodiscard]] bool GraphicsRunSubmissionLockHeld() noexcept;
|
||||
[[nodiscard]] bool GraphicsRunGpuLockHeld() noexcept;
|
||||
// Begin/end an exclusive same-command-processor readback transaction. The begin call finishes
|
||||
// work already recorded on that queue and retains the processor lock so its peer draw/constant
|
||||
// job cannot record new work until BufferCache publishes the faulted page.
|
||||
[[nodiscard]] int GraphicsRunBeginCommandProcessorReadback();
|
||||
void GraphicsRunEndCommandProcessorReadback();
|
||||
|
||||
} // namespace Libs::Graphics
|
||||
|
||||
#endif /* EMULATOR_INCLUDE_EMULATOR_GRAPHICS_GRAPHICSRUN_H_ */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,153 @@
|
||||
#include "graphics/guest_gpu/pm4.h"
|
||||
|
||||
#include "common/assert.h"
|
||||
#include "common/file.h"
|
||||
|
||||
namespace Libs::Graphics::Pm4 {
|
||||
|
||||
static const char* g_names[256] = {};
|
||||
static const char* g_r_names[Pm4::R_NUM] = {};
|
||||
static bool g_names_initialized = false;
|
||||
|
||||
static void InitNames() {
|
||||
if (!g_names_initialized) {
|
||||
for (auto& n: g_names) {
|
||||
n = "<unknown>";
|
||||
}
|
||||
|
||||
for (auto& n: g_r_names) {
|
||||
n = "<unknown>";
|
||||
}
|
||||
|
||||
g_r_names[R_ZERO] = "R_ZERO";
|
||||
g_r_names[R_DRAW_RESET] = "R_DRAW_RESET";
|
||||
g_r_names[R_WAIT_FLIP_DONE] = "R_WAIT_FLIP_DONE";
|
||||
g_r_names[R_DISPATCH_RESET] = "R_DISPATCH_RESET";
|
||||
g_r_names[R_WAIT_MEM_32] = "R_WAIT_MEM_32";
|
||||
g_r_names[R_PUSH_MARKER] = "R_PUSH_MARKER";
|
||||
g_r_names[R_POP_MARKER] = "R_POP_MARKER";
|
||||
g_r_names[R_ACQUIRE_MEM] = "R_ACQUIRE_MEM";
|
||||
g_r_names[R_WRITE_DATA] = "R_WRITE_DATA";
|
||||
g_r_names[R_WAIT_MEM_64] = "R_WAIT_MEM_64";
|
||||
g_r_names[R_FLIP] = "R_FLIP";
|
||||
g_r_names[R_RELEASE_MEM] = "R_RELEASE_MEM";
|
||||
g_r_names[R_DMA_DATA] = "R_DMA_DATA";
|
||||
|
||||
g_names[IT_NOP] = "IT_NOP";
|
||||
g_names[IT_SET_BASE] = "IT_SET_BASE";
|
||||
g_names[IT_CLEAR_STATE] = "IT_CLEAR_STATE";
|
||||
g_names[IT_INDEX_BUFFER_SIZE] = "IT_INDEX_BUFFER_SIZE";
|
||||
g_names[IT_DISPATCH_DIRECT] = "IT_DISPATCH_DIRECT";
|
||||
g_names[IT_DISPATCH_INDIRECT] = "IT_DISPATCH_INDIRECT";
|
||||
g_names[IT_SET_PREDICATION] = "IT_SET_PREDICATION";
|
||||
g_names[IT_COND_EXEC] = "IT_COND_EXEC";
|
||||
g_names[IT_DRAW_INDIRECT] = "IT_DRAW_INDIRECT";
|
||||
g_names[IT_DRAW_INDEX_INDIRECT] = "IT_DRAW_INDEX_INDIRECT";
|
||||
g_names[IT_INDEX_BASE] = "IT_INDEX_BASE";
|
||||
g_names[IT_DRAW_INDEX_2] = "IT_DRAW_INDEX_2";
|
||||
g_names[IT_CONTEXT_CONTROL] = "IT_CONTEXT_CONTROL";
|
||||
g_names[IT_INDEX_TYPE] = "IT_INDEX_TYPE";
|
||||
g_names[IT_DRAW_INDIRECT_MULTI] = "IT_DRAW_INDIRECT_MULTI";
|
||||
g_names[IT_DRAW_INDEX_AUTO] = "IT_DRAW_INDEX_AUTO";
|
||||
g_names[IT_NUM_INSTANCES] = "IT_NUM_INSTANCES";
|
||||
g_names[IT_INDIRECT_BUFFER_CNST] = "IT_INDIRECT_BUFFER_CNST";
|
||||
g_names[IT_DRAW_INDEX_OFFSET_2] = "IT_DRAW_INDEX_OFFSET_2";
|
||||
g_names[IT_WRITE_DATA] = "IT_WRITE_DATA";
|
||||
g_names[IT_MEM_SEMAPHORE] = "IT_MEM_SEMAPHORE";
|
||||
g_names[IT_DRAW_INDEX_INDIRECT_MULTI] = "IT_DRAW_INDEX_INDIRECT_MULTI";
|
||||
g_names[IT_INDIRECT_BUFFER] = "IT_INDIRECT_BUFFER";
|
||||
g_names[IT_COPY_DATA] = "IT_COPY_DATA";
|
||||
g_names[IT_CP_DMA] = "IT_CP_DMA";
|
||||
g_names[IT_PFP_SYNC_ME] = "IT_PFP_SYNC_ME";
|
||||
g_names[IT_SURFACE_SYNC] = "IT_SURFACE_SYNC";
|
||||
g_names[IT_EVENT_WRITE] = "IT_EVENT_WRITE";
|
||||
g_names[IT_EVENT_WRITE_EOP] = "IT_EVENT_WRITE_EOP";
|
||||
g_names[IT_EVENT_WRITE_EOS] = "IT_EVENT_WRITE_EOS";
|
||||
g_names[IT_RELEASE_MEM] = "IT_RELEASE_MEM";
|
||||
g_names[IT_DMA_DATA] = "IT_DMA_DATA";
|
||||
g_names[IT_ACQUIRE_MEM] = "IT_ACQUIRE_MEM";
|
||||
g_names[IT_REWIND] = "IT_REWIND";
|
||||
g_names[IT_SET_SH_REG_INDIRECT] = "IT_SET_SH_REG_INDIRECT";
|
||||
g_names[IT_SET_UCONFIG_REG_INDIRECT] = "IT_SET_UCONFIG_REG_INDIRECT";
|
||||
g_names[IT_SET_CONFIG_REG] = "IT_SET_CONFIG_REG";
|
||||
g_names[IT_SET_CONTEXT_REG] = "IT_SET_CONTEXT_REG";
|
||||
g_names[IT_SET_SH_REG] = "IT_SET_SH_REG";
|
||||
g_names[IT_SET_QUEUE_REG] = "IT_SET_QUEUE_REG";
|
||||
g_names[IT_SET_UCONFIG_REG] = "IT_SET_UCONFIG_REG";
|
||||
g_names[IT_SET_UCONFIG_REG_INDEX] = "IT_SET_UCONFIG_REG_INDEX";
|
||||
g_names[IT_WRITE_CONST_RAM] = "IT_WRITE_CONST_RAM";
|
||||
g_names[IT_DUMP_CONST_RAM] = "IT_DUMP_CONST_RAM";
|
||||
g_names[IT_INCREMENT_CE_COUNTER] = "IT_INCREMENT_CE_COUNTER";
|
||||
g_names[IT_INCREMENT_DE_COUNTER] = "IT_INCREMENT_DE_COUNTER";
|
||||
g_names[IT_WAIT_ON_CE_COUNTER] = "IT_WAIT_ON_CE_COUNTER";
|
||||
g_names[IT_WAIT_ON_DE_COUNTER_DIFF] = "IT_WAIT_ON_DE_COUNTER_DIFF";
|
||||
g_names[IT_DISPATCH_DRAW_PREAMBLE] = "IT_DISPATCH_DRAW_PREAMBLE";
|
||||
g_names[IT_DISPATCH_DRAW] = "IT_DISPATCH_DRAW";
|
||||
g_names[IT_GET_LOD_STATS] = "IT_GET_LOD_STATS";
|
||||
g_names[IT_SET_CONTEXT_REG_INDIRECT] = "IT_SET_CONTEXT_REG_INDIRECT";
|
||||
|
||||
g_names_initialized = true;
|
||||
}
|
||||
}
|
||||
|
||||
void DumpPm4PacketStream(Common::File* file, uint32_t* cmd_buffer, uint32_t start_dw,
|
||||
uint32_t num_dw) {
|
||||
InitNames();
|
||||
|
||||
// db_dump();
|
||||
|
||||
file->Printf("----- Buffer --- dwords: 0x%05" PRIx32 ", offset : %u, addr: %016" PRIx64
|
||||
" ----- \n",
|
||||
num_dw, start_dw, reinterpret_cast<uint64_t>(cmd_buffer));
|
||||
|
||||
auto* cmd = cmd_buffer + start_dw;
|
||||
auto dw = num_dw;
|
||||
while (dw != 0) {
|
||||
EXIT_NOT_IMPLEMENTED(dw < 2);
|
||||
EXIT_NOT_IMPLEMENTED(dw > num_dw);
|
||||
|
||||
auto cmd_id = *cmd++;
|
||||
|
||||
file->Printf("%05" PRIx32 " | 0x%08" PRIx32 " | ", start_dw, cmd_id);
|
||||
|
||||
uint32_t len = 0;
|
||||
|
||||
if ((cmd_id & 0xC0000000u) == 0xC0000000u) {
|
||||
const bool sh_gx = (cmd_id & 0x2u) == 0;
|
||||
const uint8_t op = ((cmd_id >> 8u) & 0xffu);
|
||||
const auto r = KYTY_PM4_R(cmd_id);
|
||||
len = ((cmd_id >> 16u) & 0x3fffu) + 1;
|
||||
|
||||
file->Printf("%s %s(OP:0x%02" PRIx8 ") SH:%s CNT:%u\n", g_names[op],
|
||||
(op == IT_NOP ? g_r_names[r] : ""), op, sh_gx ? "GX" : "CX", len);
|
||||
|
||||
for (uint32_t i = 0; i < len; i++) {
|
||||
file->Printf(" | 0x%08" PRIx32 " | \n", cmd[i]);
|
||||
}
|
||||
|
||||
if ((op == IT_SET_CONTEXT_REG_INDIRECT || op == IT_SET_SH_REG_INDIRECT ||
|
||||
op == IT_SET_UCONFIG_REG_INDIRECT) &&
|
||||
len == 4) {
|
||||
auto* indirect_buffer =
|
||||
reinterpret_cast<uint32_t*>((static_cast<uint64_t>(cmd[0]) & 0xfffffffcu) |
|
||||
(static_cast<uint64_t>(cmd[1]) << 32u));
|
||||
const uint32_t indirect_num_regs = cmd[3] & 0x3fffu;
|
||||
|
||||
for (uint32_t i = 0; indirect_buffer != nullptr && i < indirect_num_regs;
|
||||
i++, indirect_buffer += 2) {
|
||||
file->Printf(" | | offset = 0x%08" PRIx32
|
||||
", value = 0x%08" PRIx32 "\n",
|
||||
indirect_buffer[0], indirect_buffer[1]);
|
||||
}
|
||||
}
|
||||
} else {
|
||||
file->Printf("?????\n");
|
||||
}
|
||||
|
||||
cmd += len;
|
||||
dw -= len + 1;
|
||||
start_dw += len + 1;
|
||||
}
|
||||
}
|
||||
|
||||
} // namespace Libs::Graphics::Pm4
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,104 @@
|
||||
#ifndef EMULATOR_INCLUDE_EMULATOR_GRAPHICS_TILE_H_
|
||||
#define EMULATOR_INCLUDE_EMULATOR_GRAPHICS_TILE_H_
|
||||
|
||||
#include "common/abi.h"
|
||||
#include "common/common.h"
|
||||
|
||||
namespace Libs::Graphics {
|
||||
|
||||
enum class TileMode {
|
||||
VideoOutLinear,
|
||||
VideoOutTiled,
|
||||
TextureLinear,
|
||||
TextureTiled,
|
||||
// RenderTextureLinear,
|
||||
// RenderTextureTiled,
|
||||
};
|
||||
|
||||
struct TileSizeAlign {
|
||||
uint32_t size = 0;
|
||||
uint32_t align = 0;
|
||||
};
|
||||
|
||||
struct TileSizeOffset {
|
||||
uint32_t size = 0;
|
||||
uint32_t offset = 0;
|
||||
uint32_t src_size = 0;
|
||||
uint32_t src_offset = 0;
|
||||
uint32_t x = 0;
|
||||
uint32_t y = 0;
|
||||
};
|
||||
|
||||
struct TilePaddedSize {
|
||||
uint32_t width = 0;
|
||||
uint32_t height = 0;
|
||||
};
|
||||
|
||||
void TileInit();
|
||||
void TileConvertTiledToLinear(void* dst, const void* src, TileMode mode, uint32_t width,
|
||||
uint32_t height);
|
||||
void TileConvertTiledToLinearRenderTarget(void* dst, const void* src, uint32_t width,
|
||||
uint32_t height, uint32_t pitch,
|
||||
uint32_t bytes_per_element, uint64_t size,
|
||||
uint64_t src_size = 0, uint32_t src_x = 0,
|
||||
uint32_t src_y = 0);
|
||||
void TileConvertLinearToTiledRenderTarget(void* dst, const void* src, uint32_t width,
|
||||
uint32_t height, uint32_t pitch,
|
||||
uint32_t bytes_per_element, uint64_t size);
|
||||
void TileConvertTiledToLinearStandard64KB(void* dst, const void* src, uint32_t format,
|
||||
uint32_t width, uint32_t height, uint32_t pitch,
|
||||
uint64_t size, uint64_t src_size = 0, uint32_t src_x = 0,
|
||||
uint32_t src_y = 0);
|
||||
void TileConvertTiledToLinearStandard64KB32(void* dst, const void* src, uint32_t width,
|
||||
uint32_t height, uint32_t pitch, uint64_t size,
|
||||
uint64_t src_size = 0, uint32_t src_x = 0,
|
||||
uint32_t src_y = 0);
|
||||
void TileConvertTiledToLinearStandard64KB16(void* dst, const void* src, uint32_t width,
|
||||
uint32_t height, uint32_t pitch, uint64_t size,
|
||||
uint64_t src_size = 0, uint32_t src_x = 0,
|
||||
uint32_t src_y = 0);
|
||||
void TileConvertTiledToLinearDepth(void* dst, const void* src, uint32_t format, uint32_t width,
|
||||
uint32_t height, uint32_t pitch, uint64_t size);
|
||||
void TileConvertLinearToTiledDepth(void* dst, const void* src, uint32_t format, uint32_t width,
|
||||
uint32_t height, uint32_t pitch, uint64_t size);
|
||||
void TileConvertTiledToLinearStandard4KB(void* dst, const void* src, uint32_t format,
|
||||
uint32_t width, uint32_t height, uint32_t pitch,
|
||||
uint64_t dst_size, uint64_t src_size, uint32_t src_x = 0,
|
||||
uint32_t src_y = 0);
|
||||
void TileConvertTiledToLinearStandard256B(void* dst, const void* src, uint32_t format,
|
||||
uint32_t width, uint32_t height, uint32_t pitch,
|
||||
uint64_t dst_size, uint64_t src_size);
|
||||
bool TileIsStandard256BTextureSupported(uint32_t format);
|
||||
bool TileIsStandard4KBTextureSupported(uint32_t format);
|
||||
bool TileIsStandard64KBTextureSupported(uint32_t format);
|
||||
bool TileGetStandard4KBVolumeLayout(uint32_t format, uint32_t* bytes_per_element,
|
||||
uint32_t* texels_per_element_wide,
|
||||
uint32_t* texels_per_element_tall, uint32_t* block_width_log2,
|
||||
uint32_t* block_height_log2, uint32_t* block_depth_log2);
|
||||
|
||||
bool TileGetDepthSize(uint32_t width, uint32_t height, uint32_t pitch, uint32_t z_format,
|
||||
uint32_t stencil_format, bool htile, TileSizeAlign* stencil_size,
|
||||
TileSizeAlign* htile_size, TileSizeAlign* depth_size);
|
||||
uint32_t TileGetRenderTargetPitch(uint32_t width, uint32_t bytes_per_element);
|
||||
bool TileGetRenderTargetSize(uint32_t width, uint32_t height, uint32_t pitch,
|
||||
uint32_t bytes_per_element, TileSizeAlign* total_size);
|
||||
bool TileGetRenderTargetMipLayout(uint32_t width, uint32_t height, uint32_t pitch,
|
||||
uint32_t bytes_per_element, uint32_t levels,
|
||||
TileSizeAlign* total_size, TileSizeOffset* level_sizes,
|
||||
TilePaddedSize* padded_size);
|
||||
void TileGetTextureSize(uint32_t format, uint32_t width, uint32_t height, uint32_t pitch,
|
||||
uint32_t levels, uint32_t tile, TileSizeAlign* total_size,
|
||||
TileSizeOffset* level_sizes, TilePaddedSize* padded_size);
|
||||
void TileGetTextureTotalSize(uint32_t format, uint32_t width, uint32_t height, uint32_t depth,
|
||||
uint32_t pitch, uint32_t levels, uint32_t tile, bool volume_texture,
|
||||
TileSizeAlign* total_size);
|
||||
uint32_t TileGetTexturePitch(uint32_t format, uint32_t width, uint32_t levels, uint32_t tile);
|
||||
void TileConvertTiledToLinearStandard4KB3D(void* dst, const void* src, uint32_t format,
|
||||
uint32_t width, uint32_t height, uint32_t depth,
|
||||
uint32_t pitch, uint64_t dst_slice_stride,
|
||||
uint64_t dst_size, uint64_t src_size,
|
||||
bool clear_dst = true);
|
||||
|
||||
} // namespace Libs::Graphics
|
||||
|
||||
#endif /* EMULATOR_INCLUDE_EMULATOR_GRAPHICS_TILE_H_ */
|
||||
Reference in New Issue
Block a user