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shader: emit 16-bit packs with a zero high lane as a mask

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nmzik
2026-10-25 04:06:12 +01:00
parent 463a096249
commit 153dadd0b3
2 changed files with 25 additions and 0 deletions
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src/graphics/shader/recompiler/frontend/translate/Convert.cpp
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@@ -135,6 +135,8 @@ void Translator::V_PACK_B32_F16(const Decoder::Instruction& inst) {
}
IR::U32 Translator::PackU16Lanes(IR::U32 low, IR::U32 high) {
// A zero high lane zero-extends; descriptor tracking bounds a mask, not a bitfield insert.
if (high == IR::Value(0u)) return ir.BitwiseAnd(low, IR::U32(IR::Value(0xffffu)));
return IR::U32(
ir.Emit(IR::ValueOpcode::BitFieldInsert, {low, high, IR::Value(16u), IR::Value(16u)}));
}