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shader: accept SDWA byte source for reverse shift
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@@ -13677,6 +13677,32 @@ TestCase Vop2SdwaAshrrevCapturedWord0SignExtends() {
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return test;
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}
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TestCase Vop2SdwaLshrrevCapturedByte1Source() {
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using O = ShaderOpcode;
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std::vector<u32> code;
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AppendSMovLiteral(&code, 106, 4);
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AppendBufferLoadDword(&code, 8, 30);
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code.push_back(0x2c1210f9u);
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code.push_back(0x0186066au); // v_lshrrev_b32 v9, vcc_lo, v8.byte1
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AppendStoreVgpr(&code, 9, 1);
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AppendEnd(&code);
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TestCase test;
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test.name = "Vop2SdwaLshrrevCapturedByte1Source";
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test.code = std::move(code);
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test.initial = {0x12348678u, 0};
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test.expected = {0x12348678u, 8};
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test.opcodes = {O::S_MOV_B32, O::BUFFER_LOAD_DWORD, O::V_LSHRREV_B32,
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O::V_MOV_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM};
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test.decoded_counts = {
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{"V_LSHRREV_B32 v9, vcc_lo, v8.sdwa(sel=1,sext=0)", 1}};
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test.ir_counts = {{" = BitFieldUExtract ", 1},
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{" = ShiftRightLogical32 ", 1}};
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test.required_spirv = {"OpBitFieldUExtract", "OpShiftRightLogical"};
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return test;
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}
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TestCase Vop2SdwaSubNcPreservesByteAndWordDestinations() {
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using O = ShaderOpcode;
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@@ -21141,6 +21167,7 @@ std::vector<TestCase> MakeCases() {
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AddCase(Vop2SdwaSubNcExactByte2Destination);
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AddCase(Vop2SdwaAddNcCapturedHighWordDestination);
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AddCase(Vop2SdwaAshrrevCapturedWord0SignExtends);
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AddCase(Vop2SdwaLshrrevCapturedByte1Source);
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AddCase(Vop2SdwaSubNcPreservesByteAndWordDestinations);
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AddCase(Vop3CvtPkI16I32Captured);
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AddCase(Vop3Med3I16Captured);
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