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shader: support DS_READ_U16_D16_HI (#356)
Decode the high-half D16 LDS read and route it through the existing unsigned-short load lowering. Represent the destination as a high-half partial write so the low 16 bits of the VGPR remain intact. Add captured-instruction decode coverage and a Vulkan execution regression that verifies the preserved half. Co-authored-by: SueryRD <the.ai.tester2@gmail.com>
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@@ -104,6 +104,7 @@ constexpr MemoryOpcodeInfo DS_OPCODE_LIST[] = {
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{0x4fu, Opcode::DS_WRITE2ST64_B64, 4, 32}, {0x76u, Opcode::DS_READ_B64, 2, 32},
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{0x77u, Opcode::DS_READ2_B64, 4, 32}, {0x78u, Opcode::DS_READ2ST64_B64, 4, 32},
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{0xa6u, Opcode::DS_READ_U16_D16, 1, 16},
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{0xa7u, Opcode::DS_READ_U16_D16_HI, 1, 16},
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{0xb0u, Opcode::DS_WRITE_ADDTID_B32, 1, 32}, {0xb1u, Opcode::DS_READ_ADDTID_B32, 1, 32},
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{0xdeu, Opcode::DS_WRITE_B96, 3, 32}, {0xdfu, Opcode::DS_WRITE_B128, 4, 32},
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{0xfeu, Opcode::DS_READ_B96, 3, 32}, {0xffu, Opcode::DS_READ_B128, 4, 32},
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@@ -421,10 +422,11 @@ void DecodeDs(uint32_t pc, std::span<const uint32_t> code, uint32_t word_index,
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}
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DecodeVectorGpr(vdst, inst.dst);
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if (inst.opcode == Opcode::DS_READ_U16_D16) {
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if (inst.opcode == Opcode::DS_READ_U16_D16 ||
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inst.opcode == Opcode::DS_READ_U16_D16_HI) {
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// Native D16 reads update only the selected destination half. Reuse the partial
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// destination representation so typed IR translation preserves the upper word.
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inst.dst.sdwa_sel = 4u;
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// destination representation so typed IR translation preserves the other half.
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inst.dst.sdwa_sel = inst.opcode == Opcode::DS_READ_U16_D16 ? 4u : 5u;
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}
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DecodeVectorGpr(addr, inst.src0);
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DecodeVectorGpr(data0, inst.src1);
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@@ -497,6 +497,7 @@ enum class Opcode {
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DS_READ_I16,
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DS_READ_U16,
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DS_READ_U16_D16,
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DS_READ_U16_D16_HI,
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DS_READ2_B32,
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DS_READ2ST64_B32,
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DS_READ_B32,
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@@ -1050,6 +1050,7 @@ bool Translator::EmitMemory(const Decoder::Instruction& inst, std::string* error
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case Decoder::Opcode::DS_READ_I16:
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case Decoder::Opcode::DS_READ_U16:
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case Decoder::Opcode::DS_READ_U16_D16:
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case Decoder::Opcode::DS_READ_U16_D16_HI:
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case Decoder::Opcode::DS_READ_B32:
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case Decoder::Opcode::DS_READ_B64:
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case Decoder::Opcode::DS_READ_B96:
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