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shader: support DS_READ_U16_D16_HI (#356)
Decode the high-half D16 LDS read and route it through the existing unsigned-short load lowering. Represent the destination as a high-half partial write so the low 16 bits of the VGPR remain intact. Add captured-instruction decode coverage and a Vulkan execution regression that verifies the preserved half. Co-authored-by: SueryRD <the.ai.tester2@gmail.com>
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@@ -12018,6 +12018,7 @@ CoverageClass ClassifyOpcode(ShaderOpcode opcode,
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case Opcode::DS_READ_I16:
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case Opcode::DS_READ_U16:
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case Opcode::DS_READ_U16_D16:
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case Opcode::DS_READ_U16_D16_HI:
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case Opcode::DS_READ2_B32:
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case Opcode::DS_READ_B32:
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case Opcode::DS_READ_B64:
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@@ -18038,6 +18039,33 @@ TestCase DsReadU16D16CapturedPreservesHighHalf() {
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return test;
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}
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TestCase DsReadU16D16HiCapturedPreservesLowHalf() {
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using O = ShaderOpcode;
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std::vector<u32> code;
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AppendVMovU32(&code, 1, 0);
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AppendVMovLiteral(&code, 2, 0x89abcdefu);
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code.push_back(EncodeDs0(0x0d));
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code.push_back(EncodeDs1(0, 2, 1)); // ds_write_b32 v2, v1
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AppendVMovLiteral(&code, 5, 0x12345678u);
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AppendVMovU32(&code, 6, 0);
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code.push_back(0xda9c0000u);
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code.push_back(0x05000006u); // captured ds_read_u16_d16_hi v5, v6
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AppendStoreVgpr(&code, 5, 0);
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AppendEnd(&code);
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TestCase test{"DsReadU16D16HiCapturedPreservesLowHalf",
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code,
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std::vector<u32>(1, 0),
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{0xcdef5678u},
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{O::V_MOV_B32, O::DS_WRITE_B32, O::DS_READ_U16_D16_HI,
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O::BUFFER_STORE_DWORD, O::S_ENDPGM}};
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test.decoded_counts = {{"DS_READ_U16_D16_HI", 1}};
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return test;
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}
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TestCase DsReadWrite2Variants() {
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using O = ShaderOpcode;
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@@ -20556,6 +20584,7 @@ std::vector<TestCase> MakeCases() {
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AddCase(FlatStoreVariants);
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AddCase(DsReadWriteVariants);
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AddCase(DsReadU16D16CapturedPreservesHighHalf);
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AddCase(DsReadU16D16HiCapturedPreservesLowHalf);
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AddCase(DsAppendConsumeUsesEncodedLdsSelector);
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AddCase(DsAppendUsesEncodedGdsSelector);
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AddCase(DsGdsSubdwordAndAtomicWrites);
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