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shader: mask V_MAD_U64_U32 carry-out bits of lanes outside EXEC
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@@ -291,7 +291,7 @@ void Translator::V_MAD_U64_U32(const Decoder::Instruction& inst) {
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inst.dst2.kind != Decoder::OperandKind::Unknown) {
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// The 32x32 product fits in 64 bits, so only the addition can carry.
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const auto carry = IR::U1(ir.Emit(IR::ValueOpcode::ULessThan64, {result, product}));
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WriteMask(inst.dst2, carry, VectorMask(carry));
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WriteVectorMask(inst.dst2, carry);
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}
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}
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