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graphics: implement RDNA2 64-bit first-set-bit

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This commit is contained in:
nmzik
2026-08-15 09:51:57 +02:00
parent 0ffacf22e6
commit 28a913894d
8 changed files with 58 additions and 23 deletions
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src/graphics/shader/recompiler/frontend/decode/ScalarAluOps.cpp
+11 -21
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@@ -27,27 +27,17 @@ constexpr OpcodeMap SOP2_OPS[] = {
};
constexpr OpcodeMap SOP1_OPS[] = {
{0x03u, Opcode::SMovB32},
{0x04u, Opcode::SMovB64},
{0x07u, Opcode::SNotB32},
{0x08u, Opcode::SNotB64},
{0x0au, Opcode::SWqmB64},
{0x0bu, Opcode::SBrevB32},
{0x0fu, Opcode::SBcnt1I32B32},
{0x10u, Opcode::SBcnt1I32B64},
{0x13u, Opcode::SFf1I32B32},
{0x16u, Opcode::SFlbitI32B64},
{0x1bu, Opcode::SBitset0B32},
{0x1du, Opcode::SBitset1B32},
{0x1fu, Opcode::SGetpcB64},
{0x20u, Opcode::SSetpcB64},
{0x24u, Opcode::SAndSaveexecB64},
{0x28u, Opcode::SOrn2SaveexecB64},
{0x34u, Opcode::SAbsI32},
{0x37u, Opcode::SAndn1SaveexecB64},
{0x3bu, Opcode::SBitreplicateB64B32},
{0x3cu, Opcode::SAndSaveexecB32},
{0x44u, Opcode::SAndn1SaveexecB32},
{0x03u, Opcode::SMovB32}, {0x04u, Opcode::SMovB64},
{0x07u, Opcode::SNotB32}, {0x08u, Opcode::SNotB64},
{0x0au, Opcode::SWqmB64}, {0x0bu, Opcode::SBrevB32},
{0x0fu, Opcode::SBcnt1I32B32}, {0x10u, Opcode::SBcnt1I32B64},
{0x13u, Opcode::SFf1I32B32}, {0x14u, Opcode::SFf1I32B64},
{0x16u, Opcode::SFlbitI32B64}, {0x1bu, Opcode::SBitset0B32},
{0x1du, Opcode::SBitset1B32}, {0x1fu, Opcode::SGetpcB64},
{0x20u, Opcode::SSetpcB64}, {0x24u, Opcode::SAndSaveexecB64},
{0x28u, Opcode::SOrn2SaveexecB64}, {0x34u, Opcode::SAbsI32},
{0x37u, Opcode::SAndn1SaveexecB64}, {0x3bu, Opcode::SBitreplicateB64B32},
{0x3cu, Opcode::SAndSaveexecB32}, {0x44u, Opcode::SAndn1SaveexecB32},
};
constexpr OpcodeMap SOPC_OPS[] = {
src/graphics/shader/recompiler/frontend/decode/ShaderDecoder.cpp
+2
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@@ -446,6 +446,7 @@ std::string OpcodeToString(Opcode opcode) {
case Opcode::SBcnt1I32B32: return "s_bcnt1_i32_b32";
case Opcode::SBcnt1I32B64: return "s_bcnt1_i32_b64";
case Opcode::SFf1I32B32: return "s_ff1_i32_b32";
case Opcode::SFf1I32B64: return "s_ff1_i32_b64";
case Opcode::SFlbitI32B64: return "s_flbit_i32_b64";
case Opcode::SBitreplicateB64B32: return "s_bitreplicate_b64_b32";
case Opcode::SGetpcB64: return "s_getpc_b64";
@@ -1017,6 +1018,7 @@ std::string InstructionToString(const Instruction& inst) {
case Opcode::SBrevB32:
case Opcode::SBcnt1I32B32:
case Opcode::SFf1I32B32:
case Opcode::SFf1I32B64:
case Opcode::SNotB64:
case Opcode::SWqmB64:
case Opcode::SAndSaveexecB32:
src/graphics/shader/recompiler/frontend/decode/ShaderDecoder.h
+1
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@@ -43,6 +43,7 @@ enum class Opcode {
SBcnt1I32B32,
SBcnt1I32B64,
SFf1I32B32,
SFf1I32B64,
SFlbitI32B64,
SBitreplicateB64B32,
SGetpcB64,
src/graphics/shader/recompiler/frontend/translate/Integer.cpp
+10
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@@ -320,6 +320,16 @@ bool Translator::TranslateComposedInteger(const IR::Instruction& inst) {
result = ir.BitwiseXor(ir.BitwiseXor(ReadU32(inst.src[0]), ReadU32(inst.src[1])),
ReadU32(inst.src[2]));
break;
case IR::Opcode::FindLsbU64: {
const auto source = UnpackU64(ReadU64(inst.src[0]));
const auto low_lsb = IR::U32(ir.Emit(IR::ValueOpcode::FindILsb32, {source[0]}));
const auto high_lsb = IR::U32(ir.Emit(IR::ValueOpcode::FindILsb32, {source[1]}));
const auto high_position = ir.IAdd(high_lsb, IR::U32(IR::Value(32u)));
result = ir.Select(ir.INotEqual(source[0], IR::U32(IR::Value(0u))), low_lsb,
ir.Select(ir.INotEqual(source[1], IR::U32(IR::Value(0u))),
high_position, IR::U32(IR::Value(0xffffffffu))));
break;
}
case IR::Opcode::FindMsbFromHighU32: {
const auto source = ReadU32(inst.src[0]);
const auto msb = IR::U32(ir.Emit(IR::ValueOpcode::FindUMsb32, {source}));
src/graphics/shader/recompiler/ir/opcodes/ShaderIROpcodes.cpp
+1
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@@ -25,6 +25,7 @@ constexpr LowerMap LOWER_OPS[] = {
{Decoder::Opcode::SBcnt1I32B32, Opcode::BitCountU32},
{Decoder::Opcode::SBcnt1I32B64, Opcode::BitCountU64},
{Decoder::Opcode::SFf1I32B32, Opcode::FindLsbU32},
{Decoder::Opcode::SFf1I32B64, Opcode::FindLsbU64},
{Decoder::Opcode::SFlbitI32B64, Opcode::FindMsbFromHighU64},
{Decoder::Opcode::SBitreplicateB64B32, Opcode::BitReplicateB64B32},
{Decoder::Opcode::SNotB32, Opcode::BitwiseNotU32},
src/graphics/shader/recompiler/ir/opcodes/ShaderIROpcodes.inc
+1
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@@ -82,6 +82,7 @@ IR_OPCODE(BitCountAddU32, General, ExtendedInteger)
IR_OPCODE(MaskedBitCountLowU32, General, ExtendedInteger)
IR_OPCODE(MaskedBitCountHighU32, General, ExtendedInteger)
IR_OPCODE(FindLsbU32, General, SimpleInteger)
IR_OPCODE(FindLsbU64, General, ComposedInteger)
IR_OPCODE(FindMsbFromHighU32, General, ComposedInteger)
IR_OPCODE(FindMsbFromHighU64, General, ComposedInteger)
IR_OPCODE(BitFieldMaskU32, General, ExtendedInteger)