shader: support RDNA2 high-half short buffer stores

Co-authored-by: fxpw <fxpw@outlook.com>
This commit is contained in:
nmzik
2026-10-14 20:55:50 +02:00
parent 6b1c4a7a71
commit 2f6ee0e91d
6 changed files with 59 additions and 17 deletions
@@ -44,6 +44,7 @@ constexpr MemoryOpcodeInfo MUBUF_OPCODE_LIST[] = {
{0x18u, Opcode::BUFFER_STORE_BYTE, 1, 8},
{0x19u, Opcode::BUFFER_STORE_BYTE_D16_HI, 1, 8},
{0x1au, Opcode::BUFFER_STORE_SHORT, 1, 16},
{0x1bu, Opcode::BUFFER_STORE_SHORT_D16_HI, 1, 16},
{0x1cu, Opcode::BUFFER_STORE_DWORD, 1, 32},
{0x1du, Opcode::BUFFER_STORE_DWORDX2, 2, 32},
{0x1eu, Opcode::BUFFER_STORE_DWORDX4, 4, 32},
@@ -319,6 +320,8 @@ void DecodeMubuf(uint32_t pc, std::span<const uint32_t> code, uint32_t word_inde
inst.dst.sdwa_sel = inst.opcode == Opcode::BUFFER_LOAD_SHORT_D16_HI ? 5u : 4u;
} else if (inst.opcode == Opcode::BUFFER_STORE_BYTE_D16_HI) {
inst.dst.sdwa_sel = 2u;
} else if (inst.opcode == Opcode::BUFFER_STORE_SHORT_D16_HI) {
inst.dst.sdwa_sel = 5u;
}
DecodeVectorGpr(vaddr, inst.src0);
DecodeScalarSource(srsrc * 4u, pc, inst.src1);
@@ -650,6 +650,7 @@ std::string InstructionToString(const Instruction& inst) {
case Opcode::BUFFER_STORE_BYTE:
case Opcode::BUFFER_STORE_BYTE_D16_HI:
case Opcode::BUFFER_STORE_SHORT:
case Opcode::BUFFER_STORE_SHORT_D16_HI:
case Opcode::BUFFER_STORE_DWORD:
case Opcode::BUFFER_STORE_DWORDX2:
case Opcode::BUFFER_STORE_DWORDX3:
@@ -568,6 +568,7 @@ enum class Opcode {
BUFFER_STORE_BYTE,
BUFFER_STORE_BYTE_D16_HI,
BUFFER_STORE_SHORT,
BUFFER_STORE_SHORT_D16_HI,
BUFFER_STORE_DWORD,
BUFFER_STORE_DWORDX2,
BUFFER_STORE_DWORDX3,
@@ -1001,6 +1001,7 @@ void Translator::EmitMemory(const Decoder::Instruction& inst) {
case Decoder::Opcode::BUFFER_STORE_BYTE:
case Decoder::Opcode::BUFFER_STORE_BYTE_D16_HI:
case Decoder::Opcode::BUFFER_STORE_SHORT:
case Decoder::Opcode::BUFFER_STORE_SHORT_D16_HI:
case Decoder::Opcode::BUFFER_STORE_FORMAT_X:
case Decoder::Opcode::BUFFER_STORE_FORMAT_XY:
case Decoder::Opcode::BUFFER_STORE_FORMAT_XYZ: