From 377fb8f50ae04ad951232c5dca78f5a305ee0ccd Mon Sep 17 00:00:00 2001 From: nmzik Date: Tue, 18 Aug 2026 00:31:58 +0200 Subject: [PATCH] shader: use ISA-style decoder opcode names --- .../shader/recompiler/ShaderRecompiler.cpp | 73 +- .../recompiler/frontend/cfg/ShaderCFG.cpp | 78 +- .../recompiler/frontend/decode/ExportOps.cpp | 2 +- .../recompiler/frontend/decode/ImageOps.cpp | 48 +- .../recompiler/frontend/decode/MemoryOps.cpp | 279 ++-- .../recompiler/frontend/decode/OpcodeTable.h | 4 +- .../frontend/decode/ScalarAluOps.cpp | 159 +- .../frontend/decode/ShaderDecoder.cpp | 947 +++-------- .../frontend/decode/ShaderDecoder.h | 1043 ++++++------ .../frontend/decode/VectorAluOps.cpp | 1213 +++++++------- .../shader/recompiler/ir/ShaderIR.cpp | 191 +-- .../shader/recompiler/ir/ShaderIRMemory.cpp | 575 +++---- .../recompiler/ir/opcodes/ShaderIROpcodes.cpp | 952 +++++------ tests/ShaderRecompilerComputeTests.cpp | 1448 ++++++++--------- tests/shaderCfgTests.cpp | 37 +- 15 files changed, 3294 insertions(+), 3755 deletions(-) diff --git a/src/graphics/shader/recompiler/ShaderRecompiler.cpp b/src/graphics/shader/recompiler/ShaderRecompiler.cpp index 75e912204..1a1e0e3b5 100644 --- a/src/graphics/shader/recompiler/ShaderRecompiler.cpp +++ b/src/graphics/shader/recompiler/ShaderRecompiler.cpp @@ -227,19 +227,19 @@ uint32_t DecodedDstSize(const Decoder::Instruction& inst) { } uint32_t EmbeddedFetchDstSize(const Decoder::Instruction& inst) { - return inst.opcode == Decoder::Opcode::VMadU64U32 ? 2u : DecodedDstSize(inst); + return inst.opcode == Decoder::Opcode::V_MAD_U64_U32 ? 2u : DecodedDstSize(inst); } bool EmbeddedFetchHasBranch(Decoder::Opcode opcode) { switch (opcode) { - case Decoder::Opcode::SSetpcB64: - case Decoder::Opcode::SBranch: - case Decoder::Opcode::SCbranchScc0: - case Decoder::Opcode::SCbranchScc1: - case Decoder::Opcode::SCbranchVccz: - case Decoder::Opcode::SCbranchVccnz: - case Decoder::Opcode::SCbranchExecz: - case Decoder::Opcode::SCbranchExecnz: return true; + case Decoder::Opcode::S_SETPC_B64: + case Decoder::Opcode::S_BRANCH: + case Decoder::Opcode::S_CBRANCH_SCC0: + case Decoder::Opcode::S_CBRANCH_SCC1: + case Decoder::Opcode::S_CBRANCH_VCCZ: + case Decoder::Opcode::S_CBRANCH_VCCNZ: + case Decoder::Opcode::S_CBRANCH_EXECZ: + case Decoder::Opcode::S_CBRANCH_EXECNZ: return true; default: return false; } } @@ -288,32 +288,32 @@ bool TryDecodedSmemOffset(const std::array& sgprs, bool IsEmbeddedFetchSLoad(const Decoder::Instruction& inst) { switch (inst.opcode) { - case Decoder::Opcode::SLoadDword: - case Decoder::Opcode::SLoadDwordx2: - case Decoder::Opcode::SLoadDwordx4: - case Decoder::Opcode::SLoadDwordx8: - case Decoder::Opcode::SLoadDwordx16: return true; + case Decoder::Opcode::S_LOAD_DWORD: + case Decoder::Opcode::S_LOAD_DWORDX2: + case Decoder::Opcode::S_LOAD_DWORDX4: + case Decoder::Opcode::S_LOAD_DWORDX8: + case Decoder::Opcode::S_LOAD_DWORDX16: return true; default: return false; } } bool IsEmbeddedFetchBufferLoad(const Decoder::Instruction& inst) { switch (inst.opcode) { - case Decoder::Opcode::BufferLoadFormatX: - case Decoder::Opcode::BufferLoadFormatXy: - case Decoder::Opcode::BufferLoadFormatXyz: - case Decoder::Opcode::BufferLoadFormatXyzw: return true; + case Decoder::Opcode::BUFFER_LOAD_FORMAT_X: + case Decoder::Opcode::BUFFER_LOAD_FORMAT_XY: + case Decoder::Opcode::BUFFER_LOAD_FORMAT_XYZ: + case Decoder::Opcode::BUFFER_LOAD_FORMAT_XYZW: return true; default: return false; } } bool IsEmbeddedFetchAttribPropagationAlu(const Decoder::Instruction& inst) { switch (inst.opcode) { - case Decoder::Opcode::SBfeU32: - case Decoder::Opcode::SAndB32: - case Decoder::Opcode::SAddI32: - case Decoder::Opcode::SAddU32: - case Decoder::Opcode::SLshlB32: return true; + case Decoder::Opcode::S_BFE_U32: + case Decoder::Opcode::S_AND_B32: + case Decoder::Opcode::S_ADD_I32: + case Decoder::Opcode::S_ADD_U32: + case Decoder::Opcode::S_LSHL_B32: return true; default: return false; } } @@ -373,10 +373,11 @@ EmbeddedFetchData DetectEmbeddedVertexFetch(const Decoder::Program& decoded uint32_t sad_zero = 0; const bool vertex_offset_add = vertex_index_accumulator && IsDecodedSgpr(inst.src0) && - ((inst.opcode == Decoder::Opcode::VAddI32 && IsDecodedVgpr(inst.src1) && + ((inst.opcode == Decoder::Opcode::V_ADD_I32 && IsDecodedVgpr(inst.src1) && inst.src1.reg == inst.dst.reg) || - (user_data_base == 8 && inst.dst.reg == 5 && inst.opcode == Decoder::Opcode::VSadU32 && - IsDecodedVgpr(inst.src2) && inst.src2.reg == inst.dst.reg && + (user_data_base == 8 && inst.dst.reg == 5 && + inst.opcode == Decoder::Opcode::V_SAD_U32 && IsDecodedVgpr(inst.src2) && + inst.src2.reg == inst.dst.reg && TryDecodedOperandConstant(sgprs, inst.src1, sad_zero) && sad_zero == 0)); if (data.loads.empty() && vertex_offset_add) { const auto reg = DecodedSgprReg(inst.src0); @@ -389,7 +390,7 @@ EmbeddedFetchData DetectEmbeddedVertexFetch(const Decoder::Program& decoded } } switch (inst.opcode) { - case Decoder::Opcode::VWritelaneB32: { + case Decoder::Opcode::V_WRITELANE_B32: { uint32_t lane = 0; if (IsDecodedVgpr(inst.dst) && inst.dst.reg < vgprs.size()) { vgprs[inst.dst.reg] = {}; @@ -405,7 +406,7 @@ EmbeddedFetchData DetectEmbeddedVertexFetch(const Decoder::Program& decoded } break; } - case Decoder::Opcode::VReadlaneB32: { + case Decoder::Opcode::V_READLANE_B32: { uint32_t lane = 0; if (track_vector_lanes && IsDecodedSgpr(inst.dst) && DecodedSgprReg(inst.dst) < sgprs.size() && IsDecodedVgpr(inst.src0) && @@ -419,7 +420,7 @@ EmbeddedFetchData DetectEmbeddedVertexFetch(const Decoder::Program& decoded } break; } - case Decoder::Opcode::SMovB32: + case Decoder::Opcode::S_MOV_B32: if (IsDecodedSgpr(inst.dst) && IsDecodedSgpr(inst.src0) && DecodedSgprReg(inst.src0) < sgprs.size()) { sgprs[DecodedSgprReg(inst.dst)] = sgprs[DecodedSgprReg(inst.src0)]; @@ -435,7 +436,7 @@ EmbeddedFetchData DetectEmbeddedVertexFetch(const Decoder::Program& decoded } } break; - case Decoder::Opcode::SMovkI32: + case Decoder::Opcode::S_MOVK_I32: if (IsDecodedSgpr(inst.dst)) { auto& dst = sgprs[DecodedSgprReg(inst.dst)]; dst.type = EmbeddedFetchValueType::Constant; @@ -496,7 +497,7 @@ EmbeddedFetchData DetectEmbeddedVertexFetch(const Decoder::Program& decoded } else { ClearEmbeddedFetchSgprs(sgprs, inst.dst, DecodedDstSize(inst)); } - } else if (inst.opcode == Decoder::Opcode::VCndmaskB32) { + } else if (inst.opcode == Decoder::Opcode::V_CNDMASK_B32) { if (IsDecodedVgpr(inst.dst) && inst.dst.reg < vgprs.size()) { ClearEmbeddedFetchVectorLanes(&vector_lanes, inst.dst.reg); } @@ -518,11 +519,11 @@ EmbeddedFetchData DetectEmbeddedVertexFetch(const Decoder::Program& decoded auto& dst = sgprs[DecodedSgprReg(inst.dst)]; dst.type = EmbeddedFetchValueType::Constant; switch (inst.opcode) { - case Decoder::Opcode::SAndB32: dst.value = src0 & src1; break; - case Decoder::Opcode::SLshlB32: + case Decoder::Opcode::S_AND_B32: dst.value = src0 & src1; break; + case Decoder::Opcode::S_LSHL_B32: dst.value = src0 << (src1 & 31u); break; - case Decoder::Opcode::SBfeU32: + case Decoder::Opcode::S_BFE_U32: dst.value = src0 >> (src1 & 31u); break; default: dst.value = src0 + src1; break; @@ -551,9 +552,9 @@ EmbeddedFetchData DetectEmbeddedVertexFetch(const Decoder::Program& decoded } break; } - if (inst.opcode == Decoder::Opcode::VMovreldB32) { + if (inst.opcode == Decoder::Opcode::V_MOVRELD_B32) { vector_lanes.clear(); - } else if (inst.opcode != Decoder::Opcode::VWritelaneB32 && IsDecodedVgpr(inst.dst)) { + } else if (inst.opcode != Decoder::Opcode::V_WRITELANE_B32 && IsDecodedVgpr(inst.dst)) { for (uint32_t i = 0; i < EmbeddedFetchDstSize(inst) && inst.dst.reg + i < vgprs.size(); i++) { ClearEmbeddedFetchVectorLanes(&vector_lanes, inst.dst.reg + i); diff --git a/src/graphics/shader/recompiler/frontend/cfg/ShaderCFG.cpp b/src/graphics/shader/recompiler/frontend/cfg/ShaderCFG.cpp index 89a146316..2f739806d 100644 --- a/src/graphics/shader/recompiler/frontend/cfg/ShaderCFG.cpp +++ b/src/graphics/shader/recompiler/frontend/cfg/ShaderCFG.cpp @@ -52,17 +52,17 @@ uint32_t ProgramEndPc(const Decoder::Program& program) { } bool IsUnconditionalBranch(Opcode opcode) { - return opcode == Opcode::SBranch; + return opcode == Opcode::S_BRANCH; } bool IsConditionalBranch(Opcode opcode) { switch (opcode) { - case Opcode::SCbranchScc0: - case Opcode::SCbranchScc1: - case Opcode::SCbranchVccz: - case Opcode::SCbranchVccnz: - case Opcode::SCbranchExecz: - case Opcode::SCbranchExecnz: return true; + case Opcode::S_CBRANCH_SCC0: + case Opcode::S_CBRANCH_SCC1: + case Opcode::S_CBRANCH_VCCZ: + case Opcode::S_CBRANCH_VCCNZ: + case Opcode::S_CBRANCH_EXECZ: + case Opcode::S_CBRANCH_EXECNZ: return true; default: return false; } } @@ -73,13 +73,13 @@ bool IsBranch(Opcode opcode) { BranchCondition ConditionForOpcode(Opcode opcode) { switch (opcode) { - case Opcode::SBranch: return BranchCondition::Always; - case Opcode::SCbranchScc0: return BranchCondition::SccZero; - case Opcode::SCbranchScc1: return BranchCondition::SccNonZero; - case Opcode::SCbranchVccz: return BranchCondition::VccZero; - case Opcode::SCbranchVccnz: return BranchCondition::VccNonZero; - case Opcode::SCbranchExecz: return BranchCondition::ExecZero; - case Opcode::SCbranchExecnz: return BranchCondition::ExecNonZero; + case Opcode::S_BRANCH: return BranchCondition::Always; + case Opcode::S_CBRANCH_SCC0: return BranchCondition::SccZero; + case Opcode::S_CBRANCH_SCC1: return BranchCondition::SccNonZero; + case Opcode::S_CBRANCH_VCCZ: return BranchCondition::VccZero; + case Opcode::S_CBRANCH_VCCNZ: return BranchCondition::VccNonZero; + case Opcode::S_CBRANCH_EXECZ: return BranchCondition::ExecZero; + case Opcode::S_CBRANCH_EXECNZ: return BranchCondition::ExecNonZero; default: return BranchCondition::Unknown; } } @@ -161,7 +161,7 @@ bool FindPreviousGetpc(const Decoder::Program& program, uint32_t before_index, u for (uint32_t i = before_index; i > 0; i--) { const uint32_t candidate_index = i - 1u; const auto& candidate = program.instructions[candidate_index]; - if (candidate.opcode == Opcode::SGetpcB64 && IsScalarCode(candidate.dst, dst_code)) { + if (candidate.opcode == Opcode::S_GETPC_B64 && IsScalarCode(candidate.dst, dst_code)) { if (index != nullptr) { *index = candidate_index; } @@ -186,9 +186,9 @@ bool ResolvePcRelativeBase(const Decoder::Program& program, uint32_t before_inde continue; } const bool adds = - candidate.opcode == Opcode::SAddU32 || candidate.opcode == Opcode::SAddI32; + candidate.opcode == Opcode::S_ADD_U32 || candidate.opcode == Opcode::S_ADD_I32; const bool subs = - candidate.opcode == Opcode::SSubU32 || candidate.opcode == Opcode::SSubI32; + candidate.opcode == Opcode::S_SUB_U32 || candidate.opcode == Opcode::S_SUB_I32; if (!adds && !subs) { return false; } @@ -217,7 +217,7 @@ bool ResolvePcRelativeBase(const Decoder::Program& program, uint32_t before_inde const auto& high = program.instructions[candidate_index + 1u]; const Decoder::Operand* high_other = nullptr; uint32_t zero = 0; - if (high.opcode != (adds ? Opcode::SAddcU32 : Opcode::SSubbU32) || + if (high.opcode != (adds ? Opcode::S_ADDC_U32 : Opcode::S_SUBB_U32) || !IsScalarCode(high.dst, base_code + 1u)) { return false; } @@ -288,7 +288,7 @@ bool ResolveJumpTableEntryCount(const Decoder::Program& program, uint32_t before if (!InstructionWritesScalarCode(shift, byte_offset_code)) { continue; } - if (shift.opcode != Opcode::SLshlB32 || !IsScalarCode(shift.dst, byte_offset_code)) { + if (shift.opcode != Opcode::S_LSHL_B32 || !IsScalarCode(shift.dst, byte_offset_code)) { return false; } @@ -307,7 +307,7 @@ bool ResolveJumpTableEntryCount(const Decoder::Program& program, uint32_t before if (!InstructionWritesScalarCode(clamp, index_code)) { continue; } - if (clamp.opcode != Opcode::SMinU32 || !IsScalarCode(clamp.dst, index_code)) { + if (clamp.opcode != Opcode::S_MIN_U32 || !IsScalarCode(clamp.dst, index_code)) { return false; } @@ -350,7 +350,7 @@ bool ResolveSetpcJumpTable(const Decoder::Program& program, uint32_t setpc_index const auto& setpc = program.instructions[setpc_index]; uint32_t pc_reg = 0; - if (setpc.opcode != Opcode::SSetpcB64 || !ScalarOperandCode(setpc.src0, pc_reg) || + if (setpc.opcode != Opcode::S_SETPC_B64 || !ScalarOperandCode(setpc.src0, pc_reg) || setpc.src0.kind != Decoder::OperandKind::Sgpr) { return false; } @@ -358,9 +358,9 @@ bool ResolveSetpcJumpTable(const Decoder::Program& program, uint32_t setpc_index const auto& getpc = program.instructions[setpc_index - 3u]; const auto& add = program.instructions[setpc_index - 2u]; const auto& addc = program.instructions[setpc_index - 1u]; - if (getpc.opcode != Opcode::SGetpcB64 || !IsScalarCode(getpc.dst, pc_reg) || - add.opcode != Opcode::SAddU32 || !IsScalarCode(add.dst, pc_reg) || - addc.opcode != Opcode::SAddcU32 || !IsScalarCode(addc.dst, pc_reg + 1u)) { + if (getpc.opcode != Opcode::S_GETPC_B64 || !IsScalarCode(getpc.dst, pc_reg) || + add.opcode != Opcode::S_ADD_U32 || !IsScalarCode(add.dst, pc_reg) || + addc.opcode != Opcode::S_ADDC_U32 || !IsScalarCode(addc.dst, pc_reg + 1u)) { return false; } @@ -377,7 +377,7 @@ bool ResolveSetpcJumpTable(const Decoder::Program& program, uint32_t setpc_index } uint32_t load_index = 0; - if (!FindPreviousScalarLoad(program, setpc_index - 3u, offset_low_code, Opcode::SLoadDwordx2, + if (!FindPreviousScalarLoad(program, setpc_index - 3u, offset_low_code, Opcode::S_LOAD_DWORDX2, &load_index)) { return false; } @@ -447,7 +447,7 @@ bool ResolveSetpcDwordJumpTable(const Decoder::Program& program, uint32_t setpc_ const auto& setpc = program.instructions[setpc_index]; uint32_t pc_reg = 0; - if (setpc.opcode != Opcode::SSetpcB64 || setpc.src0.kind != Decoder::OperandKind::Sgpr || + if (setpc.opcode != Opcode::S_SETPC_B64 || setpc.src0.kind != Decoder::OperandKind::Sgpr || !ScalarOperandCode(setpc.src0, pc_reg)) { return false; } @@ -455,16 +455,16 @@ bool ResolveSetpcDwordJumpTable(const Decoder::Program& program, uint32_t setpc_ const auto& high_sub = program.instructions[setpc_index - 1u]; uint32_t offset_code = 0; uint32_t zero = 0; - if (low_sub.opcode != Opcode::SSubU32 || !IsScalarCode(low_sub.dst, pc_reg) || + if (low_sub.opcode != Opcode::S_SUB_U32 || !IsScalarCode(low_sub.dst, pc_reg) || !IsScalarCode(low_sub.src0, pc_reg) || !ScalarOperandCode(low_sub.src1, offset_code) || - high_sub.opcode != Opcode::SSubbU32 || !IsScalarCode(high_sub.dst, pc_reg + 1u) || + high_sub.opcode != Opcode::S_SUBB_U32 || !IsScalarCode(high_sub.dst, pc_reg + 1u) || !IsScalarCode(high_sub.src0, pc_reg + 1u) || !IsImmediate(high_sub.src1, zero) || zero != 0u || offset_code == pc_reg || offset_code == pc_reg + 1u) { return false; } uint32_t load_index = 0; - if (!FindPreviousScalarLoad(program, setpc_index - 2u, offset_code, Opcode::SLoadDword, + if (!FindPreviousScalarLoad(program, setpc_index - 2u, offset_code, Opcode::S_LOAD_DWORD, &load_index)) { return false; } @@ -531,7 +531,7 @@ bool ResolveSetpcTarget(const Decoder::Program& program, uint32_t setpc_index, u } const auto& setpc = program.instructions[setpc_index]; - if (setpc.opcode != Opcode::SSetpcB64 || setpc.src0.kind != Decoder::OperandKind::Sgpr) { + if (setpc.opcode != Opcode::S_SETPC_B64 || setpc.src0.kind != Decoder::OperandKind::Sgpr) { return false; } @@ -539,12 +539,12 @@ bool ResolveSetpcTarget(const Decoder::Program& program, uint32_t setpc_index, u if (setpc_index >= 2u) { const auto& arith = program.instructions[setpc_index - 1u]; const auto& getpc = program.instructions[setpc_index - 2u]; - if (getpc.opcode == Opcode::SGetpcB64 && getpc.dst.kind == Decoder::OperandKind::Sgpr && + if (getpc.opcode == Opcode::S_GETPC_B64 && getpc.dst.kind == Decoder::OperandKind::Sgpr && getpc.dst.reg == pc_reg && arith.dst.kind == Decoder::OperandKind::Sgpr && arith.dst.reg == pc_reg) { uint32_t imm = 0; - bool adds = arith.opcode == Opcode::SAddU32 || arith.opcode == Opcode::SAddI32; - bool subs = arith.opcode == Opcode::SSubU32 || arith.opcode == Opcode::SSubI32; + bool adds = arith.opcode == Opcode::S_ADD_U32 || arith.opcode == Opcode::S_ADD_I32; + bool subs = arith.opcode == Opcode::S_SUB_U32 || arith.opcode == Opcode::S_SUB_I32; if ((adds || subs) && (IsRegister(arith.src0, Decoder::OperandKind::Sgpr, pc_reg) || IsRegister(arith.src1, Decoder::OperandKind::Sgpr, pc_reg)) && @@ -558,7 +558,7 @@ bool ResolveSetpcTarget(const Decoder::Program& program, uint32_t setpc_index, u if (setpc_index >= 1u) { const auto& getpc = program.instructions[setpc_index - 1u]; - if (getpc.opcode == Opcode::SGetpcB64 && getpc.dst.kind == Decoder::OperandKind::Sgpr && + if (getpc.opcode == Opcode::S_GETPC_B64 && getpc.dst.kind == Decoder::OperandKind::Sgpr && getpc.dst.reg == pc_reg) { target = InstructionEndPc(getpc); return true; @@ -1619,7 +1619,7 @@ bool BuildGraph(const Decoder::Program& program, Graph& graph, std::string* erro std::set instruction_pcs; for (const auto& inst: program.instructions) { instruction_pcs.insert(inst.pc); - if (inst.opcode == Opcode::Unsupported) { + if (inst.opcode == Opcode::UNSUPPORTED) { SetFailure(graph, FailureKind::UnsupportedInstruction, UINT32_MAX, fmt::format("unsupported decoded instruction in CFG at pc 0x{:08x}: {}", inst.pc, Decoder::InstructionToString(inst).c_str()), @@ -1649,7 +1649,7 @@ bool BuildGraph(const Decoder::Program& program, Graph& graph, std::string* erro if (next_pc <= end_pc) { labels.insert(next_pc); } - } else if (inst.opcode == Opcode::SSetpcB64) { + } else if (inst.opcode == Opcode::S_SETPC_B64) { SetpcTargetInfo target_info; if (!ResolveSetpcTargets(program, i, target_info)) { SetFailure(graph, FailureKind::InvalidBranchTarget, UINT32_MAX, @@ -1675,7 +1675,7 @@ bool BuildGraph(const Decoder::Program& program, Graph& graph, std::string* erro if (next_pc <= end_pc) { labels.insert(next_pc); } - } else if (inst.opcode == Opcode::SEndpgm) { + } else if (inst.opcode == Opcode::S_ENDPGM) { labels.insert(next_pc); } } @@ -1725,11 +1725,11 @@ bool BuildGraph(const Decoder::Program& program, Graph& graph, std::string* erro const auto& last = program.instructions[block.inst_end - 1u]; const auto next_pc = InstructionEndPc(last); - if (last.opcode == Opcode::SEndpgm) { + if (last.opcode == Opcode::S_ENDPGM) { block.terminator.kind = TerminatorKind::Branch; block.terminator.condition = BranchCondition::Always; block.terminator.true_block = pc_to_block.at(end_pc); - } else if (last.opcode == Opcode::SSetpcB64) { + } else if (last.opcode == Opcode::S_SETPC_B64) { const auto& target_info = setpc_targets.at(last.pc); if (target_info.indirect) { block.terminator.kind = TerminatorKind::IndirectBranch; diff --git a/src/graphics/shader/recompiler/frontend/decode/ExportOps.cpp b/src/graphics/shader/recompiler/frontend/decode/ExportOps.cpp index f0d68c1ba..cf1c12d3c 100644 --- a/src/graphics/shader/recompiler/frontend/decode/ExportOps.cpp +++ b/src/graphics/shader/recompiler/frontend/decode/ExportOps.cpp @@ -14,7 +14,7 @@ void DecodeExp(uint32_t pc, std::span code, uint32_t word_index, inst.word_count = 2; inst.family = Family::EXP; inst.opcode_id = target; - inst.opcode = Opcode::Exp; + inst.opcode = Opcode::EXP; inst.exp.target = target; inst.exp.en = en; inst.exp.compr = ((word0 >> 10u) & 1u) != 0; diff --git a/src/graphics/shader/recompiler/frontend/decode/ImageOps.cpp b/src/graphics/shader/recompiler/frontend/decode/ImageOps.cpp index 2f2ddd1ae..ed77da111 100644 --- a/src/graphics/shader/recompiler/frontend/decode/ImageOps.cpp +++ b/src/graphics/shader/recompiler/frontend/decode/ImageOps.cpp @@ -17,7 +17,7 @@ struct MimgSampleInfo { struct MimgGatherInfo { uint32_t encoding = 0; const char* name = nullptr; - Opcode decoded = Opcode::Unsupported; + Opcode decoded = Opcode::UNSUPPORTED; uint32_t flags = 0; uint32_t address_components = 3; }; @@ -25,7 +25,7 @@ struct MimgGatherInfo { struct MimgAtomicInfo { uint32_t encoding = 0; const char* name = nullptr; - Opcode decoded = Opcode::Unsupported; + Opcode decoded = Opcode::UNSUPPORTED; }; constexpr ImageDimension DecodeImageDimension(uint32_t dim) { @@ -178,26 +178,26 @@ constexpr MimgSampleInfo MIMG_SAMPLE_OPCODE_LIST[] = { }; constexpr MimgGatherInfo MIMG_GATHER_OPCODE_LIST[] = { - {0x47u, "image_gather4_lz", Opcode::ImageGather4Lz, ImageSampleFlagLevelZero, 2u}, - {0x48u, "image_gather4_c", Opcode::ImageGather4C, ImageSampleFlagCompare, 3u}, - {0x4fu, "image_gather4_c_lz", Opcode::ImageGather4CLz, + {0x47u, "image_gather4_lz", Opcode::IMAGE_GATHER4_LZ, ImageSampleFlagLevelZero, 2u}, + {0x48u, "image_gather4_c", Opcode::IMAGE_GATHER4_C, ImageSampleFlagCompare, 3u}, + {0x4fu, "image_gather4_c_lz", Opcode::IMAGE_GATHER4_C_LZ, ImageSampleFlagCompare | ImageSampleFlagLevelZero, 3u}, - {0x57u, "image_gather4_lz_o", Opcode::ImageGather4LzO, + {0x57u, "image_gather4_lz_o", Opcode::IMAGE_GATHER4_LZ_O, ImageSampleFlagLevelZero | ImageSampleFlagOffset, 3u}, - {0x58u, "image_gather4_c_o", Opcode::ImageGather4CO, + {0x58u, "image_gather4_c_o", Opcode::IMAGE_GATHER4_C_O, ImageSampleFlagCompare | ImageSampleFlagOffset, 4u}, - {0x5fu, "image_gather4_c_lz_o", Opcode::ImageGather4CLzO, + {0x5fu, "image_gather4_c_lz_o", Opcode::IMAGE_GATHER4_C_LZ_O, ImageSampleFlagCompare | ImageSampleFlagLevelZero | ImageSampleFlagOffset, 4u}, - {0x61u, "image_gather4h", Opcode::ImageGather4H, ImageSampleFlagGatherHorizontal, 2u}, + {0x61u, "image_gather4h", Opcode::IMAGE_GATHER4H, ImageSampleFlagGatherHorizontal, 2u}, }; constexpr MimgAtomicInfo MIMG_ATOMIC_OPCODE_LIST[] = { - {0x11u, "image_atomic_add", Opcode::ImageAtomicAdd}, - {0x15u, "image_atomic_umin", Opcode::ImageAtomicUMin}, - {0x17u, "image_atomic_umax", Opcode::ImageAtomicUMax}, - {0x18u, "image_atomic_and", Opcode::ImageAtomicAnd}, - {0x19u, "image_atomic_or", Opcode::ImageAtomicOr}, - {0x1au, "image_atomic_xor", Opcode::ImageAtomicXor}, + {0x11u, "image_atomic_add", Opcode::IMAGE_ATOMIC_ADD}, + {0x15u, "image_atomic_umin", Opcode::IMAGE_ATOMIC_UMIN}, + {0x17u, "image_atomic_umax", Opcode::IMAGE_ATOMIC_UMAX}, + {0x18u, "image_atomic_and", Opcode::IMAGE_ATOMIC_AND}, + {0x19u, "image_atomic_or", Opcode::IMAGE_ATOMIC_OR}, + {0x1au, "image_atomic_xor", Opcode::IMAGE_ATOMIC_XOR}, }; constexpr auto MIMG_SAMPLE_OPS = Detail::MakeOpcodeTable<0x100>(MIMG_SAMPLE_OPCODE_LIST); @@ -219,7 +219,7 @@ const MimgAtomicInfo* LookupAtomic(uint32_t opcode) { Opcode DecodeMimgOpcode(uint32_t opcode, const MimgSampleInfo* sample, const MimgGatherInfo* gather, const MimgAtomicInfo* atomic) { if (sample != nullptr) { - return Opcode::ImageSample; + return Opcode::IMAGE_SAMPLE; } if (gather != nullptr) { return gather->decoded; @@ -229,13 +229,13 @@ Opcode DecodeMimgOpcode(uint32_t opcode, const MimgSampleInfo* sample, const Mim } switch (opcode) { - case 0x00u: return Opcode::ImageLoad; - case 0x01u: return Opcode::ImageLoadMip; - case 0x08u: return Opcode::ImageStore; - case 0x09u: return Opcode::ImageStoreMip; - case 0x0eu: return Opcode::ImageGetResinfo; - case 0x60u: return Opcode::ImageGetLod; - default: return Opcode::Unsupported; + case 0x00u: return Opcode::IMAGE_LOAD; + case 0x01u: return Opcode::IMAGE_LOAD_MIP; + case 0x08u: return Opcode::IMAGE_STORE; + case 0x09u: return Opcode::IMAGE_STORE_MIP; + case 0x0eu: return Opcode::IMAGE_GET_RESINFO; + case 0x60u: return Opcode::IMAGE_GET_LOD; + default: return Opcode::UNSUPPORTED; } } @@ -327,7 +327,7 @@ void DecodeMimg(uint32_t pc, std::span code, uint32_t word_index DecodeMimgAddressComponents(opcode, dimension, sample, gather, atomic); SetRawWords(inst, code, word_index, word_count); - if (inst.opcode == Opcode::Unsupported) { + if (inst.opcode == Opcode::UNSUPPORTED) { SetUnsupported(inst, Family::MIMG, opcode, "MIMG opcode is not implemented"); } if (gather != nullptr && !IsSingleDmaskBit(inst.dmask)) { diff --git a/src/graphics/shader/recompiler/frontend/decode/MemoryOps.cpp b/src/graphics/shader/recompiler/frontend/decode/MemoryOps.cpp index 163914a19..de2937e9e 100644 --- a/src/graphics/shader/recompiler/frontend/decode/MemoryOps.cpp +++ b/src/graphics/shader/recompiler/frontend/decode/MemoryOps.cpp @@ -7,7 +7,7 @@ namespace { struct MemoryOpcodeInfo { uint32_t encoding = 0; - Opcode decoded = Opcode::Unsupported; + Opcode decoded = Opcode::UNSUPPORTED; uint32_t data_dwords = 1; uint32_t data_bits = 32; bool data_signed = false; @@ -16,96 +16,96 @@ struct MemoryOpcodeInfo { }; constexpr MemoryOpcodeInfo SMEM_OPCODE_LIST[] = { - {0x00u, Opcode::SLoadDword, 1, 32}, {0x01u, Opcode::SLoadDwordx2, 2, 32}, - {0x02u, Opcode::SLoadDwordx4, 4, 32}, {0x03u, Opcode::SLoadDwordx8, 8, 32}, - {0x04u, Opcode::SLoadDwordx16, 16, 32}, {0x08u, Opcode::SBufferLoadDword, 1, 32}, - {0x09u, Opcode::SBufferLoadDwordx2, 2, 32}, {0x0au, Opcode::SBufferLoadDwordx4, 4, 32}, - {0x0bu, Opcode::SBufferLoadDwordx8, 8, 32}, {0x0cu, Opcode::SBufferLoadDwordx16, 16, 32}, + {0x00u, Opcode::S_LOAD_DWORD, 1, 32}, {0x01u, Opcode::S_LOAD_DWORDX2, 2, 32}, + {0x02u, Opcode::S_LOAD_DWORDX4, 4, 32}, {0x03u, Opcode::S_LOAD_DWORDX8, 8, 32}, + {0x04u, Opcode::S_LOAD_DWORDX16, 16, 32}, {0x08u, Opcode::S_BUFFER_LOAD_DWORD, 1, 32}, + {0x09u, Opcode::S_BUFFER_LOAD_DWORDX2, 2, 32}, {0x0au, Opcode::S_BUFFER_LOAD_DWORDX4, 4, 32}, + {0x0bu, Opcode::S_BUFFER_LOAD_DWORDX8, 8, 32}, {0x0cu, Opcode::S_BUFFER_LOAD_DWORDX16, 16, 32}, }; constexpr MemoryOpcodeInfo MUBUF_OPCODE_LIST[] = { - {0x00u, Opcode::BufferLoadFormatX, 1, 32, false, false, true}, - {0x01u, Opcode::BufferLoadFormatXy, 2, 32, false, false, true}, - {0x02u, Opcode::BufferLoadFormatXyz, 3, 32, false, false, true}, - {0x03u, Opcode::BufferLoadFormatXyzw, 4, 32, false, false, true}, - {0x04u, Opcode::BufferStoreFormatX, 1, 32, false, false, true}, - {0x05u, Opcode::BufferStoreFormatXy, 2, 32, false, false, true}, - {0x06u, Opcode::BufferStoreFormatXyz, 3, 32, false, false, true}, - {0x07u, Opcode::BufferStoreFormatXyzw, 4, 32, false, false, true}, - {0x08u, Opcode::BufferLoadUbyte, 1, 8}, - {0x09u, Opcode::BufferLoadSbyte, 1, 8, true}, - {0x0au, Opcode::BufferLoadUshort, 1, 16}, - {0x0bu, Opcode::BufferLoadSshort, 1, 16, true}, - {0x0cu, Opcode::BufferLoadDword, 1, 32}, - {0x0du, Opcode::BufferLoadDwordx2, 2, 32}, - {0x0eu, Opcode::BufferLoadDwordx4, 4, 32}, - {0x0fu, Opcode::BufferLoadDwordx3, 3, 32}, - {0x18u, Opcode::BufferStoreByte, 1, 8}, - {0x1au, Opcode::BufferStoreShort, 1, 16}, - {0x1cu, Opcode::BufferStoreDword, 1, 32}, - {0x1du, Opcode::BufferStoreDwordx2, 2, 32}, - {0x1eu, Opcode::BufferStoreDwordx4, 4, 32}, - {0x1fu, Opcode::BufferStoreDwordx3, 3, 32}, - {0x30u, Opcode::BufferAtomicSwap, 1, 32}, - {0x32u, Opcode::BufferAtomicAdd, 1, 32}, - {0x33u, Opcode::BufferAtomicSub, 1, 32}, - {0x35u, Opcode::BufferAtomicSMin, 1, 32}, - {0x36u, Opcode::BufferAtomicUMin, 1, 32}, - {0x37u, Opcode::BufferAtomicSMax, 1, 32}, - {0x38u, Opcode::BufferAtomicUMax, 1, 32}, - {0x39u, Opcode::BufferAtomicAnd, 1, 32}, - {0x3au, Opcode::BufferAtomicOr, 1, 32}, - {0x3bu, Opcode::BufferAtomicXor, 1, 32}, - {0x3fu, Opcode::BufferAtomicFMin, 1, 32}, - {0x40u, Opcode::BufferAtomicFMax, 1, 32}, + {0x00u, Opcode::BUFFER_LOAD_FORMAT_X, 1, 32, false, false, true}, + {0x01u, Opcode::BUFFER_LOAD_FORMAT_XY, 2, 32, false, false, true}, + {0x02u, Opcode::BUFFER_LOAD_FORMAT_XYZ, 3, 32, false, false, true}, + {0x03u, Opcode::BUFFER_LOAD_FORMAT_XYZW, 4, 32, false, false, true}, + {0x04u, Opcode::BUFFER_STORE_FORMAT_X, 1, 32, false, false, true}, + {0x05u, Opcode::BUFFER_STORE_FORMAT_XY, 2, 32, false, false, true}, + {0x06u, Opcode::BUFFER_STORE_FORMAT_XYZ, 3, 32, false, false, true}, + {0x07u, Opcode::BUFFER_STORE_FORMAT_XYZW, 4, 32, false, false, true}, + {0x08u, Opcode::BUFFER_LOAD_UBYTE, 1, 8}, + {0x09u, Opcode::BUFFER_LOAD_SBYTE, 1, 8, true}, + {0x0au, Opcode::BUFFER_LOAD_USHORT, 1, 16}, + {0x0bu, Opcode::BUFFER_LOAD_SSHORT, 1, 16, true}, + {0x0cu, Opcode::BUFFER_LOAD_DWORD, 1, 32}, + {0x0du, Opcode::BUFFER_LOAD_DWORDX2, 2, 32}, + {0x0eu, Opcode::BUFFER_LOAD_DWORDX4, 4, 32}, + {0x0fu, Opcode::BUFFER_LOAD_DWORDX3, 3, 32}, + {0x18u, Opcode::BUFFER_STORE_BYTE, 1, 8}, + {0x1au, Opcode::BUFFER_STORE_SHORT, 1, 16}, + {0x1cu, Opcode::BUFFER_STORE_DWORD, 1, 32}, + {0x1du, Opcode::BUFFER_STORE_DWORDX2, 2, 32}, + {0x1eu, Opcode::BUFFER_STORE_DWORDX4, 4, 32}, + {0x1fu, Opcode::BUFFER_STORE_DWORDX3, 3, 32}, + {0x30u, Opcode::BUFFER_ATOMIC_SWAP, 1, 32}, + {0x32u, Opcode::BUFFER_ATOMIC_ADD, 1, 32}, + {0x33u, Opcode::BUFFER_ATOMIC_SUB, 1, 32}, + {0x35u, Opcode::BUFFER_ATOMIC_SMIN, 1, 32}, + {0x36u, Opcode::BUFFER_ATOMIC_UMIN, 1, 32}, + {0x37u, Opcode::BUFFER_ATOMIC_SMAX, 1, 32}, + {0x38u, Opcode::BUFFER_ATOMIC_UMAX, 1, 32}, + {0x39u, Opcode::BUFFER_ATOMIC_AND, 1, 32}, + {0x3au, Opcode::BUFFER_ATOMIC_OR, 1, 32}, + {0x3bu, Opcode::BUFFER_ATOMIC_XOR, 1, 32}, + {0x3fu, Opcode::BUFFER_ATOMIC_FMIN, 1, 32}, + {0x40u, Opcode::BUFFER_ATOMIC_FMAX, 1, 32}, }; constexpr MemoryOpcodeInfo MTBUF_OPCODE_LIST[] = { - {0x00u, Opcode::TBufferLoadFormatX, 1, 32, false, true, true}, - {0x01u, Opcode::TBufferLoadFormatXy, 2, 32, false, true, true}, - {0x02u, Opcode::TBufferLoadFormatXyz, 3, 32, false, true, true}, - {0x03u, Opcode::TBufferLoadFormatXyzw, 4, 32, false, true, true}, - {0x04u, Opcode::TBufferStoreFormatX, 1, 32, false, true, true}, - {0x05u, Opcode::TBufferStoreFormatXy, 2, 32, false, true, true}, - {0x06u, Opcode::TBufferStoreFormatXyz, 3, 32, false, true, true}, - {0x07u, Opcode::TBufferStoreFormatXyzw, 4, 32, false, true, true}, + {0x00u, Opcode::TBUFFER_LOAD_FORMAT_X, 1, 32, false, true, true}, + {0x01u, Opcode::TBUFFER_LOAD_FORMAT_XY, 2, 32, false, true, true}, + {0x02u, Opcode::TBUFFER_LOAD_FORMAT_XYZ, 3, 32, false, true, true}, + {0x03u, Opcode::TBUFFER_LOAD_FORMAT_XYZW, 4, 32, false, true, true}, + {0x04u, Opcode::TBUFFER_STORE_FORMAT_X, 1, 32, false, true, true}, + {0x05u, Opcode::TBUFFER_STORE_FORMAT_XY, 2, 32, false, true, true}, + {0x06u, Opcode::TBUFFER_STORE_FORMAT_XYZ, 3, 32, false, true, true}, + {0x07u, Opcode::TBUFFER_STORE_FORMAT_XYZW, 4, 32, false, true, true}, }; constexpr MemoryOpcodeInfo FLAT_OPCODE_LIST[] = { - {0x08u, Opcode::FlatLoadUbyte, 1, 8}, {0x09u, Opcode::FlatLoadSbyte, 1, 8, true}, - {0x0au, Opcode::FlatLoadUshort, 1, 16}, {0x0bu, Opcode::FlatLoadSshort, 1, 16, true}, - {0x0cu, Opcode::FlatLoadDword, 1, 32}, {0x0du, Opcode::FlatLoadDwordx2, 2, 32}, - {0x0eu, Opcode::FlatLoadDwordx4, 4, 32}, {0x0fu, Opcode::FlatLoadDwordx3, 3, 32}, - {0x18u, Opcode::FlatStoreByte, 1, 8}, {0x1au, Opcode::FlatStoreShort, 1, 16}, - {0x1cu, Opcode::FlatStoreDword, 1, 32}, {0x1du, Opcode::FlatStoreDwordx2, 2, 32}, - {0x1eu, Opcode::FlatStoreDwordx4, 4, 32}, {0x1fu, Opcode::FlatStoreDwordx3, 3, 32}, + {0x08u, Opcode::FLAT_LOAD_UBYTE, 1, 8}, {0x09u, Opcode::FLAT_LOAD_SBYTE, 1, 8, true}, + {0x0au, Opcode::FLAT_LOAD_USHORT, 1, 16}, {0x0bu, Opcode::FLAT_LOAD_SSHORT, 1, 16, true}, + {0x0cu, Opcode::FLAT_LOAD_DWORD, 1, 32}, {0x0du, Opcode::FLAT_LOAD_DWORDX2, 2, 32}, + {0x0eu, Opcode::FLAT_LOAD_DWORDX4, 4, 32}, {0x0fu, Opcode::FLAT_LOAD_DWORDX3, 3, 32}, + {0x18u, Opcode::FLAT_STORE_BYTE, 1, 8}, {0x1au, Opcode::FLAT_STORE_SHORT, 1, 16}, + {0x1cu, Opcode::FLAT_STORE_DWORD, 1, 32}, {0x1du, Opcode::FLAT_STORE_DWORDX2, 2, 32}, + {0x1eu, Opcode::FLAT_STORE_DWORDX4, 4, 32}, {0x1fu, Opcode::FLAT_STORE_DWORDX3, 3, 32}, }; constexpr MemoryOpcodeInfo DS_OPCODE_LIST[] = { - {0x00u, Opcode::DsAddU32, 1, 32}, {0x01u, Opcode::DsSubU32, 1, 32}, - {0x05u, Opcode::DsMinI32, 1, 32}, {0x06u, Opcode::DsMaxI32, 1, 32}, - {0x07u, Opcode::DsMinU32, 1, 32}, {0x08u, Opcode::DsMaxU32, 1, 32}, - {0x09u, Opcode::DsAndB32, 1, 32}, {0x0au, Opcode::DsOrB32, 1, 32}, - {0x0bu, Opcode::DsXorB32, 1, 32}, {0x0du, Opcode::DsWriteB32, 1, 32}, - {0x0eu, Opcode::DsWrite2B32, 2, 32}, {0x0fu, Opcode::DsWrite2St64B32, 2, 32}, - {0x12u, Opcode::DsMinF32, 1, 32}, {0x13u, Opcode::DsMaxF32, 1, 32}, - {0x1eu, Opcode::DsWriteByte, 1, 8}, {0x1fu, Opcode::DsWriteShort, 1, 16}, - {0x20u, Opcode::DsAddRtnU32, 1, 32}, {0x21u, Opcode::DsSubRtnU32, 1, 32}, - {0x25u, Opcode::DsMinRtnI32, 1, 32}, {0x26u, Opcode::DsMaxRtnI32, 1, 32}, - {0x27u, Opcode::DsMinRtnU32, 1, 32}, {0x28u, Opcode::DsMaxRtnU32, 1, 32}, - {0x29u, Opcode::DsAndRtnB32, 1, 32}, {0x2au, Opcode::DsOrRtnB32, 1, 32}, - {0x2bu, Opcode::DsXorRtnB32, 1, 32}, {0x2du, Opcode::DsWrxchgRtnB32, 1, 32}, - {0x35u, Opcode::DsSwizzleB32, 1, 32}, {0x36u, Opcode::DsReadB32, 1, 32}, - {0x37u, Opcode::DsRead2B32, 2, 32}, {0x38u, Opcode::DsRead2B32, 2, 32}, - {0x39u, Opcode::DsReadSbyte, 1, 8, true}, {0x3au, Opcode::DsReadUbyte, 1, 8}, - {0x3bu, Opcode::DsReadSshort, 1, 16, true}, {0x3cu, Opcode::DsReadUshort, 1, 16}, - {0x3du, Opcode::DsConsume, 1, 32}, {0x3eu, Opcode::DsAppend, 1, 32}, - {0x4du, Opcode::DsWriteB64, 2, 32}, {0x4eu, Opcode::DsWrite2B64, 4, 32}, - {0x4fu, Opcode::DsWrite2St64B64, 4, 32}, {0x76u, Opcode::DsReadB64, 2, 32}, - {0x77u, Opcode::DsRead2B64, 4, 32}, {0x78u, Opcode::DsRead2St64B64, 4, 32}, - {0xb0u, Opcode::DsWriteAddtidB32, 1, 32}, {0xb1u, Opcode::DsReadAddtidB32, 1, 32}, - {0xdeu, Opcode::DsWriteB96, 3, 32}, {0xdfu, Opcode::DsWriteB128, 4, 32}, - {0xfeu, Opcode::DsReadB96, 3, 32}, {0xffu, Opcode::DsReadB128, 4, 32}, + {0x00u, Opcode::DS_ADD_U32, 1, 32}, {0x01u, Opcode::DS_SUB_U32, 1, 32}, + {0x05u, Opcode::DS_MIN_I32, 1, 32}, {0x06u, Opcode::DS_MAX_I32, 1, 32}, + {0x07u, Opcode::DS_MIN_U32, 1, 32}, {0x08u, Opcode::DS_MAX_U32, 1, 32}, + {0x09u, Opcode::DS_AND_B32, 1, 32}, {0x0au, Opcode::DS_OR_B32, 1, 32}, + {0x0bu, Opcode::DS_XOR_B32, 1, 32}, {0x0du, Opcode::DS_WRITE_B32, 1, 32}, + {0x0eu, Opcode::DS_WRITE2_B32, 2, 32}, {0x0fu, Opcode::DS_WRITE2ST64_B32, 2, 32}, + {0x12u, Opcode::DS_MIN_F32, 1, 32}, {0x13u, Opcode::DS_MAX_F32, 1, 32}, + {0x1eu, Opcode::DS_WRITE_B8, 1, 8}, {0x1fu, Opcode::DS_WRITE_B16, 1, 16}, + {0x20u, Opcode::DS_ADD_RTN_U32, 1, 32}, {0x21u, Opcode::DS_SUB_RTN_U32, 1, 32}, + {0x25u, Opcode::DS_MIN_RTN_I32, 1, 32}, {0x26u, Opcode::DS_MAX_RTN_I32, 1, 32}, + {0x27u, Opcode::DS_MIN_RTN_U32, 1, 32}, {0x28u, Opcode::DS_MAX_RTN_U32, 1, 32}, + {0x29u, Opcode::DS_AND_RTN_B32, 1, 32}, {0x2au, Opcode::DS_OR_RTN_B32, 1, 32}, + {0x2bu, Opcode::DS_XOR_RTN_B32, 1, 32}, {0x2du, Opcode::DS_WRXCHG_RTN_B32, 1, 32}, + {0x35u, Opcode::DS_SWIZZLE_B32, 1, 32}, {0x36u, Opcode::DS_READ_B32, 1, 32}, + {0x37u, Opcode::DS_READ2_B32, 2, 32}, {0x38u, Opcode::DS_READ2_B32, 2, 32}, + {0x39u, Opcode::DS_READ_I8, 1, 8, true}, {0x3au, Opcode::DS_READ_U8, 1, 8}, + {0x3bu, Opcode::DS_READ_I16, 1, 16, true}, {0x3cu, Opcode::DS_READ_U16, 1, 16}, + {0x3du, Opcode::DS_CONSUME, 1, 32}, {0x3eu, Opcode::DS_APPEND, 1, 32}, + {0x4du, Opcode::DS_WRITE_B64, 2, 32}, {0x4eu, Opcode::DS_WRITE2_B64, 4, 32}, + {0x4fu, Opcode::DS_WRITE2ST64_B64, 4, 32}, {0x76u, Opcode::DS_READ_B64, 2, 32}, + {0x77u, Opcode::DS_READ2_B64, 4, 32}, {0x78u, Opcode::DS_READ2ST64_B64, 4, 32}, + {0xb0u, Opcode::DS_WRITE_ADDTID_B32, 1, 32}, {0xb1u, Opcode::DS_READ_ADDTID_B32, 1, 32}, + {0xdeu, Opcode::DS_WRITE_B96, 3, 32}, {0xdfu, Opcode::DS_WRITE_B128, 4, 32}, + {0xfeu, Opcode::DS_READ_B96, 3, 32}, {0xffu, Opcode::DS_READ_B128, 4, 32}, }; constexpr auto SMEM_OPS = Detail::MakeOpcodeTable<0x100>(SMEM_OPCODE_LIST); @@ -125,13 +125,13 @@ uint32_t SignExtendU32(uint32_t value, uint32_t bits) { void MarkMemoryUnsupported(Instruction& inst, Family family, uint32_t opcode, const char* reason) { inst.family = family; inst.opcode_id = opcode; - inst.opcode = Opcode::Unsupported; + inst.opcode = Opcode::UNSUPPORTED; SetUnsupported(inst, family, opcode, reason); } void ApplyMemoryInfo(Instruction& inst, const MemoryOpcodeInfo* info) { if (info == nullptr) { - inst.opcode = Opcode::Unsupported; + inst.opcode = Opcode::UNSUPPORTED; return; } inst.opcode = info->decoded; @@ -144,68 +144,68 @@ void ApplyMemoryInfo(Instruction& inst, const MemoryOpcodeInfo* info) { bool IsDsWriteOpcode(Opcode opcode) { switch (opcode) { - case Opcode::DsWriteByte: - case Opcode::DsWriteShort: - case Opcode::DsWrite2B32: - case Opcode::DsWrite2St64B32: - case Opcode::DsWrite2B64: - case Opcode::DsWrite2St64B64: - case Opcode::DsWriteB32: - case Opcode::DsWriteB64: - case Opcode::DsWriteB96: - case Opcode::DsWriteB128: return true; + case Opcode::DS_WRITE_B8: + case Opcode::DS_WRITE_B16: + case Opcode::DS_WRITE2_B32: + case Opcode::DS_WRITE2ST64_B32: + case Opcode::DS_WRITE2_B64: + case Opcode::DS_WRITE2ST64_B64: + case Opcode::DS_WRITE_B32: + case Opcode::DS_WRITE_B64: + case Opcode::DS_WRITE_B96: + case Opcode::DS_WRITE_B128: return true; default: return false; } } bool IsDsAtomicOpcode(Opcode opcode) { switch (opcode) { - case Opcode::DsAddU32: - case Opcode::DsAddRtnU32: - case Opcode::DsSubU32: - case Opcode::DsSubRtnU32: - case Opcode::DsMinI32: - case Opcode::DsMinRtnI32: - case Opcode::DsMaxI32: - case Opcode::DsMaxRtnI32: - case Opcode::DsMinU32: - case Opcode::DsMinRtnU32: - case Opcode::DsMaxU32: - case Opcode::DsMaxRtnU32: - case Opcode::DsAndB32: - case Opcode::DsAndRtnB32: - case Opcode::DsOrB32: - case Opcode::DsOrRtnB32: - case Opcode::DsXorB32: - case Opcode::DsXorRtnB32: - case Opcode::DsWrxchgRtnB32: return true; + case Opcode::DS_ADD_U32: + case Opcode::DS_ADD_RTN_U32: + case Opcode::DS_SUB_U32: + case Opcode::DS_SUB_RTN_U32: + case Opcode::DS_MIN_I32: + case Opcode::DS_MIN_RTN_I32: + case Opcode::DS_MAX_I32: + case Opcode::DS_MAX_RTN_I32: + case Opcode::DS_MIN_U32: + case Opcode::DS_MIN_RTN_U32: + case Opcode::DS_MAX_U32: + case Opcode::DS_MAX_RTN_U32: + case Opcode::DS_AND_B32: + case Opcode::DS_AND_RTN_B32: + case Opcode::DS_OR_B32: + case Opcode::DS_OR_RTN_B32: + case Opcode::DS_XOR_B32: + case Opcode::DS_XOR_RTN_B32: + case Opcode::DS_WRXCHG_RTN_B32: return true; default: return false; } } uint32_t DsSourceCount(Opcode opcode) { switch (opcode) { - case Opcode::DsWrite2B32: - case Opcode::DsWrite2St64B32: - case Opcode::DsWrite2B64: - case Opcode::DsWrite2St64B64: - case Opcode::DsMinF32: - case Opcode::DsMaxF32: return 3u; - case Opcode::DsReadAddtidB32: - case Opcode::DsConsume: - case Opcode::DsAppend: return 0u; + case Opcode::DS_WRITE2_B32: + case Opcode::DS_WRITE2ST64_B32: + case Opcode::DS_WRITE2_B64: + case Opcode::DS_WRITE2ST64_B64: + case Opcode::DS_MIN_F32: + case Opcode::DS_MAX_F32: return 3u; + case Opcode::DS_READ_ADDTID_B32: + case Opcode::DS_CONSUME: + case Opcode::DS_APPEND: return 0u; default: return IsDsWriteOpcode(opcode) || IsDsAtomicOpcode(opcode) ? 2u : 1u; } } bool IsFlatStoreOpcode(Opcode opcode) { switch (opcode) { - case Opcode::FlatStoreByte: - case Opcode::FlatStoreShort: - case Opcode::FlatStoreDword: - case Opcode::FlatStoreDwordx2: - case Opcode::FlatStoreDwordx3: - case Opcode::FlatStoreDwordx4: return true; + case Opcode::FLAT_STORE_BYTE: + case Opcode::FLAT_STORE_SHORT: + case Opcode::FLAT_STORE_DWORD: + case Opcode::FLAT_STORE_DWORDX2: + case Opcode::FLAT_STORE_DWORDX3: + case Opcode::FLAT_STORE_DWORDX4: return true; default: return false; } } @@ -231,7 +231,7 @@ void DecodeSmem(uint32_t pc, std::span code, uint32_t word_index const auto* info = Detail::FindOpcode(SMEM_OPS, opcode); ApplyMemoryInfo(inst, info); SetRawWords(inst, code, word_index, 2); - if (inst.opcode == Opcode::Unsupported) { + if (inst.opcode == Opcode::UNSUPPORTED) { MarkMemoryUnsupported(inst, Family::SMEM, opcode, "SMEM opcode is not implemented"); } @@ -266,7 +266,7 @@ void DecodeMubuf(uint32_t pc, std::span code, uint32_t word_inde const auto* info = Detail::FindOpcode(MUBUF_OPS, opcode); ApplyMemoryInfo(inst, info); SetRawWords(inst, code, word_index, 2); - if (inst.opcode == Opcode::Unsupported) { + if (inst.opcode == Opcode::UNSUPPORTED) { MarkMemoryUnsupported(inst, Family::MUBUF, opcode, "MUBUF opcode is not implemented"); } @@ -304,7 +304,7 @@ void DecodeMtbuf(uint32_t pc, std::span code, uint32_t word_inde const auto* info = Detail::FindOpcode(MTBUF_OPS, opcode); ApplyMemoryInfo(inst, info); SetRawWords(inst, code, word_index, 2); - if (inst.opcode == Opcode::Unsupported) { + if (inst.opcode == Opcode::UNSUPPORTED) { MarkMemoryUnsupported(inst, Family::MTBUF, opcode, "MTBUF opcode is not implemented"); } @@ -346,7 +346,7 @@ void DecodeFlat(uint32_t pc, std::span code, uint32_t word_index SetUnsupported(inst, Family::FLAT, opcode, "FLAT modifiers or segment are not implemented"); return; } - if (inst.opcode == Opcode::Unsupported) { + if (inst.opcode == Opcode::UNSUPPORTED) { MarkMemoryUnsupported(inst, Family::FLAT, opcode, "FLAT opcode is not implemented"); return; } @@ -384,35 +384,36 @@ void DecodeDs(uint32_t pc, std::span code, uint32_t word_index, const auto* info = Detail::FindOpcode(DS_OPS, opcode); ApplyMemoryInfo(inst, info); SetRawWords(inst, code, word_index, 2); - if (inst.opcode == Opcode::Unsupported) { + if (inst.opcode == Opcode::UNSUPPORTED) { MarkMemoryUnsupported(inst, Family::DS, opcode, "DS opcode is not implemented"); } - if (inst.opcode == Opcode::DsSwizzleB32 && inst.offset >= 0xe000u) { + if (inst.opcode == Opcode::DS_SWIZZLE_B32 && inst.offset >= 0xe000u) { SetUnsupported(inst, Family::DS, opcode, "DS swizzle FFT mode is not implemented"); } if (inst.gds && - (inst.opcode == Opcode::DsSwizzleB32 || inst.opcode == Opcode::DsWriteAddtidB32 || - inst.opcode == Opcode::DsReadAddtidB32)) { + (inst.opcode == Opcode::DS_SWIZZLE_B32 || inst.opcode == Opcode::DS_WRITE_ADDTID_B32 || + inst.opcode == Opcode::DS_READ_ADDTID_B32)) { SetUnsupported(inst, Family::DS, opcode, "DS swizzle/addtid is available only for LDS"); } - if (inst.opcode == Opcode::DsWriteAddtidB32 && data1 != 0u) { + if (inst.opcode == Opcode::DS_WRITE_ADDTID_B32 && data1 != 0u) { SetUnsupported(inst, Family::DS, opcode, "DS write addtid data1 operand is not implemented"); } - if (inst.opcode == Opcode::DsReadAddtidB32 && (data0 != 0u || data1 != 0u)) { + if (inst.opcode == Opcode::DS_READ_ADDTID_B32 && (data0 != 0u || data1 != 0u)) { SetUnsupported(inst, Family::DS, opcode, "DS read addtid data operands are not implemented"); } - if (inst.opcode == Opcode::DsWrite2B32 || opcode == 0x37u) { + if (inst.opcode == Opcode::DS_WRITE2_B32 || opcode == 0x37u) { inst.offset = offset0 * 4u; inst.secondary_offset = offset1 * 4u; - } else if (inst.opcode == Opcode::DsWrite2St64B32 || opcode == 0x38u) { + } else if (inst.opcode == Opcode::DS_WRITE2ST64_B32 || opcode == 0x38u) { inst.offset = offset0 * 256u; inst.secondary_offset = offset1 * 256u; - } else if (inst.opcode == Opcode::DsWrite2B64 || inst.opcode == Opcode::DsRead2B64) { + } else if (inst.opcode == Opcode::DS_WRITE2_B64 || inst.opcode == Opcode::DS_READ2_B64) { inst.offset = offset0 * 8u; inst.secondary_offset = offset1 * 8u; - } else if (inst.opcode == Opcode::DsWrite2St64B64 || inst.opcode == Opcode::DsRead2St64B64) { + } else if (inst.opcode == Opcode::DS_WRITE2ST64_B64 || + inst.opcode == Opcode::DS_READ2ST64_B64) { inst.offset = offset0 * 512u; inst.secondary_offset = offset1 * 512u; } diff --git a/src/graphics/shader/recompiler/frontend/decode/OpcodeTable.h b/src/graphics/shader/recompiler/frontend/decode/OpcodeTable.h index 887a58787..371fc8616 100644 --- a/src/graphics/shader/recompiler/frontend/decode/OpcodeTable.h +++ b/src/graphics/shader/recompiler/frontend/decode/OpcodeTable.h @@ -11,7 +11,7 @@ namespace Libs::Graphics::ShaderRecompiler::Decoder::Detail { struct OpcodeMap { uint32_t encoding = 0; - Opcode decoded = Opcode::Unknown; + Opcode decoded = Opcode::UNKNOWN; }; template @@ -48,7 +48,7 @@ template constexpr Opcode LookupOpcode(const OpcodeTable& table, uint32_t encoding) { const auto* entry = FindOpcode(table, encoding); - return entry != nullptr ? entry->decoded : Opcode::Unsupported; + return entry != nullptr ? entry->decoded : Opcode::UNSUPPORTED; } } // namespace Libs::Graphics::ShaderRecompiler::Decoder::Detail diff --git a/src/graphics/shader/recompiler/frontend/decode/ScalarAluOps.cpp b/src/graphics/shader/recompiler/frontend/decode/ScalarAluOps.cpp index c0cb3ca3c..8a2fcdb89 100644 --- a/src/graphics/shader/recompiler/frontend/decode/ScalarAluOps.cpp +++ b/src/graphics/shader/recompiler/frontend/decode/ScalarAluOps.cpp @@ -8,67 +8,94 @@ namespace { using Detail::OpcodeMap; constexpr OpcodeMap SOP2_OPCODE_LIST[] = { - {0x00u, Opcode::SAddU32}, {0x01u, Opcode::SSubU32}, {0x02u, Opcode::SAddI32}, - {0x03u, Opcode::SSubI32}, {0x04u, Opcode::SAddcU32}, {0x05u, Opcode::SSubbU32}, - {0x06u, Opcode::SMinI32}, {0x07u, Opcode::SMinU32}, {0x08u, Opcode::SMaxI32}, - {0x09u, Opcode::SMaxU32}, {0x0au, Opcode::SCselectB32}, {0x0bu, Opcode::SCselectB64}, - {0x0eu, Opcode::SAndB32}, {0x0fu, Opcode::SAndB64}, {0x10u, Opcode::SOrB32}, - {0x11u, Opcode::SOrB64}, {0x12u, Opcode::SXorB32}, {0x13u, Opcode::SXorB64}, - {0x14u, Opcode::SAndn2B32}, {0x15u, Opcode::SAndn2B64}, {0x16u, Opcode::SOrn2B32}, - {0x17u, Opcode::SOrn2B64}, {0x18u, Opcode::SNandB32}, {0x19u, Opcode::SNandB64}, - {0x1au, Opcode::SNorB32}, {0x1bu, Opcode::SNorB64}, {0x1cu, Opcode::SXnorB32}, - {0x1du, Opcode::SXnorB64}, {0x1eu, Opcode::SLshlB32}, {0x1fu, Opcode::SLshlB64}, - {0x20u, Opcode::SLshrB32}, {0x21u, Opcode::SLshrB64}, {0x22u, Opcode::SAshrI32}, - {0x24u, Opcode::SBfmB32}, {0x25u, Opcode::SBfmB64}, {0x26u, Opcode::SMulI32}, - {0x27u, Opcode::SBfeU32}, {0x28u, Opcode::SBfeI32}, {0x29u, Opcode::SBfeU64}, - {0x2eu, Opcode::SLshl1AddU32}, {0x2fu, Opcode::SLshl2AddU32}, {0x30u, Opcode::SLshl3AddU32}, - {0x31u, Opcode::SLshl4AddU32}, {0x32u, Opcode::SPackLlB32B16}, {0x33u, Opcode::SPackLhB32B16}, - {0x34u, Opcode::SPackHhB32B16}, {0x35u, Opcode::SMulHiU32}, + {0x00u, Opcode::S_ADD_U32}, {0x01u, Opcode::S_SUB_U32}, + {0x02u, Opcode::S_ADD_I32}, {0x03u, Opcode::S_SUB_I32}, + {0x04u, Opcode::S_ADDC_U32}, {0x05u, Opcode::S_SUBB_U32}, + {0x06u, Opcode::S_MIN_I32}, {0x07u, Opcode::S_MIN_U32}, + {0x08u, Opcode::S_MAX_I32}, {0x09u, Opcode::S_MAX_U32}, + {0x0au, Opcode::S_CSELECT_B32}, {0x0bu, Opcode::S_CSELECT_B64}, + {0x0eu, Opcode::S_AND_B32}, {0x0fu, Opcode::S_AND_B64}, + {0x10u, Opcode::S_OR_B32}, {0x11u, Opcode::S_OR_B64}, + {0x12u, Opcode::S_XOR_B32}, {0x13u, Opcode::S_XOR_B64}, + {0x14u, Opcode::S_ANDN2_B32}, {0x15u, Opcode::S_ANDN2_B64}, + {0x16u, Opcode::S_ORN2_B32}, {0x17u, Opcode::S_ORN2_B64}, + {0x18u, Opcode::S_NAND_B32}, {0x19u, Opcode::S_NAND_B64}, + {0x1au, Opcode::S_NOR_B32}, {0x1bu, Opcode::S_NOR_B64}, + {0x1cu, Opcode::S_XNOR_B32}, {0x1du, Opcode::S_XNOR_B64}, + {0x1eu, Opcode::S_LSHL_B32}, {0x1fu, Opcode::S_LSHL_B64}, + {0x20u, Opcode::S_LSHR_B32}, {0x21u, Opcode::S_LSHR_B64}, + {0x22u, Opcode::S_ASHR_I32}, {0x24u, Opcode::S_BFM_B32}, + {0x25u, Opcode::S_BFM_B64}, {0x26u, Opcode::S_MUL_I32}, + {0x27u, Opcode::S_BFE_U32}, {0x28u, Opcode::S_BFE_I32}, + {0x29u, Opcode::S_BFE_U64}, {0x2eu, Opcode::S_LSHL1_ADD_U32}, + {0x2fu, Opcode::S_LSHL2_ADD_U32}, {0x30u, Opcode::S_LSHL3_ADD_U32}, + {0x31u, Opcode::S_LSHL4_ADD_U32}, {0x32u, Opcode::S_PACK_LL_B32_B16}, + {0x33u, Opcode::S_PACK_LH_B32_B16}, {0x34u, Opcode::S_PACK_HH_B32_B16}, + {0x35u, Opcode::S_MUL_HI_U32}, }; constexpr OpcodeMap SOP1_OPCODE_LIST[] = { - {0x03u, Opcode::SMovB32}, {0x04u, Opcode::SMovB64}, - {0x07u, Opcode::SNotB32}, {0x08u, Opcode::SNotB64}, - {0x0au, Opcode::SWqmB64}, {0x0bu, Opcode::SBrevB32}, - {0x0fu, Opcode::SBcnt1I32B32}, {0x10u, Opcode::SBcnt1I32B64}, - {0x13u, Opcode::SFf1I32B32}, {0x14u, Opcode::SFf1I32B64}, - {0x16u, Opcode::SFlbitI32B64}, {0x1bu, Opcode::SBitset0B32}, - {0x1du, Opcode::SBitset1B32}, {0x1fu, Opcode::SGetpcB64}, - {0x20u, Opcode::SSetpcB64}, {0x24u, Opcode::SAndSaveexecB64}, - {0x28u, Opcode::SOrn2SaveexecB64}, {0x34u, Opcode::SAbsI32}, - {0x37u, Opcode::SAndn1SaveexecB64}, {0x3bu, Opcode::SBitreplicateB64B32}, - {0x3cu, Opcode::SAndSaveexecB32}, {0x44u, Opcode::SAndn1SaveexecB32}, + {0x03u, Opcode::S_MOV_B32}, + {0x04u, Opcode::S_MOV_B64}, + {0x07u, Opcode::S_NOT_B32}, + {0x08u, Opcode::S_NOT_B64}, + {0x0au, Opcode::S_WQM_B64}, + {0x0bu, Opcode::S_BREV_B32}, + {0x0fu, Opcode::S_BCNT1_I32_B32}, + {0x10u, Opcode::S_BCNT1_I32_B64}, + {0x13u, Opcode::S_FF1_I32_B32}, + {0x14u, Opcode::S_FF1_I32_B64}, + {0x16u, Opcode::S_FLBIT_I32_B64}, + {0x1bu, Opcode::S_BITSET0_B32}, + {0x1du, Opcode::S_BITSET1_B32}, + {0x1fu, Opcode::S_GETPC_B64}, + {0x20u, Opcode::S_SETPC_B64}, + {0x24u, Opcode::S_AND_SAVEEXEC_B64}, + {0x28u, Opcode::S_ORN2_SAVEEXEC_B64}, + {0x34u, Opcode::S_ABS_I32}, + {0x37u, Opcode::S_ANDN1_SAVEEXEC_B64}, + {0x3bu, Opcode::S_BITREPLICATE_B64_B32}, + {0x3cu, Opcode::S_AND_SAVEEXEC_B32}, + {0x44u, Opcode::S_ANDN1_SAVEEXEC_B32}, }; constexpr OpcodeMap SOPC_OPCODE_LIST[] = { - {0x00u, Opcode::SCmpEqI32}, {0x01u, Opcode::SCmpLgI32}, {0x02u, Opcode::SCmpGtI32}, - {0x03u, Opcode::SCmpGeI32}, {0x04u, Opcode::SCmpLtI32}, {0x05u, Opcode::SCmpLeI32}, - {0x06u, Opcode::SCmpEqU32}, {0x07u, Opcode::SCmpLgU32}, {0x08u, Opcode::SCmpGtU32}, - {0x09u, Opcode::SCmpGeU32}, {0x0au, Opcode::SCmpLtU32}, {0x0bu, Opcode::SCmpLeU32}, - {0x0cu, Opcode::SBitcmp0B32}, {0x0du, Opcode::SBitcmp1B32}, {0x12u, Opcode::SCmpEqU64}, - {0x13u, Opcode::SCmpLgU64}, + {0x00u, Opcode::S_CMP_EQ_I32}, {0x01u, Opcode::S_CMP_LG_I32}, {0x02u, Opcode::S_CMP_GT_I32}, + {0x03u, Opcode::S_CMP_GE_I32}, {0x04u, Opcode::S_CMP_LT_I32}, {0x05u, Opcode::S_CMP_LE_I32}, + {0x06u, Opcode::S_CMP_EQ_U32}, {0x07u, Opcode::S_CMP_LG_U32}, {0x08u, Opcode::S_CMP_GT_U32}, + {0x09u, Opcode::S_CMP_GE_U32}, {0x0au, Opcode::S_CMP_LT_U32}, {0x0bu, Opcode::S_CMP_LE_U32}, + {0x0cu, Opcode::S_BITCMP0_B32}, {0x0du, Opcode::S_BITCMP1_B32}, {0x12u, Opcode::S_CMP_EQ_U64}, + {0x13u, Opcode::S_CMP_LG_U64}, }; constexpr OpcodeMap SOPK_OPCODE_LIST[] = { - {0x00u, Opcode::SMovkI32}, {0x03u, Opcode::SCmpEqI32}, {0x04u, Opcode::SCmpLgI32}, - {0x05u, Opcode::SCmpGtI32}, {0x06u, Opcode::SCmpGeI32}, {0x07u, Opcode::SCmpLtI32}, - {0x08u, Opcode::SCmpLeI32}, {0x09u, Opcode::SCmpEqU32}, {0x0au, Opcode::SCmpLgU32}, - {0x0bu, Opcode::SCmpGtU32}, {0x0cu, Opcode::SCmpGeU32}, {0x0du, Opcode::SCmpLtU32}, - {0x0eu, Opcode::SCmpLeU32}, {0x0fu, Opcode::SAddI32}, {0x10u, Opcode::SMulkI32}, - {0x13u, Opcode::SSetregB32}, {0x17u, Opcode::SWaitcnt}, {0x18u, Opcode::SWaitcnt}, - {0x19u, Opcode::SWaitcnt}, {0x1au, Opcode::SWaitcnt}, + {0x00u, Opcode::S_MOVK_I32}, {0x03u, Opcode::S_CMP_EQ_I32}, {0x04u, Opcode::S_CMP_LG_I32}, + {0x05u, Opcode::S_CMP_GT_I32}, {0x06u, Opcode::S_CMP_GE_I32}, {0x07u, Opcode::S_CMP_LT_I32}, + {0x08u, Opcode::S_CMP_LE_I32}, {0x09u, Opcode::S_CMP_EQ_U32}, {0x0au, Opcode::S_CMP_LG_U32}, + {0x0bu, Opcode::S_CMP_GT_U32}, {0x0cu, Opcode::S_CMP_GE_U32}, {0x0du, Opcode::S_CMP_LT_U32}, + {0x0eu, Opcode::S_CMP_LE_U32}, {0x0fu, Opcode::S_ADD_I32}, {0x10u, Opcode::S_MULK_I32}, + {0x13u, Opcode::S_SETREG_B32}, {0x17u, Opcode::S_WAITCNT}, {0x18u, Opcode::S_WAITCNT}, + {0x19u, Opcode::S_WAITCNT}, {0x1au, Opcode::S_WAITCNT}, }; constexpr OpcodeMap SOPP_OPCODE_LIST[] = { - {0x00u, Opcode::SNop}, {0x01u, Opcode::SEndpgm}, - {0x02u, Opcode::SBranch}, {0x04u, Opcode::SCbranchScc0}, - {0x05u, Opcode::SCbranchScc1}, {0x06u, Opcode::SCbranchVccz}, - {0x07u, Opcode::SCbranchVccnz}, {0x08u, Opcode::SCbranchExecz}, - {0x09u, Opcode::SCbranchExecnz}, {0x0au, Opcode::SBarrier}, - {0x0cu, Opcode::SWaitcnt}, {0x0eu, Opcode::SSleep}, - {0x10u, Opcode::SSendmsg}, {0x12u, Opcode::STrap}, - {0x16u, Opcode::STtraceData}, {0x20u, Opcode::SInstPrefetch}, - {0x23u, Opcode::SWaitcntDepctr}, + {0x00u, Opcode::S_NOP}, + {0x01u, Opcode::S_ENDPGM}, + {0x02u, Opcode::S_BRANCH}, + {0x04u, Opcode::S_CBRANCH_SCC0}, + {0x05u, Opcode::S_CBRANCH_SCC1}, + {0x06u, Opcode::S_CBRANCH_VCCZ}, + {0x07u, Opcode::S_CBRANCH_VCCNZ}, + {0x08u, Opcode::S_CBRANCH_EXECZ}, + {0x09u, Opcode::S_CBRANCH_EXECNZ}, + {0x0au, Opcode::S_BARRIER}, + {0x0cu, Opcode::S_WAITCNT}, + {0x0eu, Opcode::S_SLEEP}, + {0x10u, Opcode::S_SENDMSG}, + {0x12u, Opcode::S_TRAP}, + {0x16u, Opcode::S_TTRACEDATA}, + {0x20u, Opcode::S_INST_PREFETCH}, + {0x23u, Opcode::S_WAITCNT_DEPCTR}, }; constexpr auto SOP1_OPS = Detail::MakeOpcodeTable<0x100>(SOP1_OPCODE_LIST); @@ -104,16 +131,16 @@ bool DecodeSop1(uint32_t pc, std::span code, uint32_t word_index inst.opcode = Detail::LookupOpcode(SOP1_OPS, opcode); SetRawWords(inst, code, word_index, 1); - if (inst.opcode == Opcode::Unsupported) { + if (inst.opcode == Opcode::UNSUPPORTED) { SetUnsupported(inst, Family::SOP1, opcode, "SOP1 opcode is not implemented"); return true; } switch (inst.opcode) { - case Opcode::SGetpcB64: + case Opcode::S_GETPC_B64: inst.src_count = 0; return DecodeScalarDestination(sdst, pc, inst.dst, error); - case Opcode::SSetpcB64: + case Opcode::S_SETPC_B64: inst.src_count = 1; inst.dst.kind = OperandKind::Null; if (!DecodeScalarSource(ssrc0, pc, inst.src0, error)) { @@ -148,7 +175,7 @@ bool DecodeSop2(uint32_t pc, std::span code, uint32_t word_index inst.opcode = Detail::LookupOpcode(SOP2_OPS, opcode); SetRawWords(inst, code, word_index, 1); - if (inst.opcode == Opcode::Unsupported) { + if (inst.opcode == Opcode::UNSUPPORTED) { SetUnsupported(inst, Family::SOP2, opcode, "SOP2 opcode is not implemented"); return true; } @@ -177,14 +204,14 @@ bool DecodeSopk(uint32_t pc, std::span code, uint32_t word_index inst.src_count = 1; SetRawWords(inst, code, word_index, 1); - if (inst.opcode == Opcode::Unsupported) { + if (inst.opcode == Opcode::UNSUPPORTED) { SetUnsupported(inst, Family::SOPK, opcode, "SOPK opcode is not implemented"); return true; } switch (inst.opcode) { - case Opcode::SMovkI32: return DecodeScalarDestination(sdst, pc, inst.dst, error); - case Opcode::SWaitcnt: { + case Opcode::S_MOVK_I32: return DecodeScalarDestination(sdst, pc, inst.dst, error); + case Opcode::S_WAITCNT: { const uint32_t waitcnt = word & 0xffffu; inst.dst.kind = OperandKind::Null; inst.src0.signed_val = static_cast(waitcnt); @@ -192,7 +219,7 @@ bool DecodeSopk(uint32_t pc, std::span code, uint32_t word_index inst.src_count = 1; return true; } - case Opcode::SSetregB32: + case Opcode::S_SETREG_B32: inst.dst.kind = OperandKind::Null; inst.src1.kind = OperandKind::LiteralConstant; inst.src1.value = word & 0xffffu; @@ -206,7 +233,7 @@ bool DecodeSopk(uint32_t pc, std::span code, uint32_t word_index if (!DecodeScalarSource(sdst, pc, inst.src0, error)) { return false; } - if (inst.opcode == Opcode::SAddI32 || inst.opcode == Opcode::SMulkI32) { + if (inst.opcode == Opcode::S_ADD_I32 || inst.opcode == Opcode::S_MULK_I32) { inst.src_count = 2; return DecodeScalarDestination(sdst, pc, inst.dst, error); } @@ -231,7 +258,7 @@ bool DecodeSopc(uint32_t pc, std::span code, uint32_t word_index inst.dst.kind = OperandKind::Scc; SetRawWords(inst, code, word_index, 1); - if (inst.opcode == Opcode::Unsupported) { + if (inst.opcode == Opcode::UNSUPPORTED) { SetUnsupported(inst, Family::SOPC, opcode, "SOPC opcode is not implemented"); return true; } @@ -251,21 +278,21 @@ void DecodeSopp(uint32_t pc, std::span code, uint32_t word_index inst.opcode_id = opcode; inst.opcode = Detail::LookupOpcode(SOPP_OPS, opcode); inst.src0.kind = OperandKind::LiteralConstant; - inst.src0.value = inst.opcode == Opcode::STrap ? simm & 0xffu : simm; - inst.src0.signed_val = inst.opcode == Opcode::STrap + inst.src0.value = inst.opcode == Opcode::S_TRAP ? simm & 0xffu : simm; + inst.src0.signed_val = inst.opcode == Opcode::S_TRAP ? static_cast(inst.src0.value) : static_cast(static_cast(simm)); - inst.src_count = (inst.opcode == Opcode::SNop || inst.opcode == Opcode::SWaitcnt || - inst.opcode == Opcode::SWaitcntDepctr || inst.opcode == Opcode::SSleep || - inst.opcode == Opcode::SSendmsg || inst.opcode == Opcode::STrap || - inst.opcode == Opcode::STtraceData || inst.opcode == Opcode::SInstPrefetch) + inst.src_count = (inst.opcode == Opcode::S_NOP || inst.opcode == Opcode::S_WAITCNT || + inst.opcode == Opcode::S_WAITCNT_DEPCTR || inst.opcode == Opcode::S_SLEEP || + inst.opcode == Opcode::S_SENDMSG || inst.opcode == Opcode::S_TRAP || + inst.opcode == Opcode::S_TTRACEDATA || inst.opcode == Opcode::S_INST_PREFETCH) ? 1 : 0; inst.branch_offset = static_cast(static_cast(simm)) * 4; inst.branch_target = pc + 4u + static_cast(inst.branch_offset); SetRawWords(inst, code, word_index, 1); - if (inst.opcode == Opcode::Unsupported) { + if (inst.opcode == Opcode::UNSUPPORTED) { SetUnsupported(inst, Family::SOPP, opcode, "SOPP control-flow opcode is not implemented"); } } diff --git a/src/graphics/shader/recompiler/frontend/decode/ShaderDecoder.cpp b/src/graphics/shader/recompiler/frontend/decode/ShaderDecoder.cpp index 12d21163f..5ecce0a20 100644 --- a/src/graphics/shader/recompiler/frontend/decode/ShaderDecoder.cpp +++ b/src/graphics/shader/recompiler/frontend/decode/ShaderDecoder.cpp @@ -32,13 +32,13 @@ bool HasLiteral(const Instruction& inst) { bool IsControlFlowBranch(Opcode opcode) { switch (opcode) { - case Opcode::SBranch: - case Opcode::SCbranchScc0: - case Opcode::SCbranchScc1: - case Opcode::SCbranchVccz: - case Opcode::SCbranchVccnz: - case Opcode::SCbranchExecz: - case Opcode::SCbranchExecnz: return true; + case Opcode::S_BRANCH: + case Opcode::S_CBRANCH_SCC0: + case Opcode::S_CBRANCH_SCC1: + case Opcode::S_CBRANCH_VCCZ: + case Opcode::S_CBRANCH_VCCNZ: + case Opcode::S_CBRANCH_EXECZ: + case Opcode::S_CBRANCH_EXECNZ: return true; default: return false; } } @@ -62,7 +62,7 @@ std::string RawWordsToString(const Instruction& inst) { } std::string FormatBinary(const Instruction& inst) { - std::string text = fmt::format("0x{:08x}: {} {}", inst.pc, OpcodeToString(inst.opcode).c_str(), + std::string text = fmt::format("0x{:08x}: {} {}", inst.pc, magic_enum::enum_name(inst.opcode), OperandToString(inst.dst).c_str()); if (inst.dst2.kind != OperandKind::Unknown) { text += ", "; @@ -77,7 +77,7 @@ std::string FormatBinary(const Instruction& inst) { } std::string FormatSources(const Instruction& inst) { - std::string text = fmt::format("0x{:08x}: {}", inst.pc, OpcodeToString(inst.opcode)); + std::string text = fmt::format("0x{:08x}: {}", inst.pc, magic_enum::enum_name(inst.opcode)); const Operand* sources[] = {&inst.src0, &inst.src1, &inst.src2, &inst.src3}; for (uint32_t i = 0; i < inst.src_count && i < 4u; i++) { text += i == 0 ? " " : ", "; @@ -87,7 +87,7 @@ std::string FormatSources(const Instruction& inst) { } std::string FormatMemory(const Instruction& inst) { - std::string text = fmt::format("0x{:08x}: {} {}", inst.pc, OpcodeToString(inst.opcode).c_str(), + std::string text = fmt::format("0x{:08x}: {} {}", inst.pc, magic_enum::enum_name(inst.opcode), OperandToString(inst.dst).c_str()); const Operand* sources[] = {&inst.src0, &inst.src1, &inst.src2, &inst.src3}; for (uint32_t i = 0; i < inst.src_count && i < 4u; i++) { @@ -109,7 +109,7 @@ std::string WithUnsupportedReason(const Instruction& inst, const std::string& te return text; } return text + fmt::format(" ; family={} opcode=0x{:02x} raw=[{}] reason={}", - FamilyToString(inst.family).c_str(), inst.opcode_id, + magic_enum::enum_name(inst.family), inst.opcode_id, RawWordsToString(inst).c_str(), inst.unsupported_reason); } @@ -145,23 +145,23 @@ std::string ImageSampleFlagsToString(uint32_t flags) { std::string FormatMimg(const Instruction& inst) { const char* sample_name = - inst.opcode == Opcode::ImageSample ? MimgSampleOpcodeName(inst.opcode_id) : nullptr; - const std::string name = - sample_name != nullptr ? std::string(sample_name) : OpcodeToString(inst.opcode); - std::string text = fmt::format( - "0x{:08x}: {} {}, {}, {}, {} ; dmask=0x{:x} image_dim={}", inst.pc, name.c_str(), - OperandToString(inst.dst).c_str(), OperandToString(inst.src0).c_str(), - OperandToString(inst.src1).c_str(), OperandToString(inst.src2).c_str(), inst.dmask, - ImageDimensionToString(inst.image_dimension)); + inst.opcode == Opcode::IMAGE_SAMPLE ? MimgSampleOpcodeName(inst.opcode_id) : nullptr; + const std::string_view name = + sample_name != nullptr ? sample_name : magic_enum::enum_name(inst.opcode); + std::string text = + fmt::format("0x{:08x}: {} {}, {}, {}, {} ; dmask=0x{:x} image_dim={}", inst.pc, name, + OperandToString(inst.dst).c_str(), OperandToString(inst.src0).c_str(), + OperandToString(inst.src1).c_str(), OperandToString(inst.src2).c_str(), + inst.dmask, ImageDimensionToString(inst.image_dimension)); switch (inst.opcode) { - case Opcode::ImageSample: - case Opcode::ImageGather4Lz: - case Opcode::ImageGather4C: - case Opcode::ImageGather4CLz: - case Opcode::ImageGather4LzO: - case Opcode::ImageGather4CO: - case Opcode::ImageGather4CLzO: - case Opcode::ImageGather4H: + case Opcode::IMAGE_SAMPLE: + case Opcode::IMAGE_GATHER4_LZ: + case Opcode::IMAGE_GATHER4_C: + case Opcode::IMAGE_GATHER4_C_LZ: + case Opcode::IMAGE_GATHER4_LZ_O: + case Opcode::IMAGE_GATHER4_C_O: + case Opcode::IMAGE_GATHER4_C_LZ_O: + case Opcode::IMAGE_GATHER4H: text += fmt::format(" sample_flags={} addr_components={}", ImageSampleFlagsToString(inst.image_sample_flags).c_str(), inst.image_address_components); @@ -322,7 +322,7 @@ void SetRawWords(Instruction& inst, std::span code, uint32_t wor } void SetUnsupported(Instruction& inst, Family family, uint32_t opcode_id, const char* reason) { - inst.opcode = Opcode::Unsupported; + inst.opcode = Opcode::UNSUPPORTED; inst.family = family; inst.opcode_id = opcode_id; inst.unsupported_reason = reason; @@ -416,7 +416,7 @@ bool DecodeProgram(std::span code, Program& program, std::string } branch_targets[target_index] = true; } - if (inst.opcode == Opcode::SEndpgm && + if (inst.opcode == Opcode::S_ENDPGM && (word_index >= code.size() || branch_targets.empty() || !branch_targets[word_index])) { return true; } @@ -426,549 +426,6 @@ bool DecodeProgram(std::span code, Program& program, std::string return false; } -std::string FamilyToString(Family family) { - switch (family) { - case Family::SOP1: return "SOP1"; - case Family::SOP2: return "SOP2"; - case Family::SOPK: return "SOPK"; - case Family::SOPC: return "SOPC"; - case Family::SOPP: return "SOPP"; - case Family::VOP1: return "VOP1"; - case Family::VOP2: return "VOP2"; - case Family::VOP3: return "VOP3"; - case Family::VOP3P: return "VOP3P"; - case Family::VOPC: return "VOPC"; - case Family::VINTRP: return "VINTRP"; - case Family::SMEM: return "SMEM"; - case Family::MUBUF: return "MUBUF"; - case Family::MTBUF: return "MTBUF"; - case Family::FLAT: return "FLAT"; - case Family::DS: return "DS"; - case Family::MIMG: return "MIMG"; - case Family::EXP: return "EXP"; - default: return "Unknown"; - } -} - -std::string OpcodeToString(Opcode opcode) { - switch (opcode) { - case Opcode::SMovB32: return "s_mov_b32"; - case Opcode::SMovB64: return "s_mov_b64"; - case Opcode::SMovkI32: return "s_movk_i32"; - case Opcode::SAbsI32: return "s_abs_i32"; - case Opcode::SBrevB32: return "s_brev_b32"; - case Opcode::SBcnt1I32B32: return "s_bcnt1_i32_b32"; - case Opcode::SBcnt1I32B64: return "s_bcnt1_i32_b64"; - case Opcode::SFf1I32B32: return "s_ff1_i32_b32"; - case Opcode::SFf1I32B64: return "s_ff1_i32_b64"; - case Opcode::SFlbitI32B64: return "s_flbit_i32_b64"; - case Opcode::SBitreplicateB64B32: return "s_bitreplicate_b64_b32"; - case Opcode::SGetpcB64: return "s_getpc_b64"; - case Opcode::SSetpcB64: return "s_setpc_b64"; - case Opcode::SAndSaveexecB32: return "s_and_saveexec_b32"; - case Opcode::SAndn1SaveexecB32: return "s_andn1_saveexec_b32"; - case Opcode::SAndSaveexecB64: return "s_and_saveexec_b64"; - case Opcode::SOrn2SaveexecB64: return "s_orn2_saveexec_b64"; - case Opcode::SAndn1SaveexecB64: return "s_andn1_saveexec_b64"; - case Opcode::SNotB32: return "s_not_b32"; - case Opcode::SNotB64: return "s_not_b64"; - case Opcode::SWqmB64: return "s_wqm_b64"; - case Opcode::SAddU32: return "s_add_u32"; - case Opcode::SAddcU32: return "s_addc_u32"; - case Opcode::SSubbU32: return "s_subb_u32"; - case Opcode::SSubU32: return "s_sub_u32"; - case Opcode::SAddI32: return "s_add_i32"; - case Opcode::SSubI32: return "s_sub_i32"; - case Opcode::SBitcmp0B32: return "s_bitcmp0_b32"; - case Opcode::SBitcmp1B32: return "s_bitcmp1_b32"; - case Opcode::SBitset0B32: return "s_bitset0_b32"; - case Opcode::SBitset1B32: return "s_bitset1_b32"; - case Opcode::SMinI32: return "s_min_i32"; - case Opcode::SMaxI32: return "s_max_i32"; - case Opcode::SMinU32: return "s_min_u32"; - case Opcode::SMaxU32: return "s_max_u32"; - case Opcode::SAndB32: return "s_and_b32"; - case Opcode::SAndB64: return "s_and_b64"; - case Opcode::SAndn2B32: return "s_andn2_b32"; - case Opcode::SAndn2B64: return "s_andn2_b64"; - case Opcode::SOrB32: return "s_or_b32"; - case Opcode::SOrB64: return "s_or_b64"; - case Opcode::SOrn2B32: return "s_orn2_b32"; - case Opcode::SOrn2B64: return "s_orn2_b64"; - case Opcode::SXorB32: return "s_xor_b32"; - case Opcode::SXorB64: return "s_xor_b64"; - case Opcode::SNandB32: return "s_nand_b32"; - case Opcode::SNandB64: return "s_nand_b64"; - case Opcode::SNorB32: return "s_nor_b32"; - case Opcode::SNorB64: return "s_nor_b64"; - case Opcode::SXnorB32: return "s_xnor_b32"; - case Opcode::SXnorB64: return "s_xnor_b64"; - case Opcode::SLshlB32: return "s_lshl_b32"; - case Opcode::SLshlB64: return "s_lshl_b64"; - case Opcode::SLshl1AddU32: return "s_lshl1_add_u32"; - case Opcode::SLshl2AddU32: return "s_lshl2_add_u32"; - case Opcode::SLshl3AddU32: return "s_lshl3_add_u32"; - case Opcode::SLshl4AddU32: return "s_lshl4_add_u32"; - case Opcode::SLshrB32: return "s_lshr_b32"; - case Opcode::SLshrB64: return "s_lshr_b64"; - case Opcode::SAshrI32: return "s_ashr_i32"; - case Opcode::SMulI32: return "s_mul_i32"; - case Opcode::SMulHiU32: return "s_mul_hi_u32"; - case Opcode::SMulkI32: return "s_mulk_i32"; - case Opcode::SBfeU32: return "s_bfe_u32"; - case Opcode::SBfeI32: return "s_bfe_i32"; - case Opcode::SBfeU64: return "s_bfe_u64"; - case Opcode::SBfmB32: return "s_bfm_b32"; - case Opcode::SBfmB64: return "s_bfm_b64"; - case Opcode::SCselectB32: return "s_cselect_b32"; - case Opcode::SCselectB64: return "s_cselect_b64"; - case Opcode::SPackLlB32B16: return "s_pack_ll_b32_b16"; - case Opcode::SPackLhB32B16: return "s_pack_lh_b32_b16"; - case Opcode::SPackHhB32B16: return "s_pack_hh_b32_b16"; - case Opcode::SCmpEqI32: return "s_cmp_eq_i32"; - case Opcode::SCmpLgI32: return "s_cmp_lg_i32"; - case Opcode::SCmpGtI32: return "s_cmp_gt_i32"; - case Opcode::SCmpGeI32: return "s_cmp_ge_i32"; - case Opcode::SCmpLtI32: return "s_cmp_lt_i32"; - case Opcode::SCmpLeI32: return "s_cmp_le_i32"; - case Opcode::SCmpEqU32: return "s_cmp_eq_u32"; - case Opcode::SCmpLgU32: return "s_cmp_lg_u32"; - case Opcode::SCmpGtU32: return "s_cmp_gt_u32"; - case Opcode::SCmpGeU32: return "s_cmp_ge_u32"; - case Opcode::SCmpLtU32: return "s_cmp_lt_u32"; - case Opcode::SCmpLeU32: return "s_cmp_le_u32"; - case Opcode::SCmpEqU64: return "s_cmp_eq_u64"; - case Opcode::SCmpLgU64: return "s_cmp_lg_u64"; - case Opcode::VNop: return "v_nop"; - case Opcode::VMovB32: return "v_mov_b32"; - case Opcode::VMovreldB32: return "v_movreld_b32"; - case Opcode::VMovrelsB32: return "v_movrels_b32"; - case Opcode::VReadfirstlaneB32: return "v_readfirstlane_b32"; - case Opcode::VReadlaneB32: return "v_readlane_b32"; - case Opcode::VWritelaneB32: return "v_writelane_b32"; - case Opcode::VPermlane16B32: return "v_permlane16_b32"; - case Opcode::VPermlanex16B32: return "v_permlanex16_b32"; - case Opcode::VCubeidF32: return "v_cubeid_f32"; - case Opcode::VCubescF32: return "v_cubesc_f32"; - case Opcode::VCubetcF32: return "v_cubetc_f32"; - case Opcode::VCubemaF32: return "v_cubema_f32"; - case Opcode::VCndmaskB32: return "v_cndmask_b32"; - case Opcode::VDot2cF32F16: return "v_dot2c_f32_f16"; - case Opcode::VCvtF32I32: return "v_cvt_f32_i32"; - case Opcode::VCvtF32U32: return "v_cvt_f32_u32"; - case Opcode::VCvtU32F32: return "v_cvt_u32_f32"; - case Opcode::VCvtI32F32: return "v_cvt_i32_f32"; - case Opcode::VCvtF16F32: return "v_cvt_f16_f32"; - case Opcode::VCvtF32F16: return "v_cvt_f32_f16"; - case Opcode::VCvtF16U16: return "v_cvt_f16_u16"; - case Opcode::VCvtU16F16: return "v_cvt_u16_f16"; - case Opcode::VCvtF16I16: return "v_cvt_f16_i16"; - case Opcode::VCvtI16F16: return "v_cvt_i16_f16"; - case Opcode::VCvtRpiI32F32: return "v_cvt_rpi_i32_f32"; - case Opcode::VCvtFlrI32F32: return "v_cvt_flr_i32_f32"; - case Opcode::VFrexpExpI32F32: return "v_frexp_exp_i32_f32"; - case Opcode::VFrexpMantF32: return "v_frexp_mant_f32"; - case Opcode::VCvtOffF32I4: return "v_cvt_off_f32_i4"; - case Opcode::VCvtF32Ubyte0: return "v_cvt_f32_ubyte0"; - case Opcode::VCvtF32Ubyte1: return "v_cvt_f32_ubyte1"; - case Opcode::VCvtF32Ubyte2: return "v_cvt_f32_ubyte2"; - case Opcode::VCvtF32Ubyte3: return "v_cvt_f32_ubyte3"; - case Opcode::VRcpF32: return "v_rcp_f32"; - case Opcode::VRcpIflagF32: return "v_rcp_iflag_f32"; - case Opcode::VFractF32: return "v_fract_f32"; - case Opcode::VTruncF32: return "v_trunc_f32"; - case Opcode::VCeilF32: return "v_ceil_f32"; - case Opcode::VRndneF32: return "v_rndne_f32"; - case Opcode::VFloorF32: return "v_floor_f32"; - case Opcode::VExpF32: return "v_exp_f32"; - case Opcode::VLogF32: return "v_log_f32"; - case Opcode::VRsqF32: return "v_rsq_f32"; - case Opcode::VSqrtF32: return "v_sqrt_f32"; - case Opcode::VRcpF16: return "v_rcp_f16"; - case Opcode::VSqrtF16: return "v_sqrt_f16"; - case Opcode::VRsqF16: return "v_rsq_f16"; - case Opcode::VLogF16: return "v_log_f16"; - case Opcode::VExpF16: return "v_exp_f16"; - case Opcode::VFloorF16: return "v_floor_f16"; - case Opcode::VCeilF16: return "v_ceil_f16"; - case Opcode::VTruncF16: return "v_trunc_f16"; - case Opcode::VRndneF16: return "v_rndne_f16"; - case Opcode::VSinF32: return "v_sin_f32"; - case Opcode::VCosF32: return "v_cos_f32"; - case Opcode::VNotB32: return "v_not_b32"; - case Opcode::VBfrevB32: return "v_bfrev_b32"; - case Opcode::VFfbhU32: return "v_ffbh_u32"; - case Opcode::VFfblB32: return "v_ffbl_b32"; - case Opcode::VAddF32: return "v_add_f32"; - case Opcode::VSubF32: return "v_sub_f32"; - case Opcode::VSubrevF32: return "v_subrev_f32"; - case Opcode::VMulF32: return "v_mul_f32"; - case Opcode::VMacF32: return "v_mac_f32"; - case Opcode::VMadmkF32: return "v_madmk_f32"; - case Opcode::VMadakF32: return "v_madak_f32"; - case Opcode::VMinF32: return "v_min_f32"; - case Opcode::VMaxF32: return "v_max_f32"; - case Opcode::VAddF16: return "v_add_f16"; - case Opcode::VSubF16: return "v_sub_f16"; - case Opcode::VSubrevF16: return "v_subrev_f16"; - case Opcode::VMulF16: return "v_mul_f16"; - case Opcode::VFmacF16: return "v_fmac_f16"; - case Opcode::VFmamkF16: return "v_fmamk_f16"; - case Opcode::VFmaakF16: return "v_fmaak_f16"; - case Opcode::VMinI32: return "v_min_i32"; - case Opcode::VMaxI32: return "v_max_i32"; - case Opcode::VMulI32I24: return "v_mul_i32_i24"; - case Opcode::VMulU32U24: return "v_mul_u32_u24"; - case Opcode::VMulLoU32: return "v_mul_lo_u32"; - case Opcode::VMulHiU32: return "v_mul_hi_u32"; - case Opcode::VMulLoI32: return "v_mul_lo_i32"; - case Opcode::VMulHiI32: return "v_mul_hi_i32"; - case Opcode::VCvtPkrtzF16F32: return "v_cvt_pkrtz_f16_f32"; - case Opcode::VCvtPkU8F32: return "v_cvt_pk_u8_f32"; - case Opcode::VMadF32: return "v_mad_f32"; - case Opcode::VMadI32I24: return "v_mad_i32_i24"; - case Opcode::VMadU32U24: return "v_mad_u32_u24"; - case Opcode::VMadU64U32: return "v_mad_u64_u32"; - case Opcode::VFmaF32: return "v_fma_f32"; - case Opcode::VFmaF16: return "v_fma_f16"; - case Opcode::VPackB32F16: return "v_pack_b32_f16"; - case Opcode::VBfeU32: return "v_bfe_u32"; - case Opcode::VBfeI32: return "v_bfe_i32"; - case Opcode::VBfiB32: return "v_bfi_b32"; - case Opcode::VAlignbitB32: return "v_alignbit_b32"; - case Opcode::VAlignbyteB32: return "v_alignbyte_b32"; - case Opcode::VMin3F32: return "v_min3_f32"; - case Opcode::VMin3I32: return "v_min3_i32"; - case Opcode::VMin3U32: return "v_min3_u32"; - case Opcode::VMin3F16: return "v_min3_f16"; - case Opcode::VMax3F32: return "v_max3_f32"; - case Opcode::VMax3I32: return "v_max3_i32"; - case Opcode::VMax3U32: return "v_max3_u32"; - case Opcode::VMax3F16: return "v_max3_f16"; - case Opcode::VMed3F32: return "v_med3_f32"; - case Opcode::VMed3I32: return "v_med3_i32"; - case Opcode::VMed3U32: return "v_med3_u32"; - case Opcode::VMed3F16: return "v_med3_f16"; - case Opcode::VMed3I16: return "v_med3_i16"; - case Opcode::VSadU32: return "v_sad_u32"; - case Opcode::VAdd3U32: return "v_add3_u32"; - case Opcode::VLshlAddU32: return "v_lshl_add_u32"; - case Opcode::VAddLshlU32: return "v_add_lshl_u32"; - case Opcode::VXadU32: return "v_xad_u32"; - case Opcode::VLshlOrB32: return "v_lshl_or_b32"; - case Opcode::VAndOrB32: return "v_and_or_b32"; - case Opcode::VOr3B32: return "v_or3_b32"; - case Opcode::VXor3B32: return "v_xor3_b32"; - case Opcode::VAddI32: return "v_add_i32"; - case Opcode::VSubI32: return "v_sub_i32"; - case Opcode::VSubrevI32: return "v_subrev_i32"; - case Opcode::VBfmB32: return "v_bfm_b32"; - case Opcode::VLdexpF32: return "v_ldexp_f32"; - case Opcode::VCvtPknormI16F32: return "v_cvt_pknorm_i16_f32"; - case Opcode::VCvtPknormU16F32: return "v_cvt_pknorm_u16_f32"; - case Opcode::VCvtPkU16U32: return "v_cvt_pk_u16_u32"; - case Opcode::VCvtPkI16I32: return "v_cvt_pk_i16_i32"; - case Opcode::VPkMadI16: return "v_pk_mad_i16"; - case Opcode::VPkMulLoU16: return "v_pk_mul_lo_u16"; - case Opcode::VPkAddI16: return "v_pk_add_i16"; - case Opcode::VPkSubI16: return "v_pk_sub_i16"; - case Opcode::VPkLshlrevB16: return "v_pk_lshlrev_b16"; - case Opcode::VPkLshrrevB16: return "v_pk_lshrrev_b16"; - case Opcode::VPkAshrrevI16: return "v_pk_ashrrev_i16"; - case Opcode::VPkMaxI16: return "v_pk_max_i16"; - case Opcode::VPkMinI16: return "v_pk_min_i16"; - case Opcode::VPkMadU16: return "v_pk_mad_u16"; - case Opcode::VPkAddF16: return "v_pk_add_f16"; - case Opcode::VPkMulF16: return "v_pk_mul_f16"; - case Opcode::VPkMinF16: return "v_pk_min_f16"; - case Opcode::VPkMaxF16: return "v_pk_max_f16"; - case Opcode::VPkFmaF16: return "v_pk_fma_f16"; - case Opcode::VPkFmacF16: return "v_pk_fmac_f16"; - case Opcode::VPkAddU16: return "v_pk_add_u16"; - case Opcode::VPkSubU16: return "v_pk_sub_u16"; - case Opcode::VPkMaxU16: return "v_pk_max_u16"; - case Opcode::VPkMinU16: return "v_pk_min_u16"; - case Opcode::VMadMixloF16: return "v_mad_mixlo_f16"; - case Opcode::VMadMixhiF16: return "v_mad_mixhi_f16"; - case Opcode::VAddNcU32: return "v_add_nc_u32"; - case Opcode::VAddcU32: return "v_addc_u32"; - case Opcode::VSubrevCoCiU32: return "v_subrev_co_ci_u32"; - case Opcode::VSubNcU32: return "v_sub_nc_u32"; - case Opcode::VSubrevNcU32: return "v_subrev_nc_u32"; - case Opcode::VAddNcU16: return "v_add_nc_u16"; - case Opcode::VSubNcU16: return "v_sub_nc_u16"; - case Opcode::VMaxU16: return "v_max_u16"; - case Opcode::VMaxI16: return "v_max_i16"; - case Opcode::VMinU16: return "v_min_u16"; - case Opcode::VMinI16: return "v_min_i16"; - case Opcode::VAddNcI16: return "v_add_nc_i16"; - case Opcode::VSubNcI16: return "v_sub_nc_i16"; - case Opcode::VAndB32: return "v_and_b32"; - case Opcode::VOrB32: return "v_or_b32"; - case Opcode::VXorB32: return "v_xor_b32"; - case Opcode::VXnorB32: return "v_xnor_b32"; - case Opcode::VLshlB32: return "v_lshl_b32"; - case Opcode::VLshlrevB32: return "v_lshlrev_b32"; - case Opcode::VLshrB32: return "v_lshr_b32"; - case Opcode::VLshrrevB32: return "v_lshrrev_b32"; - case Opcode::VAshrI32: return "v_ashr_i32"; - case Opcode::VAshrrevI32: return "v_ashrrev_i32"; - case Opcode::VLshlrevB16: return "v_lshlrev_b16"; - case Opcode::VLshrrevB16: return "v_lshrrev_b16"; - case Opcode::VAshrrevI16: return "v_ashrrev_i16"; - case Opcode::VBcntU32B32: return "v_bcnt_u32_b32"; - case Opcode::VMbcntLoU32B32: return "v_mbcnt_lo_u32_b32"; - case Opcode::VMbcntHiU32B32: return "v_mbcnt_hi_u32_b32"; - case Opcode::VMinU32: return "v_min_u32"; - case Opcode::VMaxU32: return "v_max_u32"; - case Opcode::VMaxF16: return "v_max_f16"; - case Opcode::VMinF16: return "v_min_f16"; - case Opcode::VCmpFF32: return "v_cmp_f_f32"; - case Opcode::VCmpLtF32: return "v_cmp_lt_f32"; - case Opcode::VCmpEqF32: return "v_cmp_eq_f32"; - case Opcode::VCmpLeF32: return "v_cmp_le_f32"; - case Opcode::VCmpGtF32: return "v_cmp_gt_f32"; - case Opcode::VCmpLgF32: return "v_cmp_lg_f32"; - case Opcode::VCmpGeF32: return "v_cmp_ge_f32"; - case Opcode::VCmpOF32: return "v_cmp_o_f32"; - case Opcode::VCmpUF32: return "v_cmp_u_f32"; - case Opcode::VCmpNgeF32: return "v_cmp_nge_f32"; - case Opcode::VCmpNlgF32: return "v_cmp_nlg_f32"; - case Opcode::VCmpNgtF32: return "v_cmp_ngt_f32"; - case Opcode::VCmpNleF32: return "v_cmp_nle_f32"; - case Opcode::VCmpNeqF32: return "v_cmp_neq_f32"; - case Opcode::VCmpNltF32: return "v_cmp_nlt_f32"; - case Opcode::VCmpTruF32: return "v_cmp_tru_f32"; - case Opcode::VCmpxLtF32: return "v_cmpx_lt_f32"; - case Opcode::VCmpxEqF32: return "v_cmpx_eq_f32"; - case Opcode::VCmpxLeF32: return "v_cmpx_le_f32"; - case Opcode::VCmpxGtF32: return "v_cmpx_gt_f32"; - case Opcode::VCmpxLgF32: return "v_cmpx_lg_f32"; - case Opcode::VCmpxGeF32: return "v_cmpx_ge_f32"; - case Opcode::VCmpxNgeF32: return "v_cmpx_nge_f32"; - case Opcode::VCmpxNlgF32: return "v_cmpx_nlg_f32"; - case Opcode::VCmpxNgtF32: return "v_cmpx_ngt_f32"; - case Opcode::VCmpxNleF32: return "v_cmpx_nle_f32"; - case Opcode::VCmpxNeqF32: return "v_cmpx_neq_f32"; - case Opcode::VCmpxNltF32: return "v_cmpx_nlt_f32"; - case Opcode::VCmpFI32: return "v_cmp_f_i32"; - case Opcode::VCmpLtI32: return "v_cmp_lt_i32"; - case Opcode::VCmpEqI32: return "v_cmp_eq_i32"; - case Opcode::VCmpLeI32: return "v_cmp_le_i32"; - case Opcode::VCmpGtI32: return "v_cmp_gt_i32"; - case Opcode::VCmpNeI32: return "v_cmp_ne_i32"; - case Opcode::VCmpGeI32: return "v_cmp_ge_i32"; - case Opcode::VCmpTI32: return "v_cmp_t_i32"; - case Opcode::VCmpClassF32: return "v_cmp_class_f32"; - case Opcode::VCmpLtI16: return "v_cmp_lt_i16"; - case Opcode::VCmpEqI16: return "v_cmp_eq_i16"; - case Opcode::VCmpLeI16: return "v_cmp_le_i16"; - case Opcode::VCmpGtI16: return "v_cmp_gt_i16"; - case Opcode::VCmpNeI16: return "v_cmp_ne_i16"; - case Opcode::VCmpGeI16: return "v_cmp_ge_i16"; - case Opcode::VCmpLtF16: return "v_cmp_lt_f16"; - case Opcode::VCmpEqF16: return "v_cmp_eq_f16"; - case Opcode::VCmpLeF16: return "v_cmp_le_f16"; - case Opcode::VCmpGtF16: return "v_cmp_gt_f16"; - case Opcode::VCmpLgF16: return "v_cmp_lg_f16"; - case Opcode::VCmpGeF16: return "v_cmp_ge_f16"; - case Opcode::VCmpNeqF16: return "v_cmp_neq_f16"; - case Opcode::VCmpxLtF16: return "v_cmpx_lt_f16"; - case Opcode::VCmpxEqF16: return "v_cmpx_eq_f16"; - case Opcode::VCmpxLeF16: return "v_cmpx_le_f16"; - case Opcode::VCmpxGtF16: return "v_cmpx_gt_f16"; - case Opcode::VCmpxGeF16: return "v_cmpx_ge_f16"; - case Opcode::VCmpxNeqF16: return "v_cmpx_neq_f16"; - case Opcode::VCmpxNltF16: return "v_cmpx_nlt_f16"; - case Opcode::VCmpxLtI32: return "v_cmpx_lt_i32"; - case Opcode::VCmpxEqI32: return "v_cmpx_eq_i32"; - case Opcode::VCmpxLeI32: return "v_cmpx_le_i32"; - case Opcode::VCmpxGtI32: return "v_cmpx_gt_i32"; - case Opcode::VCmpxNeI32: return "v_cmpx_ne_i32"; - case Opcode::VCmpxGeI32: return "v_cmpx_ge_i32"; - case Opcode::VCmpLtU16: return "v_cmp_lt_u16"; - case Opcode::VCmpEqU16: return "v_cmp_eq_u16"; - case Opcode::VCmpLeU16: return "v_cmp_le_u16"; - case Opcode::VCmpGtU16: return "v_cmp_gt_u16"; - case Opcode::VCmpNeU16: return "v_cmp_ne_u16"; - case Opcode::VCmpGeU16: return "v_cmp_ge_u16"; - case Opcode::VCmpFU32: return "v_cmp_f_u32"; - case Opcode::VCmpLtU32: return "v_cmp_lt_u32"; - case Opcode::VCmpEqU32: return "v_cmp_eq_u32"; - case Opcode::VCmpLeU32: return "v_cmp_le_u32"; - case Opcode::VCmpGtU32: return "v_cmp_gt_u32"; - case Opcode::VCmpNeU32: return "v_cmp_ne_u32"; - case Opcode::VCmpGeU32: return "v_cmp_ge_u32"; - case Opcode::VCmpTU32: return "v_cmp_t_u32"; - case Opcode::VCmpEqI64: return "v_cmp_eq_i64"; - case Opcode::VCmpGtU64: return "v_cmp_gt_u64"; - case Opcode::VCmpNeU64: return "v_cmp_ne_u64"; - case Opcode::VCmpxLtU32: return "v_cmpx_lt_u32"; - case Opcode::VCmpxEqU32: return "v_cmpx_eq_u32"; - case Opcode::VCmpxLeU32: return "v_cmpx_le_u32"; - case Opcode::VCmpxGtU32: return "v_cmpx_gt_u32"; - case Opcode::VCmpxNeU32: return "v_cmpx_ne_u32"; - case Opcode::VCmpxGeU32: return "v_cmpx_ge_u32"; - case Opcode::SLoadDword: return "s_load_dword"; - case Opcode::SLoadDwordx2: return "s_load_dwordx2"; - case Opcode::SLoadDwordx4: return "s_load_dwordx4"; - case Opcode::SLoadDwordx8: return "s_load_dwordx8"; - case Opcode::SLoadDwordx16: return "s_load_dwordx16"; - case Opcode::SBufferLoadDword: return "s_buffer_load_dword"; - case Opcode::SBufferLoadDwordx2: return "s_buffer_load_dwordx2"; - case Opcode::SBufferLoadDwordx4: return "s_buffer_load_dwordx4"; - case Opcode::SBufferLoadDwordx8: return "s_buffer_load_dwordx8"; - case Opcode::SBufferLoadDwordx16: return "s_buffer_load_dwordx16"; - case Opcode::BufferLoadFormatX: return "buffer_load_format_x"; - case Opcode::BufferLoadFormatXy: return "buffer_load_format_xy"; - case Opcode::BufferLoadFormatXyz: return "buffer_load_format_xyz"; - case Opcode::BufferLoadFormatXyzw: return "buffer_load_format_xyzw"; - case Opcode::BufferStoreFormatX: return "buffer_store_format_x"; - case Opcode::BufferStoreFormatXy: return "buffer_store_format_xy"; - case Opcode::BufferStoreFormatXyz: return "buffer_store_format_xyz"; - case Opcode::BufferStoreFormatXyzw: return "buffer_store_format_xyzw"; - case Opcode::BufferLoadUbyte: return "buffer_load_ubyte"; - case Opcode::BufferLoadSbyte: return "buffer_load_sbyte"; - case Opcode::BufferLoadUshort: return "buffer_load_ushort"; - case Opcode::BufferLoadSshort: return "buffer_load_sshort"; - case Opcode::BufferLoadDword: return "buffer_load_dword"; - case Opcode::BufferLoadDwordx2: return "buffer_load_dwordx2"; - case Opcode::BufferLoadDwordx3: return "buffer_load_dwordx3"; - case Opcode::BufferLoadDwordx4: return "buffer_load_dwordx4"; - case Opcode::BufferStoreByte: return "buffer_store_byte"; - case Opcode::BufferStoreShort: return "buffer_store_short"; - case Opcode::BufferStoreDword: return "buffer_store_dword"; - case Opcode::BufferStoreDwordx2: return "buffer_store_dwordx2"; - case Opcode::BufferStoreDwordx3: return "buffer_store_dwordx3"; - case Opcode::BufferStoreDwordx4: return "buffer_store_dwordx4"; - case Opcode::TBufferLoadFormatX: return "tbuffer_load_format_x"; - case Opcode::TBufferLoadFormatXy: return "tbuffer_load_format_xy"; - case Opcode::TBufferLoadFormatXyz: return "tbuffer_load_format_xyz"; - case Opcode::TBufferLoadFormatXyzw: return "tbuffer_load_format_xyzw"; - case Opcode::TBufferStoreFormatX: return "tbuffer_store_format_x"; - case Opcode::TBufferStoreFormatXy: return "tbuffer_store_format_xy"; - case Opcode::TBufferStoreFormatXyz: return "tbuffer_store_format_xyz"; - case Opcode::TBufferStoreFormatXyzw: return "tbuffer_store_format_xyzw"; - case Opcode::BufferAtomicSwap: return "buffer_atomic_swap"; - case Opcode::BufferAtomicAdd: return "buffer_atomic_add"; - case Opcode::BufferAtomicSub: return "buffer_atomic_sub"; - case Opcode::BufferAtomicSMin: return "buffer_atomic_smin"; - case Opcode::BufferAtomicUMin: return "buffer_atomic_umin"; - case Opcode::BufferAtomicSMax: return "buffer_atomic_smax"; - case Opcode::BufferAtomicUMax: return "buffer_atomic_umax"; - case Opcode::BufferAtomicAnd: return "buffer_atomic_and"; - case Opcode::BufferAtomicOr: return "buffer_atomic_or"; - case Opcode::BufferAtomicXor: return "buffer_atomic_xor"; - case Opcode::BufferAtomicFMin: return "buffer_atomic_fmin"; - case Opcode::BufferAtomicFMax: return "buffer_atomic_fmax"; - case Opcode::FlatLoadUbyte: return "flat_load_ubyte"; - case Opcode::FlatLoadSbyte: return "flat_load_sbyte"; - case Opcode::FlatLoadUshort: return "flat_load_ushort"; - case Opcode::FlatLoadSshort: return "flat_load_sshort"; - case Opcode::FlatLoadDword: return "flat_load_dword"; - case Opcode::FlatLoadDwordx2: return "flat_load_dwordx2"; - case Opcode::FlatLoadDwordx3: return "flat_load_dwordx3"; - case Opcode::FlatLoadDwordx4: return "flat_load_dwordx4"; - case Opcode::FlatStoreByte: return "flat_store_byte"; - case Opcode::FlatStoreShort: return "flat_store_short"; - case Opcode::FlatStoreDword: return "flat_store_dword"; - case Opcode::FlatStoreDwordx2: return "flat_store_dwordx2"; - case Opcode::FlatStoreDwordx3: return "flat_store_dwordx3"; - case Opcode::FlatStoreDwordx4: return "flat_store_dwordx4"; - case Opcode::DsAddU32: return "ds_add_u32"; - case Opcode::DsAddRtnU32: return "ds_add_rtn_u32"; - case Opcode::DsSubU32: return "ds_sub_u32"; - case Opcode::DsSubRtnU32: return "ds_sub_rtn_u32"; - case Opcode::DsMinI32: return "ds_min_i32"; - case Opcode::DsMinRtnI32: return "ds_min_rtn_i32"; - case Opcode::DsMaxI32: return "ds_max_i32"; - case Opcode::DsMaxRtnI32: return "ds_max_rtn_i32"; - case Opcode::DsMinU32: return "ds_min_u32"; - case Opcode::DsMinRtnU32: return "ds_min_rtn_u32"; - case Opcode::DsMaxU32: return "ds_max_u32"; - case Opcode::DsMaxRtnU32: return "ds_max_rtn_u32"; - case Opcode::DsAndB32: return "ds_and_b32"; - case Opcode::DsAndRtnB32: return "ds_and_rtn_b32"; - case Opcode::DsOrB32: return "ds_or_b32"; - case Opcode::DsOrRtnB32: return "ds_or_rtn_b32"; - case Opcode::DsXorB32: return "ds_xor_b32"; - case Opcode::DsXorRtnB32: return "ds_xor_rtn_b32"; - case Opcode::DsWrxchgRtnB32: return "ds_wrxchg_rtn_b32"; - case Opcode::DsMinF32: return "ds_min_f32"; - case Opcode::DsMaxF32: return "ds_max_f32"; - case Opcode::DsSwizzleB32: return "ds_swizzle_b32"; - case Opcode::DsConsume: return "ds_consume"; - case Opcode::DsAppend: return "ds_append"; - case Opcode::DsReadSbyte: return "ds_read_i8"; - case Opcode::DsReadUbyte: return "ds_read_u8"; - case Opcode::DsReadSshort: return "ds_read_i16"; - case Opcode::DsReadUshort: return "ds_read_u16"; - case Opcode::DsRead2B32: return "ds_read2_b32"; - case Opcode::DsReadB32: return "ds_read_b32"; - case Opcode::DsReadB64: return "ds_read_b64"; - case Opcode::DsRead2B64: return "ds_read2_b64"; - case Opcode::DsRead2St64B64: return "ds_read2st64_b64"; - case Opcode::DsReadB96: return "ds_read_b96"; - case Opcode::DsReadB128: return "ds_read_b128"; - case Opcode::DsWriteByte: return "ds_write_b8"; - case Opcode::DsWriteShort: return "ds_write_b16"; - case Opcode::DsWrite2B32: return "ds_write2_b32"; - case Opcode::DsWrite2St64B32: return "ds_write2st64_b32"; - case Opcode::DsWrite2B64: return "ds_write2_b64"; - case Opcode::DsWrite2St64B64: return "ds_write2st64_b64"; - case Opcode::DsWriteB32: return "ds_write_b32"; - case Opcode::DsWriteB64: return "ds_write_b64"; - case Opcode::DsWriteB96: return "ds_write_b96"; - case Opcode::DsWriteB128: return "ds_write_b128"; - case Opcode::DsWriteAddtidB32: return "ds_write_addtid_b32"; - case Opcode::DsReadAddtidB32: return "ds_read_addtid_b32"; - case Opcode::ImageGetResinfo: return "image_get_resinfo"; - case Opcode::ImageGetLod: return "image_get_lod"; - case Opcode::ImageLoad: return "image_load"; - case Opcode::ImageLoadMip: return "image_load_mip"; - case Opcode::ImageStore: return "image_store"; - case Opcode::ImageStoreMip: return "image_store_mip"; - case Opcode::ImageAtomicAdd: return "image_atomic_add"; - case Opcode::ImageAtomicUMin: return "image_atomic_umin"; - case Opcode::ImageAtomicUMax: return "image_atomic_umax"; - case Opcode::ImageAtomicAnd: return "image_atomic_and"; - case Opcode::ImageAtomicOr: return "image_atomic_or"; - case Opcode::ImageAtomicXor: return "image_atomic_xor"; - case Opcode::ImageSample: return "image_sample"; - case Opcode::ImageGather4Lz: return "image_gather4_lz"; - case Opcode::ImageGather4C: return "image_gather4_c"; - case Opcode::ImageGather4CLz: return "image_gather4_c_lz"; - case Opcode::ImageGather4LzO: return "image_gather4_lz_o"; - case Opcode::ImageGather4CO: return "image_gather4_c_o"; - case Opcode::ImageGather4CLzO: return "image_gather4_c_lz_o"; - case Opcode::ImageGather4H: return "image_gather4h"; - case Opcode::VInterpP1F32: return "v_interp_p1_f32"; - case Opcode::VInterpP2F32: return "v_interp_p2_f32"; - case Opcode::VInterpMovF32: return "v_interp_mov_f32"; - case Opcode::SNop: return "s_nop"; - case Opcode::SWaitcnt: return "s_waitcnt"; - case Opcode::SWaitcntDepctr: return "s_waitcnt_depctr"; - case Opcode::SBarrier: return "s_barrier"; - case Opcode::SBranch: return "s_branch"; - case Opcode::SCbranchScc0: return "s_cbranch_scc0"; - case Opcode::SCbranchScc1: return "s_cbranch_scc1"; - case Opcode::SCbranchVccz: return "s_cbranch_vccz"; - case Opcode::SCbranchVccnz: return "s_cbranch_vccnz"; - case Opcode::SCbranchExecz: return "s_cbranch_execz"; - case Opcode::SCbranchExecnz: return "s_cbranch_execnz"; - case Opcode::SSendmsg: return "s_sendmsg"; - case Opcode::SSetregB32: return "s_setreg_b32"; - case Opcode::SSleep: return "s_sleep"; - case Opcode::STrap: return "s_trap"; - case Opcode::STtraceData: return "s_ttracedata"; - case Opcode::SInstPrefetch: return "s_inst_prefetch"; - case Opcode::SEndpgm: return "s_endpgm"; - case Opcode::Exp: return "exp"; - case Opcode::Unsupported: return "unsupported"; - default: return "unknown"; - } -} - std::string OperandToString(const Operand& operand) { std::string text; switch (operand.kind) { @@ -1018,9 +475,9 @@ std::string OperandToString(const Operand& operand) { } std::string InstructionToString(const Instruction& inst) { - if (inst.opcode == Opcode::Unsupported) { + if (inst.opcode == Opcode::UNSUPPORTED) { return fmt::format("0x{:08x}: unsupported family={} opcode=0x{:02x} raw=[{}] reason={}", - inst.pc, FamilyToString(inst.family).c_str(), inst.opcode_id, + inst.pc, magic_enum::enum_name(inst.family), inst.opcode_id, RawWordsToString(inst).c_str(), inst.unsupported_reason); } if (inst.family == Family::SOPC) { @@ -1028,197 +485,197 @@ std::string InstructionToString(const Instruction& inst) { } switch (inst.opcode) { - case Opcode::SMovB32: - case Opcode::SMovB64: + case Opcode::S_MOV_B32: + case Opcode::S_MOV_B64: return WithUnsupportedReason(inst, fmt::format("0x{:08x}: {} {}, {}", inst.pc, - OpcodeToString(inst.opcode).c_str(), + magic_enum::enum_name(inst.opcode), OperandToString(inst.dst).c_str(), OperandToString(inst.src0).c_str())); - case Opcode::SAbsI32: - case Opcode::SBrevB32: - case Opcode::SBcnt1I32B32: - case Opcode::SFf1I32B32: - case Opcode::SFf1I32B64: - case Opcode::SNotB64: - case Opcode::SWqmB64: - case Opcode::SAndSaveexecB32: - case Opcode::SAndn1SaveexecB32: - case Opcode::SAndSaveexecB64: - case Opcode::SOrn2SaveexecB64: - case Opcode::SAndn1SaveexecB64: + case Opcode::S_ABS_I32: + case Opcode::S_BREV_B32: + case Opcode::S_BCNT1_I32_B32: + case Opcode::S_FF1_I32_B32: + case Opcode::S_FF1_I32_B64: + case Opcode::S_NOT_B64: + case Opcode::S_WQM_B64: + case Opcode::S_AND_SAVEEXEC_B32: + case Opcode::S_ANDN1_SAVEEXEC_B32: + case Opcode::S_AND_SAVEEXEC_B64: + case Opcode::S_ORN2_SAVEEXEC_B64: + case Opcode::S_ANDN1_SAVEEXEC_B64: return WithUnsupportedReason(inst, fmt::format("0x{:08x}: {} {}, {}", inst.pc, - OpcodeToString(inst.opcode).c_str(), + magic_enum::enum_name(inst.opcode), OperandToString(inst.dst).c_str(), OperandToString(inst.src0).c_str())); - case Opcode::SGetpcB64: + case Opcode::S_GETPC_B64: return WithUnsupportedReason(inst, fmt::format("0x{:08x}: s_getpc_b64 {}", inst.pc, OperandToString(inst.dst).c_str())); - case Opcode::SSetpcB64: + case Opcode::S_SETPC_B64: return WithUnsupportedReason(inst, fmt::format("0x{:08x}: s_setpc_b64 {}", inst.pc, OperandToString(inst.src0).c_str())); - case Opcode::SSetregB32: + case Opcode::S_SETREG_B32: return WithUnsupportedReason(inst, fmt::format("0x{:08x}: s_setreg_b32 {}, {}", inst.pc, OperandToString(inst.src0).c_str(), OperandToString(inst.src1).c_str())); - case Opcode::SNop: - case Opcode::SWaitcnt: - case Opcode::SWaitcntDepctr: - case Opcode::SSleep: - case Opcode::STrap: - case Opcode::SSendmsg: - case Opcode::STtraceData: - case Opcode::SInstPrefetch: + case Opcode::S_NOP: + case Opcode::S_WAITCNT: + case Opcode::S_WAITCNT_DEPCTR: + case Opcode::S_SLEEP: + case Opcode::S_TRAP: + case Opcode::S_SENDMSG: + case Opcode::S_TTRACEDATA: + case Opcode::S_INST_PREFETCH: return WithUnsupportedReason(inst, fmt::format("0x{:08x}: {} {}", inst.pc, - OpcodeToString(inst.opcode).c_str(), + magic_enum::enum_name(inst.opcode), OperandToString(inst.src0).c_str())); - case Opcode::SBarrier: + case Opcode::S_BARRIER: return WithUnsupportedReason(inst, fmt::format("0x{:08x}: s_barrier", inst.pc)); - case Opcode::VNop: + case Opcode::V_NOP: return WithUnsupportedReason(inst, fmt::format("0x{:08x}: v_nop", inst.pc)); - case Opcode::SEndpgm: + case Opcode::S_ENDPGM: return WithUnsupportedReason(inst, fmt::format("0x{:08x}: s_endpgm", inst.pc)); - case Opcode::SBranch: - case Opcode::SCbranchScc0: - case Opcode::SCbranchScc1: - case Opcode::SCbranchVccz: - case Opcode::SCbranchVccnz: - case Opcode::SCbranchExecz: - case Opcode::SCbranchExecnz: + case Opcode::S_BRANCH: + case Opcode::S_CBRANCH_SCC0: + case Opcode::S_CBRANCH_SCC1: + case Opcode::S_CBRANCH_VCCZ: + case Opcode::S_CBRANCH_VCCNZ: + case Opcode::S_CBRANCH_EXECZ: + case Opcode::S_CBRANCH_EXECNZ: return WithUnsupportedReason(inst, fmt::format("0x{:08x}: {} 0x{:08x}", inst.pc, - OpcodeToString(inst.opcode).c_str(), + magic_enum::enum_name(inst.opcode), inst.branch_target)); - case Opcode::Exp: return WithUnsupportedReason(inst, FormatExp(inst)); - case Opcode::ImageSample: - case Opcode::ImageStore: - case Opcode::ImageStoreMip: - case Opcode::ImageAtomicAdd: - case Opcode::ImageAtomicUMin: - case Opcode::ImageAtomicUMax: - case Opcode::ImageAtomicAnd: - case Opcode::ImageAtomicOr: - case Opcode::ImageAtomicXor: - case Opcode::ImageLoad: - case Opcode::ImageLoadMip: - case Opcode::ImageGetResinfo: - case Opcode::ImageGetLod: - case Opcode::ImageGather4Lz: - case Opcode::ImageGather4C: - case Opcode::ImageGather4CLz: - case Opcode::ImageGather4LzO: - case Opcode::ImageGather4CO: - case Opcode::ImageGather4CLzO: - case Opcode::ImageGather4H: return WithUnsupportedReason(inst, FormatMimg(inst)); - case Opcode::SLoadDword: - case Opcode::SLoadDwordx2: - case Opcode::SLoadDwordx4: - case Opcode::SLoadDwordx8: - case Opcode::SLoadDwordx16: - case Opcode::SBufferLoadDword: - case Opcode::SBufferLoadDwordx2: - case Opcode::SBufferLoadDwordx4: - case Opcode::SBufferLoadDwordx8: - case Opcode::SBufferLoadDwordx16: - case Opcode::BufferLoadFormatX: - case Opcode::BufferLoadFormatXy: - case Opcode::BufferLoadFormatXyz: - case Opcode::BufferLoadFormatXyzw: - case Opcode::BufferStoreFormatX: - case Opcode::BufferStoreFormatXy: - case Opcode::BufferStoreFormatXyz: - case Opcode::BufferStoreFormatXyzw: - case Opcode::BufferLoadUbyte: - case Opcode::BufferLoadUshort: - case Opcode::BufferLoadDword: - case Opcode::BufferLoadDwordx2: - case Opcode::BufferLoadDwordx3: - case Opcode::BufferLoadDwordx4: - case Opcode::BufferStoreByte: - case Opcode::BufferStoreShort: - case Opcode::BufferStoreDword: - case Opcode::BufferStoreDwordx2: - case Opcode::BufferStoreDwordx3: - case Opcode::BufferStoreDwordx4: - case Opcode::TBufferLoadFormatX: - case Opcode::TBufferLoadFormatXy: - case Opcode::TBufferLoadFormatXyz: - case Opcode::TBufferLoadFormatXyzw: - case Opcode::TBufferStoreFormatX: - case Opcode::TBufferStoreFormatXy: - case Opcode::TBufferStoreFormatXyz: - case Opcode::TBufferStoreFormatXyzw: - case Opcode::BufferAtomicSwap: - case Opcode::BufferAtomicAdd: - case Opcode::BufferAtomicSub: - case Opcode::BufferAtomicSMin: - case Opcode::BufferAtomicUMin: - case Opcode::BufferAtomicSMax: - case Opcode::BufferAtomicUMax: - case Opcode::BufferAtomicAnd: - case Opcode::BufferAtomicOr: - case Opcode::BufferAtomicXor: - case Opcode::BufferAtomicFMin: - case Opcode::BufferAtomicFMax: - case Opcode::BufferLoadSbyte: - case Opcode::BufferLoadSshort: - case Opcode::FlatLoadUbyte: - case Opcode::FlatLoadSbyte: - case Opcode::FlatLoadUshort: - case Opcode::FlatLoadSshort: - case Opcode::FlatLoadDword: - case Opcode::FlatLoadDwordx2: - case Opcode::FlatLoadDwordx3: - case Opcode::FlatLoadDwordx4: - case Opcode::FlatStoreByte: - case Opcode::FlatStoreShort: - case Opcode::FlatStoreDword: - case Opcode::FlatStoreDwordx2: - case Opcode::FlatStoreDwordx3: - case Opcode::FlatStoreDwordx4: - case Opcode::DsAddU32: - case Opcode::DsAddRtnU32: - case Opcode::DsSubU32: - case Opcode::DsSubRtnU32: - case Opcode::DsMinI32: - case Opcode::DsMinRtnI32: - case Opcode::DsMaxI32: - case Opcode::DsMaxRtnI32: - case Opcode::DsMinU32: - case Opcode::DsMinRtnU32: - case Opcode::DsMaxU32: - case Opcode::DsMaxRtnU32: - case Opcode::DsAndB32: - case Opcode::DsAndRtnB32: - case Opcode::DsOrB32: - case Opcode::DsOrRtnB32: - case Opcode::DsXorB32: - case Opcode::DsXorRtnB32: - case Opcode::DsWrxchgRtnB32: - case Opcode::DsMinF32: - case Opcode::DsMaxF32: - case Opcode::DsSwizzleB32: - case Opcode::DsReadSbyte: - case Opcode::DsReadUbyte: - case Opcode::DsReadSshort: - case Opcode::DsReadUshort: - case Opcode::DsRead2B32: - case Opcode::DsReadB32: - case Opcode::DsReadB64: - case Opcode::DsRead2B64: - case Opcode::DsRead2St64B64: - case Opcode::DsReadB96: - case Opcode::DsReadB128: - case Opcode::DsWriteByte: - case Opcode::DsWriteShort: - case Opcode::DsWrite2B32: - case Opcode::DsWrite2St64B32: - case Opcode::DsWrite2B64: - case Opcode::DsWrite2St64B64: - case Opcode::DsWriteB32: - case Opcode::DsWriteB64: - case Opcode::DsWriteB96: - case Opcode::DsWriteB128: - case Opcode::DsWriteAddtidB32: - case Opcode::DsReadAddtidB32: return WithUnsupportedReason(inst, FormatMemory(inst)); + case Opcode::EXP: return WithUnsupportedReason(inst, FormatExp(inst)); + case Opcode::IMAGE_SAMPLE: + case Opcode::IMAGE_STORE: + case Opcode::IMAGE_STORE_MIP: + case Opcode::IMAGE_ATOMIC_ADD: + case Opcode::IMAGE_ATOMIC_UMIN: + case Opcode::IMAGE_ATOMIC_UMAX: + case Opcode::IMAGE_ATOMIC_AND: + case Opcode::IMAGE_ATOMIC_OR: + case Opcode::IMAGE_ATOMIC_XOR: + case Opcode::IMAGE_LOAD: + case Opcode::IMAGE_LOAD_MIP: + case Opcode::IMAGE_GET_RESINFO: + case Opcode::IMAGE_GET_LOD: + case Opcode::IMAGE_GATHER4_LZ: + case Opcode::IMAGE_GATHER4_C: + case Opcode::IMAGE_GATHER4_C_LZ: + case Opcode::IMAGE_GATHER4_LZ_O: + case Opcode::IMAGE_GATHER4_C_O: + case Opcode::IMAGE_GATHER4_C_LZ_O: + case Opcode::IMAGE_GATHER4H: return WithUnsupportedReason(inst, FormatMimg(inst)); + case Opcode::S_LOAD_DWORD: + case Opcode::S_LOAD_DWORDX2: + case Opcode::S_LOAD_DWORDX4: + case Opcode::S_LOAD_DWORDX8: + case Opcode::S_LOAD_DWORDX16: + case Opcode::S_BUFFER_LOAD_DWORD: + case Opcode::S_BUFFER_LOAD_DWORDX2: + case Opcode::S_BUFFER_LOAD_DWORDX4: + case Opcode::S_BUFFER_LOAD_DWORDX8: + case Opcode::S_BUFFER_LOAD_DWORDX16: + case Opcode::BUFFER_LOAD_FORMAT_X: + case Opcode::BUFFER_LOAD_FORMAT_XY: + case Opcode::BUFFER_LOAD_FORMAT_XYZ: + case Opcode::BUFFER_LOAD_FORMAT_XYZW: + case Opcode::BUFFER_STORE_FORMAT_X: + case Opcode::BUFFER_STORE_FORMAT_XY: + case Opcode::BUFFER_STORE_FORMAT_XYZ: + case Opcode::BUFFER_STORE_FORMAT_XYZW: + case Opcode::BUFFER_LOAD_UBYTE: + case Opcode::BUFFER_LOAD_USHORT: + case Opcode::BUFFER_LOAD_DWORD: + case Opcode::BUFFER_LOAD_DWORDX2: + case Opcode::BUFFER_LOAD_DWORDX3: + case Opcode::BUFFER_LOAD_DWORDX4: + case Opcode::BUFFER_STORE_BYTE: + case Opcode::BUFFER_STORE_SHORT: + case Opcode::BUFFER_STORE_DWORD: + case Opcode::BUFFER_STORE_DWORDX2: + case Opcode::BUFFER_STORE_DWORDX3: + case Opcode::BUFFER_STORE_DWORDX4: + case Opcode::TBUFFER_LOAD_FORMAT_X: + case Opcode::TBUFFER_LOAD_FORMAT_XY: + case Opcode::TBUFFER_LOAD_FORMAT_XYZ: + case Opcode::TBUFFER_LOAD_FORMAT_XYZW: + case Opcode::TBUFFER_STORE_FORMAT_X: + case Opcode::TBUFFER_STORE_FORMAT_XY: + case Opcode::TBUFFER_STORE_FORMAT_XYZ: + case Opcode::TBUFFER_STORE_FORMAT_XYZW: + case Opcode::BUFFER_ATOMIC_SWAP: + case Opcode::BUFFER_ATOMIC_ADD: + case Opcode::BUFFER_ATOMIC_SUB: + case Opcode::BUFFER_ATOMIC_SMIN: + case Opcode::BUFFER_ATOMIC_UMIN: + case Opcode::BUFFER_ATOMIC_SMAX: + case Opcode::BUFFER_ATOMIC_UMAX: + case Opcode::BUFFER_ATOMIC_AND: + case Opcode::BUFFER_ATOMIC_OR: + case Opcode::BUFFER_ATOMIC_XOR: + case Opcode::BUFFER_ATOMIC_FMIN: + case Opcode::BUFFER_ATOMIC_FMAX: + case Opcode::BUFFER_LOAD_SBYTE: + case Opcode::BUFFER_LOAD_SSHORT: + case Opcode::FLAT_LOAD_UBYTE: + case Opcode::FLAT_LOAD_SBYTE: + case Opcode::FLAT_LOAD_USHORT: + case Opcode::FLAT_LOAD_SSHORT: + case Opcode::FLAT_LOAD_DWORD: + case Opcode::FLAT_LOAD_DWORDX2: + case Opcode::FLAT_LOAD_DWORDX3: + case Opcode::FLAT_LOAD_DWORDX4: + case Opcode::FLAT_STORE_BYTE: + case Opcode::FLAT_STORE_SHORT: + case Opcode::FLAT_STORE_DWORD: + case Opcode::FLAT_STORE_DWORDX2: + case Opcode::FLAT_STORE_DWORDX3: + case Opcode::FLAT_STORE_DWORDX4: + case Opcode::DS_ADD_U32: + case Opcode::DS_ADD_RTN_U32: + case Opcode::DS_SUB_U32: + case Opcode::DS_SUB_RTN_U32: + case Opcode::DS_MIN_I32: + case Opcode::DS_MIN_RTN_I32: + case Opcode::DS_MAX_I32: + case Opcode::DS_MAX_RTN_I32: + case Opcode::DS_MIN_U32: + case Opcode::DS_MIN_RTN_U32: + case Opcode::DS_MAX_U32: + case Opcode::DS_MAX_RTN_U32: + case Opcode::DS_AND_B32: + case Opcode::DS_AND_RTN_B32: + case Opcode::DS_OR_B32: + case Opcode::DS_OR_RTN_B32: + case Opcode::DS_XOR_B32: + case Opcode::DS_XOR_RTN_B32: + case Opcode::DS_WRXCHG_RTN_B32: + case Opcode::DS_MIN_F32: + case Opcode::DS_MAX_F32: + case Opcode::DS_SWIZZLE_B32: + case Opcode::DS_READ_I8: + case Opcode::DS_READ_U8: + case Opcode::DS_READ_I16: + case Opcode::DS_READ_U16: + case Opcode::DS_READ2_B32: + case Opcode::DS_READ_B32: + case Opcode::DS_READ_B64: + case Opcode::DS_READ2_B64: + case Opcode::DS_READ2ST64_B64: + case Opcode::DS_READ_B96: + case Opcode::DS_READ_B128: + case Opcode::DS_WRITE_B8: + case Opcode::DS_WRITE_B16: + case Opcode::DS_WRITE2_B32: + case Opcode::DS_WRITE2ST64_B32: + case Opcode::DS_WRITE2_B64: + case Opcode::DS_WRITE2ST64_B64: + case Opcode::DS_WRITE_B32: + case Opcode::DS_WRITE_B64: + case Opcode::DS_WRITE_B96: + case Opcode::DS_WRITE_B128: + case Opcode::DS_WRITE_ADDTID_B32: + case Opcode::DS_READ_ADDTID_B32: return WithUnsupportedReason(inst, FormatMemory(inst)); default: return WithUnsupportedReason(inst, FormatBinary(inst)); } } diff --git a/src/graphics/shader/recompiler/frontend/decode/ShaderDecoder.h b/src/graphics/shader/recompiler/frontend/decode/ShaderDecoder.h index 22e88b603..9821a711f 100644 --- a/src/graphics/shader/recompiler/frontend/decode/ShaderDecoder.h +++ b/src/graphics/shader/recompiler/frontend/decode/ShaderDecoder.h @@ -2,7 +2,7 @@ #define EMULATOR_INCLUDE_EMULATOR_GRAPHICS_SHADER_RECOMPILER_SHADERDECODER_H_ #include "common/common.h" -#include "common/stringUtils.h" +#include "common/magicEnum.h" #include #include @@ -33,524 +33,525 @@ enum class Family { }; enum class Opcode { - Unknown, - Unsupported, + UNKNOWN, + UNSUPPORTED, - SMovB32, - SMovB64, - SMovkI32, - SAbsI32, - SBrevB32, - SBcnt1I32B32, - SBcnt1I32B64, - SFf1I32B32, - SFf1I32B64, - SFlbitI32B64, - SBitreplicateB64B32, - SGetpcB64, - SSetpcB64, - SAndSaveexecB32, - SAndn1SaveexecB32, - SAndSaveexecB64, - SOrn2SaveexecB64, - SAndn1SaveexecB64, - SNotB32, - SNotB64, - SWqmB64, - SAddU32, - SAddcU32, - SSubbU32, - SSubU32, - SAddI32, - SSubI32, - SBitcmp0B32, - SBitcmp1B32, - SBitset0B32, - SBitset1B32, - SMinI32, - SMaxI32, - SMinU32, - SMaxU32, - SAndB32, - SAndB64, - SAndn2B32, - SAndn2B64, - SOrB32, - SOrB64, - SOrn2B32, - SOrn2B64, - SXorB32, - SXorB64, - SNandB32, - SNandB64, - SNorB32, - SNorB64, - SXnorB32, - SXnorB64, - SLshlB32, - SLshlB64, - SLshl1AddU32, - SLshl2AddU32, - SLshl3AddU32, - SLshl4AddU32, - SLshrB32, - SLshrB64, - SAshrI32, - SMulI32, - SMulHiU32, - SMulkI32, - SBfeU32, - SBfeI32, - SBfeU64, - SBfmB32, - SBfmB64, - SCselectB32, - SCselectB64, - SPackLlB32B16, - SPackLhB32B16, - SPackHhB32B16, - SCmpEqI32, - SCmpLgI32, - SCmpGtI32, - SCmpGeI32, - SCmpLtI32, - SCmpLeI32, - SCmpEqU32, - SCmpLgU32, - SCmpGtU32, - SCmpGeU32, - SCmpLtU32, - SCmpLeU32, - SCmpEqU64, - SCmpLgU64, + S_MOV_B32, + S_MOV_B64, + S_MOVK_I32, + S_ABS_I32, + S_BREV_B32, + S_BCNT1_I32_B32, + S_BCNT1_I32_B64, + S_FF1_I32_B32, + S_FF1_I32_B64, + S_FLBIT_I32_B64, + S_BITREPLICATE_B64_B32, + S_GETPC_B64, + S_SETPC_B64, + S_AND_SAVEEXEC_B32, + S_ANDN1_SAVEEXEC_B32, + S_AND_SAVEEXEC_B64, + S_ORN2_SAVEEXEC_B64, + S_ANDN1_SAVEEXEC_B64, + S_NOT_B32, + S_NOT_B64, + S_WQM_B64, + S_ADD_U32, + S_ADDC_U32, + S_SUBB_U32, + S_SUB_U32, + S_ADD_I32, + S_SUB_I32, + S_BITCMP0_B32, + S_BITCMP1_B32, + S_BITSET0_B32, + S_BITSET1_B32, + S_MIN_I32, + S_MAX_I32, + S_MIN_U32, + S_MAX_U32, + S_AND_B32, + S_AND_B64, + S_ANDN2_B32, + S_ANDN2_B64, + S_OR_B32, + S_OR_B64, + S_ORN2_B32, + S_ORN2_B64, + S_XOR_B32, + S_XOR_B64, + S_NAND_B32, + S_NAND_B64, + S_NOR_B32, + S_NOR_B64, + S_XNOR_B32, + S_XNOR_B64, + S_LSHL_B32, + S_LSHL_B64, + S_LSHL1_ADD_U32, + S_LSHL2_ADD_U32, + S_LSHL3_ADD_U32, + S_LSHL4_ADD_U32, + S_LSHR_B32, + S_LSHR_B64, + S_ASHR_I32, + S_MUL_I32, + S_MUL_HI_U32, + S_MULK_I32, + S_BFE_U32, + S_BFE_I32, + S_BFE_U64, + S_BFM_B32, + S_BFM_B64, + S_CSELECT_B32, + S_CSELECT_B64, + S_PACK_LL_B32_B16, + S_PACK_LH_B32_B16, + S_PACK_HH_B32_B16, + S_CMP_EQ_I32, + S_CMP_LG_I32, + S_CMP_GT_I32, + S_CMP_GE_I32, + S_CMP_LT_I32, + S_CMP_LE_I32, + S_CMP_EQ_U32, + S_CMP_LG_U32, + S_CMP_GT_U32, + S_CMP_GE_U32, + S_CMP_LT_U32, + S_CMP_LE_U32, + S_CMP_EQ_U64, + S_CMP_LG_U64, - VNop, - VMovB32, - VMovreldB32, - VMovrelsB32, - VReadfirstlaneB32, - VReadlaneB32, - VWritelaneB32, - VPermlane16B32, - VPermlanex16B32, - VCubeidF32, - VCubescF32, - VCubetcF32, - VCubemaF32, - VCndmaskB32, - VDot2cF32F16, - VCvtF32I32, - VCvtF32U32, - VCvtU32F32, - VCvtI32F32, - VCvtF16F32, - VCvtF32F16, - VCvtF16U16, - VCvtU16F16, - VCvtF16I16, - VCvtI16F16, - VCvtRpiI32F32, - VCvtFlrI32F32, - VFrexpExpI32F32, - VFrexpMantF32, - VCvtOffF32I4, - VCvtF32Ubyte0, - VCvtF32Ubyte1, - VCvtF32Ubyte2, - VCvtF32Ubyte3, - VRcpF32, - VRcpIflagF32, - VFractF32, - VTruncF32, - VCeilF32, - VRndneF32, - VFloorF32, - VExpF32, - VLogF32, - VRsqF32, - VSqrtF32, - VRcpF16, - VSqrtF16, - VRsqF16, - VLogF16, - VExpF16, - VFloorF16, - VCeilF16, - VTruncF16, - VRndneF16, - VSinF32, - VCosF32, - VNotB32, - VBfrevB32, - VFfbhU32, - VFfblB32, - VAddF32, - VSubF32, - VSubrevF32, - VMulF32, - VMacF32, - VMadmkF32, - VMadakF32, - VMinF32, - VMaxF32, - VAddF16, - VSubF16, - VSubrevF16, - VMulF16, - VFmacF16, - VFmamkF16, - VFmaakF16, - VMinI32, - VMaxI32, - VMulI32I24, - VMulU32U24, - VMulLoU32, - VMulHiU32, - VMulLoI32, - VMulHiI32, - VCvtPkrtzF16F32, - VCvtPkU8F32, - VMadF32, - VMadI32I24, - VMadU32U24, - VMadU64U32, - VFmaF32, - VFmaF16, - VPackB32F16, - VBfeU32, - VBfeI32, - VBfiB32, - VAlignbitB32, - VAlignbyteB32, - VMin3F32, - VMin3I32, - VMin3U32, - VMin3F16, - VMax3F32, - VMax3I32, - VMax3U32, - VMax3F16, - VMed3F32, - VMed3I32, - VMed3U32, - VMed3F16, - VMed3I16, - VSadU32, - VAdd3U32, - VLshlAddU32, - VAddLshlU32, - VXadU32, - VLshlOrB32, - VAndOrB32, - VOr3B32, - VXor3B32, - VAddI32, - VSubI32, - VSubrevI32, - VBfmB32, - VLdexpF32, - VCvtPknormI16F32, - VCvtPknormU16F32, - VCvtPkU16U32, - VCvtPkI16I32, - VPkMadI16, - VPkMulLoU16, - VPkAddI16, - VPkSubI16, - VPkLshlrevB16, - VPkLshrrevB16, - VPkAshrrevI16, - VPkMaxI16, - VPkMinI16, - VPkMadU16, - VPkAddF16, - VPkMulF16, - VPkMinF16, - VPkMaxF16, - VPkFmaF16, - VPkFmacF16, - VPkAddU16, - VPkSubU16, - VPkMaxU16, - VPkMinU16, - VMadMixloF16, - VMadMixhiF16, - VAddNcU32, - VAddcU32, - VSubrevCoCiU32, - VSubNcU32, - VSubrevNcU32, - VAddNcU16, - VSubNcU16, - VMaxU16, - VMaxI16, - VMinU16, - VMinI16, - VAddNcI16, - VSubNcI16, - VAndB32, - VOrB32, - VXorB32, - VXnorB32, - VLshlB32, - VLshlrevB32, - VLshrB32, - VLshrrevB32, - VAshrI32, - VAshrrevI32, - VLshlrevB16, - VLshrrevB16, - VAshrrevI16, - VBcntU32B32, - VMbcntLoU32B32, - VMbcntHiU32B32, - VMinU32, - VMaxU32, - VMaxF16, - VMinF16, - VCmpFF32, - VCmpLtF32, - VCmpEqF32, - VCmpLeF32, - VCmpGtF32, - VCmpLgF32, - VCmpGeF32, - VCmpOF32, - VCmpUF32, - VCmpNgeF32, - VCmpNlgF32, - VCmpNgtF32, - VCmpNleF32, - VCmpNeqF32, - VCmpNltF32, - VCmpTruF32, - VCmpxLtF32, - VCmpxEqF32, - VCmpxLeF32, - VCmpxGtF32, - VCmpxLgF32, - VCmpxGeF32, - VCmpxNgeF32, - VCmpxNlgF32, - VCmpxNgtF32, - VCmpxNleF32, - VCmpxNeqF32, - VCmpxNltF32, - VCmpFI32, - VCmpLtI32, - VCmpEqI32, - VCmpLeI32, - VCmpGtI32, - VCmpNeI32, - VCmpGeI32, - VCmpTI32, - VCmpClassF32, - VCmpLtI16, - VCmpEqI16, - VCmpLeI16, - VCmpGtI16, - VCmpNeI16, - VCmpGeI16, - VCmpLtF16, - VCmpEqF16, - VCmpLeF16, - VCmpGtF16, - VCmpLgF16, - VCmpGeF16, - VCmpNeqF16, - VCmpxLtF16, - VCmpxEqF16, - VCmpxLeF16, - VCmpxGtF16, - VCmpxGeF16, - VCmpxNeqF16, - VCmpxNltF16, - VCmpxLtI32, - VCmpxEqI32, - VCmpxLeI32, - VCmpxGtI32, - VCmpxNeI32, - VCmpxGeI32, - VCmpLtU16, - VCmpEqU16, - VCmpLeU16, - VCmpGtU16, - VCmpNeU16, - VCmpGeU16, - VCmpFU32, - VCmpLtU32, - VCmpEqU32, - VCmpLeU32, - VCmpGtU32, - VCmpNeU32, - VCmpGeU32, - VCmpTU32, - VCmpEqI64, - VCmpGtU64, - VCmpNeU64, - VCmpxLtU32, - VCmpxEqU32, - VCmpxLeU32, - VCmpxGtU32, - VCmpxNeU32, - VCmpxGeU32, + V_NOP, + V_MOV_B32, + V_MOVRELD_B32, + V_MOVRELS_B32, + V_READFIRSTLANE_B32, + V_READLANE_B32, + V_WRITELANE_B32, + V_PERMLANE16_B32, + V_PERMLANEX16_B32, + V_CUBEID_F32, + V_CUBESC_F32, + V_CUBETC_F32, + V_CUBEMA_F32, + V_CNDMASK_B32, + V_DOT2C_F32_F16, + V_CVT_F32_I32, + V_CVT_F32_U32, + V_CVT_U32_F32, + V_CVT_I32_F32, + V_CVT_F16_F32, + V_CVT_F32_F16, + V_CVT_F16_U16, + V_CVT_U16_F16, + V_CVT_F16_I16, + V_CVT_I16_F16, + V_CVT_RPI_I32_F32, + V_CVT_FLR_I32_F32, + V_FREXP_EXP_I32_F32, + V_FREXP_MANT_F32, + V_CVT_OFF_F32_I4, + V_CVT_F32_UBYTE0, + V_CVT_F32_UBYTE1, + V_CVT_F32_UBYTE2, + V_CVT_F32_UBYTE3, + V_RCP_F32, + V_RCP_IFLAG_F32, + V_FRACT_F32, + V_TRUNC_F32, + V_CEIL_F32, + V_RNDNE_F32, + V_FLOOR_F32, + V_EXP_F32, + V_LOG_F32, + V_RSQ_F32, + V_SQRT_F32, + V_RCP_F16, + V_SQRT_F16, + V_RSQ_F16, + V_LOG_F16, + V_EXP_F16, + V_FLOOR_F16, + V_CEIL_F16, + V_TRUNC_F16, + V_RNDNE_F16, + V_SIN_F32, + V_COS_F32, + V_NOT_B32, + V_BFREV_B32, + V_FFBH_U32, + V_FFBL_B32, + V_ADD_F32, + V_SUB_F32, + V_SUBREV_F32, + V_MUL_F32, + V_MAC_F32, + V_MADMK_F32, + V_MADAK_F32, + V_MIN_F32, + V_MAX_F32, + V_ADD_F16, + V_SUB_F16, + V_SUBREV_F16, + V_MUL_F16, + V_FMAC_F16, + V_FMAMK_F16, + V_FMAAK_F16, + V_MIN_I32, + V_MAX_I32, + V_MUL_I32_I24, + V_MUL_U32_U24, + V_MUL_LO_U32, + V_MUL_HI_U32, + V_MUL_LO_I32, + V_MUL_HI_I32, + V_CVT_PKRTZ_F16_F32, + V_CVT_PK_U8_F32, + V_MAD_F32, + V_MAD_I32_I24, + V_MAD_U32_U24, + V_MAD_U64_U32, + V_FMA_F32, + V_FMA_F16, + V_PACK_B32_F16, + V_BFE_U32, + V_BFE_I32, + V_BFI_B32, + V_ALIGNBIT_B32, + V_ALIGNBYTE_B32, + V_MIN3_F32, + V_MIN3_I32, + V_MIN3_U32, + V_MIN3_F16, + V_MAX3_F32, + V_MAX3_I32, + V_MAX3_U32, + V_MAX3_F16, + V_MED3_F32, + V_MED3_I32, + V_MED3_U32, + V_MED3_F16, + V_MED3_I16, + V_SAD_U32, + V_ADD3_U32, + V_LSHL_ADD_U32, + V_ADD_LSHL_U32, + V_XAD_U32, + V_LSHL_OR_B32, + V_AND_OR_B32, + V_OR3_B32, + V_XOR3_B32, + V_ADD_I32, + V_SUB_I32, + V_SUBREV_I32, + V_BFM_B32, + V_LDEXP_F32, + V_CVT_PKNORM_I16_F32, + V_CVT_PKNORM_U16_F32, + V_CVT_PK_U16_U32, + V_CVT_PK_I16_I32, + V_PK_MAD_I16, + V_PK_MUL_LO_U16, + V_PK_ADD_I16, + V_PK_SUB_I16, + V_PK_LSHLREV_B16, + V_PK_LSHRREV_B16, + V_PK_ASHRREV_I16, + V_PK_MAX_I16, + V_PK_MIN_I16, + V_PK_MAD_U16, + V_PK_ADD_F16, + V_PK_MUL_F16, + V_PK_MIN_F16, + V_PK_MAX_F16, + V_PK_FMA_F16, + V_PK_FMAC_F16, + V_PK_ADD_U16, + V_PK_SUB_U16, + V_PK_MAX_U16, + V_PK_MIN_U16, + V_MAD_MIXLO_F16, + V_MAD_MIXHI_F16, + V_ADD_NC_U32, + V_ADDC_U32, + V_SUBREV_CO_CI_U32, + V_SUB_NC_U32, + V_SUBREV_NC_U32, + V_ADD_NC_U16, + V_SUB_NC_U16, + V_MAX_U16, + V_MAX_I16, + V_MIN_U16, + V_MIN_I16, + V_ADD_NC_I16, + V_SUB_NC_I16, + V_AND_B32, + V_OR_B32, + V_XOR_B32, + V_XNOR_B32, + V_LSHL_B32, + V_LSHLREV_B32, + V_LSHR_B32, + V_LSHRREV_B32, + V_ASHR_I32, + V_ASHRREV_I32, + V_LSHLREV_B16, + V_LSHRREV_B16, + V_ASHRREV_I16, + V_BCNT_U32_B32, + V_MBCNT_LO_U32_B32, + V_MBCNT_HI_U32_B32, + V_MIN_U32, + V_MAX_U32, + V_MAX_F16, + V_MIN_F16, + V_CMP_F_F32, + V_CMP_LT_F32, + V_CMP_EQ_F32, + V_CMP_LE_F32, + V_CMP_GT_F32, + V_CMP_LG_F32, + V_CMP_GE_F32, + V_CMP_O_F32, + V_CMP_U_F32, + V_CMP_NGE_F32, + V_CMP_NLG_F32, + V_CMP_NGT_F32, + V_CMP_NLE_F32, + V_CMP_NEQ_F32, + V_CMP_NLT_F32, + V_CMP_TRU_F32, + V_CMPX_LT_F32, + V_CMPX_EQ_F32, + V_CMPX_LE_F32, + V_CMPX_GT_F32, + V_CMPX_LG_F32, + V_CMPX_GE_F32, + V_CMPX_NGE_F32, + V_CMPX_NLG_F32, + V_CMPX_NGT_F32, + V_CMPX_NLE_F32, + V_CMPX_NEQ_F32, + V_CMPX_NLT_F32, + V_CMP_F_I32, + V_CMP_LT_I32, + V_CMP_EQ_I32, + V_CMP_LE_I32, + V_CMP_GT_I32, + V_CMP_NE_I32, + V_CMP_GE_I32, + V_CMP_T_I32, + V_CMP_CLASS_F32, + V_CMP_LT_I16, + V_CMP_EQ_I16, + V_CMP_LE_I16, + V_CMP_GT_I16, + V_CMP_NE_I16, + V_CMP_GE_I16, + V_CMP_LT_F16, + V_CMP_EQ_F16, + V_CMP_LE_F16, + V_CMP_GT_F16, + V_CMP_LG_F16, + V_CMP_GE_F16, + V_CMP_NEQ_F16, + V_CMPX_LT_F16, + V_CMPX_EQ_F16, + V_CMPX_LE_F16, + V_CMPX_GT_F16, + V_CMPX_GE_F16, + V_CMPX_NEQ_F16, + V_CMPX_NLT_F16, + V_CMPX_LT_I32, + V_CMPX_EQ_I32, + V_CMPX_LE_I32, + V_CMPX_GT_I32, + V_CMPX_NE_I32, + V_CMPX_GE_I32, + V_CMP_LT_U16, + V_CMP_EQ_U16, + V_CMP_LE_U16, + V_CMP_GT_U16, + V_CMP_NE_U16, + V_CMP_GE_U16, + V_CMP_F_U32, + V_CMP_LT_U32, + V_CMP_EQ_U32, + V_CMP_LE_U32, + V_CMP_GT_U32, + V_CMP_NE_U32, + V_CMP_GE_U32, + V_CMP_T_U32, + V_CMP_EQ_I64, + V_CMP_GT_U64, + V_CMP_NE_U64, + V_CMPX_LT_U32, + V_CMPX_EQ_U32, + V_CMPX_LE_U32, + V_CMPX_GT_U32, + V_CMPX_NE_U32, + V_CMPX_GE_U32, - SLoadDword, - SLoadDwordx2, - SLoadDwordx4, - SLoadDwordx8, - SLoadDwordx16, - SBufferLoadDword, - SBufferLoadDwordx2, - SBufferLoadDwordx4, - SBufferLoadDwordx8, - SBufferLoadDwordx16, - BufferLoadFormatX, - BufferLoadFormatXy, - BufferLoadFormatXyz, - BufferLoadFormatXyzw, - BufferStoreFormatX, - BufferStoreFormatXy, - BufferStoreFormatXyz, - BufferStoreFormatXyzw, - BufferLoadUbyte, - BufferLoadSbyte, - BufferLoadUshort, - BufferLoadSshort, - BufferLoadDword, - BufferLoadDwordx2, - BufferLoadDwordx3, - BufferLoadDwordx4, - BufferStoreByte, - BufferStoreShort, - BufferStoreDword, - BufferStoreDwordx2, - BufferStoreDwordx3, - BufferStoreDwordx4, - TBufferLoadFormatX, - TBufferLoadFormatXy, - TBufferLoadFormatXyz, - TBufferLoadFormatXyzw, - TBufferStoreFormatX, - TBufferStoreFormatXy, - TBufferStoreFormatXyz, - TBufferStoreFormatXyzw, - BufferAtomicSwap, - BufferAtomicAdd, - BufferAtomicSub, - BufferAtomicSMin, - BufferAtomicUMin, - BufferAtomicSMax, - BufferAtomicUMax, - BufferAtomicAnd, - BufferAtomicOr, - BufferAtomicXor, - BufferAtomicFMin, - BufferAtomicFMax, - FlatLoadUbyte, - FlatLoadSbyte, - FlatLoadUshort, - FlatLoadSshort, - FlatLoadDword, - FlatLoadDwordx2, - FlatLoadDwordx3, - FlatLoadDwordx4, - FlatStoreByte, - FlatStoreShort, - FlatStoreDword, - FlatStoreDwordx2, - FlatStoreDwordx3, - FlatStoreDwordx4, - DsAddU32, - DsAddRtnU32, - DsSubU32, - DsSubRtnU32, - DsMinI32, - DsMinRtnI32, - DsMaxI32, - DsMaxRtnI32, - DsMinU32, - DsMinRtnU32, - DsMaxU32, - DsMaxRtnU32, - DsAndB32, - DsAndRtnB32, - DsOrB32, - DsOrRtnB32, - DsXorB32, - DsXorRtnB32, - DsWrxchgRtnB32, - DsMinF32, - DsMaxF32, - DsSwizzleB32, - DsConsume, - DsAppend, - DsReadSbyte, - DsReadUbyte, - DsReadSshort, - DsReadUshort, - DsRead2B32, - DsReadB32, - DsReadB64, - DsRead2B64, - DsRead2St64B64, - DsReadB96, - DsReadB128, - DsWriteByte, - DsWriteShort, - DsWrite2B32, - DsWrite2St64B32, - DsWrite2B64, - DsWrite2St64B64, - DsWriteB32, - DsWriteB64, - DsWriteB96, - DsWriteB128, - DsWriteAddtidB32, - DsReadAddtidB32, - ImageGetResinfo, - ImageGetLod, - ImageLoad, - ImageLoadMip, - ImageStore, - ImageStoreMip, - ImageAtomicAdd, - ImageAtomicUMin, - ImageAtomicUMax, - ImageAtomicAnd, - ImageAtomicOr, - ImageAtomicXor, - ImageSample, - ImageGather4Lz, - ImageGather4C, - ImageGather4CLz, - ImageGather4LzO, - ImageGather4CO, - ImageGather4CLzO, - ImageGather4H, - VInterpP1F32, - VInterpP2F32, - VInterpMovF32, + S_LOAD_DWORD, + S_LOAD_DWORDX2, + S_LOAD_DWORDX4, + S_LOAD_DWORDX8, + S_LOAD_DWORDX16, + S_BUFFER_LOAD_DWORD, + S_BUFFER_LOAD_DWORDX2, + S_BUFFER_LOAD_DWORDX4, + S_BUFFER_LOAD_DWORDX8, + S_BUFFER_LOAD_DWORDX16, + BUFFER_LOAD_FORMAT_X, + BUFFER_LOAD_FORMAT_XY, + BUFFER_LOAD_FORMAT_XYZ, + BUFFER_LOAD_FORMAT_XYZW, + BUFFER_STORE_FORMAT_X, + BUFFER_STORE_FORMAT_XY, + BUFFER_STORE_FORMAT_XYZ, + BUFFER_STORE_FORMAT_XYZW, + BUFFER_LOAD_UBYTE, + BUFFER_LOAD_SBYTE, + BUFFER_LOAD_USHORT, + BUFFER_LOAD_SSHORT, + BUFFER_LOAD_DWORD, + BUFFER_LOAD_DWORDX2, + BUFFER_LOAD_DWORDX3, + BUFFER_LOAD_DWORDX4, + BUFFER_STORE_BYTE, + BUFFER_STORE_SHORT, + BUFFER_STORE_DWORD, + BUFFER_STORE_DWORDX2, + BUFFER_STORE_DWORDX3, + BUFFER_STORE_DWORDX4, + TBUFFER_LOAD_FORMAT_X, + TBUFFER_LOAD_FORMAT_XY, + TBUFFER_LOAD_FORMAT_XYZ, + TBUFFER_LOAD_FORMAT_XYZW, + TBUFFER_STORE_FORMAT_X, + TBUFFER_STORE_FORMAT_XY, + TBUFFER_STORE_FORMAT_XYZ, + TBUFFER_STORE_FORMAT_XYZW, + BUFFER_ATOMIC_SWAP, + BUFFER_ATOMIC_ADD, + BUFFER_ATOMIC_SUB, + BUFFER_ATOMIC_SMIN, + BUFFER_ATOMIC_UMIN, + BUFFER_ATOMIC_SMAX, + BUFFER_ATOMIC_UMAX, + BUFFER_ATOMIC_AND, + BUFFER_ATOMIC_OR, + BUFFER_ATOMIC_XOR, + BUFFER_ATOMIC_FMIN, + BUFFER_ATOMIC_FMAX, + FLAT_LOAD_UBYTE, + FLAT_LOAD_SBYTE, + FLAT_LOAD_USHORT, + FLAT_LOAD_SSHORT, + FLAT_LOAD_DWORD, + FLAT_LOAD_DWORDX2, + FLAT_LOAD_DWORDX3, + FLAT_LOAD_DWORDX4, + FLAT_STORE_BYTE, + FLAT_STORE_SHORT, + FLAT_STORE_DWORD, + FLAT_STORE_DWORDX2, + FLAT_STORE_DWORDX3, + FLAT_STORE_DWORDX4, + DS_ADD_U32, + DS_ADD_RTN_U32, + DS_SUB_U32, + DS_SUB_RTN_U32, + DS_MIN_I32, + DS_MIN_RTN_I32, + DS_MAX_I32, + DS_MAX_RTN_I32, + DS_MIN_U32, + DS_MIN_RTN_U32, + DS_MAX_U32, + DS_MAX_RTN_U32, + DS_AND_B32, + DS_AND_RTN_B32, + DS_OR_B32, + DS_OR_RTN_B32, + DS_XOR_B32, + DS_XOR_RTN_B32, + DS_WRXCHG_RTN_B32, + DS_MIN_F32, + DS_MAX_F32, + DS_SWIZZLE_B32, + DS_CONSUME, + DS_APPEND, + DS_READ_I8, + DS_READ_U8, + DS_READ_I16, + DS_READ_U16, + DS_READ2_B32, + DS_READ_B32, + DS_READ_B64, + DS_READ2_B64, + DS_READ2ST64_B64, + DS_READ_B96, + DS_READ_B128, + DS_WRITE_B8, + DS_WRITE_B16, + DS_WRITE2_B32, + DS_WRITE2ST64_B32, + DS_WRITE2_B64, + DS_WRITE2ST64_B64, + DS_WRITE_B32, + DS_WRITE_B64, + DS_WRITE_B96, + DS_WRITE_B128, + DS_WRITE_ADDTID_B32, + DS_READ_ADDTID_B32, + IMAGE_GET_RESINFO, + IMAGE_GET_LOD, + IMAGE_LOAD, + IMAGE_LOAD_MIP, + IMAGE_STORE, + IMAGE_STORE_MIP, + IMAGE_ATOMIC_ADD, + IMAGE_ATOMIC_UMIN, + IMAGE_ATOMIC_UMAX, + IMAGE_ATOMIC_AND, + IMAGE_ATOMIC_OR, + IMAGE_ATOMIC_XOR, + IMAGE_SAMPLE, + IMAGE_GATHER4_LZ, + IMAGE_GATHER4_C, + IMAGE_GATHER4_C_LZ, + IMAGE_GATHER4_LZ_O, + IMAGE_GATHER4_C_O, + IMAGE_GATHER4_C_LZ_O, + IMAGE_GATHER4H, + V_INTERP_P1_F32, + V_INTERP_P2_F32, + V_INTERP_MOV_F32, - SNop, - SWaitcnt, - SWaitcntDepctr, - SBarrier, - SBranch, - SCbranchScc0, - SCbranchScc1, - SCbranchVccz, - SCbranchVccnz, - SCbranchExecz, - SCbranchExecnz, - SSendmsg, - SSetregB32, - SSleep, - STrap, - STtraceData, - SInstPrefetch, - SEndpgm, - Exp + S_NOP, + S_WAITCNT, + S_WAITCNT_DEPCTR, + S_BARRIER, + S_BRANCH, + S_CBRANCH_SCC0, + S_CBRANCH_SCC1, + S_CBRANCH_VCCZ, + S_CBRANCH_VCCNZ, + S_CBRANCH_EXECZ, + S_CBRANCH_EXECNZ, + S_SENDMSG, + S_SETREG_B32, + S_SLEEP, + S_TRAP, + S_TTRACEDATA, + S_INST_PREFETCH, + S_ENDPGM, + EXP, + COUNT }; enum class OperandKind { @@ -633,7 +634,7 @@ struct Instruction { uint32_t raw_count = 1; Family family = Family::Unknown; uint32_t opcode_id = 0; - Opcode opcode = Opcode::Unknown; + Opcode opcode = Opcode::UNKNOWN; Operand dst; Operand dst2; Operand src0; @@ -693,8 +694,6 @@ void ReadLiteralOperands(std::span code, uint32_t word_index, In void SetRawWords(Instruction& inst, std::span code, uint32_t word_index, uint32_t word_count); void SetUnsupported(Instruction& inst, Family family, uint32_t opcode_id, const char* reason); -std::string FamilyToString(Family family); -std::string OpcodeToString(Opcode opcode); std::string OperandToString(const Operand& operand); const char* ImageDimensionToString(ImageDimension dimension); std::string InstructionToString(const Instruction& inst); @@ -702,4 +701,12 @@ std::string ProgramToString(const Program& program); } // namespace Libs::Graphics::ShaderRecompiler::Decoder +template <> +struct magic_enum::customize::enum_range { + static constexpr int min = + static_cast(Libs::Graphics::ShaderRecompiler::Decoder::Opcode::UNKNOWN); + static constexpr int max = + static_cast(Libs::Graphics::ShaderRecompiler::Decoder::Opcode::COUNT) - 1; +}; + #endif /* EMULATOR_INCLUDE_EMULATOR_GRAPHICS_SHADER_RECOMPILER_SHADERDECODER_H_ */ diff --git a/src/graphics/shader/recompiler/frontend/decode/VectorAluOps.cpp b/src/graphics/shader/recompiler/frontend/decode/VectorAluOps.cpp index f4c621f71..0735a15d9 100644 --- a/src/graphics/shader/recompiler/frontend/decode/VectorAluOps.cpp +++ b/src/graphics/shader/recompiler/frontend/decode/VectorAluOps.cpp @@ -24,60 +24,60 @@ enum class Vop2SdwaProfile { struct Vop2OpcodeInfo { uint32_t encoding = 0; - Opcode decoded = Opcode::Unknown; + Opcode decoded = Opcode::UNKNOWN; Vop2SdwaProfile sdwa_profile = Vop2SdwaProfile::None; }; constexpr Vop2OpcodeInfo VOP2_OPCODE_LIST[] = { - {0x01u, Opcode::VCndmaskB32, Vop2SdwaProfile::Cndmask}, - {0x02u, Opcode::VDot2cF32F16}, - {0x03u, Opcode::VAddF32, Vop2SdwaProfile::Float32}, - {0x04u, Opcode::VSubF32, Vop2SdwaProfile::Float32}, - {0x05u, Opcode::VSubrevF32}, - {0x08u, Opcode::VMulF32, Vop2SdwaProfile::Float32}, - {0x09u, Opcode::VMulI32I24, Vop2SdwaProfile::IntegerFullDestination}, - {0x0bu, Opcode::VMulU32U24, Vop2SdwaProfile::IntegerFullDestination}, - {0x0fu, Opcode::VMinF32}, - {0x10u, Opcode::VMaxF32}, - {0x11u, Opcode::VMinI32}, - {0x12u, Opcode::VMaxI32}, - {0x13u, Opcode::VMinU32, Vop2SdwaProfile::IntegerPartialDestination}, - {0x14u, Opcode::VMaxU32, Vop2SdwaProfile::IntegerFullDestination}, - {0x15u, Opcode::VLshrB32}, - {0x16u, Opcode::VLshrrevB32, Vop2SdwaProfile::ReverseRightShift}, - {0x17u, Opcode::VAshrI32}, - {0x18u, Opcode::VAshrrevI32, Vop2SdwaProfile::ReverseRightShift}, - {0x19u, Opcode::VLshlB32}, - {0x1au, Opcode::VLshlrevB32, Vop2SdwaProfile::ReverseLogicalLeft}, - {0x1bu, Opcode::VAndB32, Vop2SdwaProfile::Bitwise}, - {0x1cu, Opcode::VOrB32, Vop2SdwaProfile::Bitwise}, - {0x1du, Opcode::VXorB32, Vop2SdwaProfile::Bitwise}, - {0x1eu, Opcode::VXnorB32, Vop2SdwaProfile::Bitwise}, - {0x1fu, Opcode::VMacF32}, - {0x20u, Opcode::VMadmkF32}, - {0x21u, Opcode::VMadakF32}, - {0x22u, Opcode::VBcntU32B32}, - {0x23u, Opcode::VMbcntLoU32B32}, - {0x24u, Opcode::VMbcntHiU32B32}, - {0x25u, Opcode::VAddNcU32, Vop2SdwaProfile::IntegerPartialDestination}, - {0x28u, Opcode::VAddcU32}, - {0x2au, Opcode::VSubrevCoCiU32}, - {0x26u, Opcode::VSubNcU32, Vop2SdwaProfile::IntegerPartialDestination}, - {0x27u, Opcode::VSubrevNcU32, Vop2SdwaProfile::IntegerFullDestination}, - {0x2bu, Opcode::VMacF32}, - {0x2cu, Opcode::VMadmkF32}, - {0x2du, Opcode::VMadakF32}, - {0x2fu, Opcode::VCvtPkrtzF16F32}, - {0x32u, Opcode::VAddF16, Vop2SdwaProfile::Float16}, - {0x33u, Opcode::VSubF16, Vop2SdwaProfile::Float16}, - {0x34u, Opcode::VSubrevF16, Vop2SdwaProfile::Float16}, - {0x35u, Opcode::VMulF16, Vop2SdwaProfile::Float16}, - {0x36u, Opcode::VFmacF16}, - {0x37u, Opcode::VFmamkF16}, - {0x38u, Opcode::VFmaakF16}, - {0x39u, Opcode::VMaxF16, Vop2SdwaProfile::Float16}, - {0x3au, Opcode::VMinF16, Vop2SdwaProfile::Float16}, - {0x3cu, Opcode::VPkFmacF16}, + {0x01u, Opcode::V_CNDMASK_B32, Vop2SdwaProfile::Cndmask}, + {0x02u, Opcode::V_DOT2C_F32_F16}, + {0x03u, Opcode::V_ADD_F32, Vop2SdwaProfile::Float32}, + {0x04u, Opcode::V_SUB_F32, Vop2SdwaProfile::Float32}, + {0x05u, Opcode::V_SUBREV_F32}, + {0x08u, Opcode::V_MUL_F32, Vop2SdwaProfile::Float32}, + {0x09u, Opcode::V_MUL_I32_I24, Vop2SdwaProfile::IntegerFullDestination}, + {0x0bu, Opcode::V_MUL_U32_U24, Vop2SdwaProfile::IntegerFullDestination}, + {0x0fu, Opcode::V_MIN_F32}, + {0x10u, Opcode::V_MAX_F32}, + {0x11u, Opcode::V_MIN_I32}, + {0x12u, Opcode::V_MAX_I32}, + {0x13u, Opcode::V_MIN_U32, Vop2SdwaProfile::IntegerPartialDestination}, + {0x14u, Opcode::V_MAX_U32, Vop2SdwaProfile::IntegerFullDestination}, + {0x15u, Opcode::V_LSHR_B32}, + {0x16u, Opcode::V_LSHRREV_B32, Vop2SdwaProfile::ReverseRightShift}, + {0x17u, Opcode::V_ASHR_I32}, + {0x18u, Opcode::V_ASHRREV_I32, Vop2SdwaProfile::ReverseRightShift}, + {0x19u, Opcode::V_LSHL_B32}, + {0x1au, Opcode::V_LSHLREV_B32, Vop2SdwaProfile::ReverseLogicalLeft}, + {0x1bu, Opcode::V_AND_B32, Vop2SdwaProfile::Bitwise}, + {0x1cu, Opcode::V_OR_B32, Vop2SdwaProfile::Bitwise}, + {0x1du, Opcode::V_XOR_B32, Vop2SdwaProfile::Bitwise}, + {0x1eu, Opcode::V_XNOR_B32, Vop2SdwaProfile::Bitwise}, + {0x1fu, Opcode::V_MAC_F32}, + {0x20u, Opcode::V_MADMK_F32}, + {0x21u, Opcode::V_MADAK_F32}, + {0x22u, Opcode::V_BCNT_U32_B32}, + {0x23u, Opcode::V_MBCNT_LO_U32_B32}, + {0x24u, Opcode::V_MBCNT_HI_U32_B32}, + {0x25u, Opcode::V_ADD_NC_U32, Vop2SdwaProfile::IntegerPartialDestination}, + {0x28u, Opcode::V_ADDC_U32}, + {0x2au, Opcode::V_SUBREV_CO_CI_U32}, + {0x26u, Opcode::V_SUB_NC_U32, Vop2SdwaProfile::IntegerPartialDestination}, + {0x27u, Opcode::V_SUBREV_NC_U32, Vop2SdwaProfile::IntegerFullDestination}, + {0x2bu, Opcode::V_MAC_F32}, + {0x2cu, Opcode::V_MADMK_F32}, + {0x2du, Opcode::V_MADAK_F32}, + {0x2fu, Opcode::V_CVT_PKRTZ_F16_F32}, + {0x32u, Opcode::V_ADD_F16, Vop2SdwaProfile::Float16}, + {0x33u, Opcode::V_SUB_F16, Vop2SdwaProfile::Float16}, + {0x34u, Opcode::V_SUBREV_F16, Vop2SdwaProfile::Float16}, + {0x35u, Opcode::V_MUL_F16, Vop2SdwaProfile::Float16}, + {0x36u, Opcode::V_FMAC_F16}, + {0x37u, Opcode::V_FMAMK_F16}, + {0x38u, Opcode::V_FMAAK_F16}, + {0x39u, Opcode::V_MAX_F16, Vop2SdwaProfile::Float16}, + {0x3au, Opcode::V_MIN_F16, Vop2SdwaProfile::Float16}, + {0x3cu, Opcode::V_PK_FMAC_F16}, }; constexpr auto VOP2_OPS = Detail::MakeOpcodeTable<0x40>(VOP2_OPCODE_LIST); @@ -87,214 +87,252 @@ constexpr Opcode LookupVop2Opcode(uint32_t encoding) { } constexpr OpcodeMap VOP1_OPCODE_LIST[] = { - {0x00u, Opcode::VNop}, - {0x01u, Opcode::VMovB32}, - {0x02u, Opcode::VReadfirstlaneB32}, - {0x05u, Opcode::VCvtF32I32}, - {0x06u, Opcode::VCvtF32U32}, - {0x07u, Opcode::VCvtU32F32}, - {0x08u, Opcode::VCvtI32F32}, - {0x0au, Opcode::VCvtF16F32}, - {0x0bu, Opcode::VCvtF32F16}, - {0x0cu, Opcode::VCvtRpiI32F32}, - {0x0du, Opcode::VCvtFlrI32F32}, - {0x0eu, Opcode::VCvtOffF32I4}, - {0x11u, Opcode::VCvtF32Ubyte0}, - {0x12u, Opcode::VCvtF32Ubyte1}, - {0x13u, Opcode::VCvtF32Ubyte2}, - {0x14u, Opcode::VCvtF32Ubyte3}, - {0x2au, Opcode::VRcpF32}, - {0x20u, Opcode::VFractF32}, - {0x21u, Opcode::VTruncF32}, - {0x22u, Opcode::VCeilF32}, - {0x23u, Opcode::VRndneF32}, - {0x24u, Opcode::VFloorF32}, - {0x25u, Opcode::VExpF32}, - {0x27u, Opcode::VLogF32}, - {0x2bu, Opcode::VRcpIflagF32}, - {0x2eu, Opcode::VRsqF32}, - {0x33u, Opcode::VSqrtF32}, - {0x35u, Opcode::VSinF32}, - {0x36u, Opcode::VCosF32}, - {0x37u, Opcode::VNotB32}, - {0x38u, Opcode::VBfrevB32}, - {0x39u, Opcode::VFfbhU32}, - {0x3au, Opcode::VFfblB32}, - {0x3fu, Opcode::VFrexpExpI32F32}, - {0x40u, Opcode::VFrexpMantF32}, - {0x42u, Opcode::VMovreldB32}, - {0x43u, Opcode::VMovrelsB32}, - {0x50u, Opcode::VCvtF16U16}, - {0x51u, Opcode::VCvtF16I16}, - {0x52u, Opcode::VCvtU16F16}, - {0x53u, Opcode::VCvtI16F16}, - {0x54u, Opcode::VRcpF16}, - {0x55u, Opcode::VSqrtF16}, - {0x56u, Opcode::VRsqF16}, - {0x57u, Opcode::VLogF16}, - {0x58u, Opcode::VExpF16}, - {0x5bu, Opcode::VFloorF16}, - {0x5cu, Opcode::VCeilF16}, - {0x5du, Opcode::VTruncF16}, - {0x5eu, Opcode::VRndneF16}, + {0x00u, Opcode::V_NOP}, + {0x01u, Opcode::V_MOV_B32}, + {0x02u, Opcode::V_READFIRSTLANE_B32}, + {0x05u, Opcode::V_CVT_F32_I32}, + {0x06u, Opcode::V_CVT_F32_U32}, + {0x07u, Opcode::V_CVT_U32_F32}, + {0x08u, Opcode::V_CVT_I32_F32}, + {0x0au, Opcode::V_CVT_F16_F32}, + {0x0bu, Opcode::V_CVT_F32_F16}, + {0x0cu, Opcode::V_CVT_RPI_I32_F32}, + {0x0du, Opcode::V_CVT_FLR_I32_F32}, + {0x0eu, Opcode::V_CVT_OFF_F32_I4}, + {0x11u, Opcode::V_CVT_F32_UBYTE0}, + {0x12u, Opcode::V_CVT_F32_UBYTE1}, + {0x13u, Opcode::V_CVT_F32_UBYTE2}, + {0x14u, Opcode::V_CVT_F32_UBYTE3}, + {0x2au, Opcode::V_RCP_F32}, + {0x20u, Opcode::V_FRACT_F32}, + {0x21u, Opcode::V_TRUNC_F32}, + {0x22u, Opcode::V_CEIL_F32}, + {0x23u, Opcode::V_RNDNE_F32}, + {0x24u, Opcode::V_FLOOR_F32}, + {0x25u, Opcode::V_EXP_F32}, + {0x27u, Opcode::V_LOG_F32}, + {0x2bu, Opcode::V_RCP_IFLAG_F32}, + {0x2eu, Opcode::V_RSQ_F32}, + {0x33u, Opcode::V_SQRT_F32}, + {0x35u, Opcode::V_SIN_F32}, + {0x36u, Opcode::V_COS_F32}, + {0x37u, Opcode::V_NOT_B32}, + {0x38u, Opcode::V_BFREV_B32}, + {0x39u, Opcode::V_FFBH_U32}, + {0x3au, Opcode::V_FFBL_B32}, + {0x3fu, Opcode::V_FREXP_EXP_I32_F32}, + {0x40u, Opcode::V_FREXP_MANT_F32}, + {0x42u, Opcode::V_MOVRELD_B32}, + {0x43u, Opcode::V_MOVRELS_B32}, + {0x50u, Opcode::V_CVT_F16_U16}, + {0x51u, Opcode::V_CVT_F16_I16}, + {0x52u, Opcode::V_CVT_U16_F16}, + {0x53u, Opcode::V_CVT_I16_F16}, + {0x54u, Opcode::V_RCP_F16}, + {0x55u, Opcode::V_SQRT_F16}, + {0x56u, Opcode::V_RSQ_F16}, + {0x57u, Opcode::V_LOG_F16}, + {0x58u, Opcode::V_EXP_F16}, + {0x5bu, Opcode::V_FLOOR_F16}, + {0x5cu, Opcode::V_CEIL_F16}, + {0x5du, Opcode::V_TRUNC_F16}, + {0x5eu, Opcode::V_RNDNE_F16}, }; constexpr auto VOP1_OPS = Detail::MakeOpcodeTable<0x100>(VOP1_OPCODE_LIST); constexpr OpcodeMap VOP3_ENCODED_VOP1_OPCODE_LIST[] = { - {0x00u, Opcode::VNop}, - {0x01u, Opcode::VMovB32}, - {0x02u, Opcode::VReadfirstlaneB32}, - {0x05u, Opcode::VCvtF32I32}, - {0x06u, Opcode::VCvtF32U32}, - {0x07u, Opcode::VCvtU32F32}, - {0x08u, Opcode::VCvtI32F32}, - {0x0au, Opcode::VCvtF16F32}, - {0x0cu, Opcode::VCvtRpiI32F32}, - {0x0du, Opcode::VCvtFlrI32F32}, - {0x0eu, Opcode::VCvtOffF32I4}, - {0x2au, Opcode::VRcpF32}, - {0x20u, Opcode::VFractF32}, - {0x21u, Opcode::VTruncF32}, - {0x22u, Opcode::VCeilF32}, - {0x23u, Opcode::VRndneF32}, - {0x24u, Opcode::VFloorF32}, - {0x25u, Opcode::VExpF32}, - {0x27u, Opcode::VLogF32}, - {0x2bu, Opcode::VRcpIflagF32}, - {0x2eu, Opcode::VRsqF32}, - {0x33u, Opcode::VSqrtF32}, - {0x35u, Opcode::VSinF32}, - {0x36u, Opcode::VCosF32}, - {0x37u, Opcode::VNotB32}, - {0x38u, Opcode::VBfrevB32}, - {0x39u, Opcode::VFfbhU32}, - {0x3au, Opcode::VFfblB32}, - {0x3fu, Opcode::VFrexpExpI32F32}, - {0x40u, Opcode::VFrexpMantF32}, - {0x42u, Opcode::VMovreldB32}, - {0x43u, Opcode::VMovrelsB32}, - {0x50u, Opcode::VCvtF16U16}, - {0x51u, Opcode::VCvtF16I16}, - {0x52u, Opcode::VCvtU16F16}, - {0x53u, Opcode::VCvtI16F16}, - {0x54u, Opcode::VRcpF16}, - {0x55u, Opcode::VSqrtF16}, - {0x56u, Opcode::VRsqF16}, - {0x57u, Opcode::VLogF16}, - {0x58u, Opcode::VExpF16}, - {0x5bu, Opcode::VFloorF16}, - {0x5cu, Opcode::VCeilF16}, - {0x5du, Opcode::VTruncF16}, - {0x5eu, Opcode::VRndneF16}, + {0x00u, Opcode::V_NOP}, + {0x01u, Opcode::V_MOV_B32}, + {0x02u, Opcode::V_READFIRSTLANE_B32}, + {0x05u, Opcode::V_CVT_F32_I32}, + {0x06u, Opcode::V_CVT_F32_U32}, + {0x07u, Opcode::V_CVT_U32_F32}, + {0x08u, Opcode::V_CVT_I32_F32}, + {0x0au, Opcode::V_CVT_F16_F32}, + {0x0cu, Opcode::V_CVT_RPI_I32_F32}, + {0x0du, Opcode::V_CVT_FLR_I32_F32}, + {0x0eu, Opcode::V_CVT_OFF_F32_I4}, + {0x2au, Opcode::V_RCP_F32}, + {0x20u, Opcode::V_FRACT_F32}, + {0x21u, Opcode::V_TRUNC_F32}, + {0x22u, Opcode::V_CEIL_F32}, + {0x23u, Opcode::V_RNDNE_F32}, + {0x24u, Opcode::V_FLOOR_F32}, + {0x25u, Opcode::V_EXP_F32}, + {0x27u, Opcode::V_LOG_F32}, + {0x2bu, Opcode::V_RCP_IFLAG_F32}, + {0x2eu, Opcode::V_RSQ_F32}, + {0x33u, Opcode::V_SQRT_F32}, + {0x35u, Opcode::V_SIN_F32}, + {0x36u, Opcode::V_COS_F32}, + {0x37u, Opcode::V_NOT_B32}, + {0x38u, Opcode::V_BFREV_B32}, + {0x39u, Opcode::V_FFBH_U32}, + {0x3au, Opcode::V_FFBL_B32}, + {0x3fu, Opcode::V_FREXP_EXP_I32_F32}, + {0x40u, Opcode::V_FREXP_MANT_F32}, + {0x42u, Opcode::V_MOVRELD_B32}, + {0x43u, Opcode::V_MOVRELS_B32}, + {0x50u, Opcode::V_CVT_F16_U16}, + {0x51u, Opcode::V_CVT_F16_I16}, + {0x52u, Opcode::V_CVT_U16_F16}, + {0x53u, Opcode::V_CVT_I16_F16}, + {0x54u, Opcode::V_RCP_F16}, + {0x55u, Opcode::V_SQRT_F16}, + {0x56u, Opcode::V_RSQ_F16}, + {0x57u, Opcode::V_LOG_F16}, + {0x58u, Opcode::V_EXP_F16}, + {0x5bu, Opcode::V_FLOOR_F16}, + {0x5cu, Opcode::V_CEIL_F16}, + {0x5du, Opcode::V_TRUNC_F16}, + {0x5eu, Opcode::V_RNDNE_F16}, }; constexpr auto VOP3_ENCODED_VOP1_OPS = Detail::MakeOpcodeTable<0x80>(VOP3_ENCODED_VOP1_OPCODE_LIST); struct VopcOpcodeInfo { uint32_t encoding = 0; - Opcode decoded = Opcode::Unknown; + Opcode decoded = Opcode::UNKNOWN; bool supports_dpp = true; }; constexpr VopcOpcodeInfo VOPC_OPCODE_LIST[] = { - {0x00u, Opcode::VCmpFF32}, {0x01u, Opcode::VCmpLtF32}, - {0x02u, Opcode::VCmpEqF32}, {0x03u, Opcode::VCmpLeF32}, - {0x04u, Opcode::VCmpGtF32}, {0x05u, Opcode::VCmpLgF32}, - {0x06u, Opcode::VCmpGeF32}, {0x07u, Opcode::VCmpOF32}, - {0x08u, Opcode::VCmpUF32}, {0x09u, Opcode::VCmpNgeF32}, - {0x0au, Opcode::VCmpNlgF32}, {0x0bu, Opcode::VCmpNgtF32}, - {0x0cu, Opcode::VCmpNleF32}, {0x0du, Opcode::VCmpNeqF32}, - {0x0eu, Opcode::VCmpNltF32}, {0x0fu, Opcode::VCmpTruF32}, - {0x11u, Opcode::VCmpxLtF32}, {0x12u, Opcode::VCmpxEqF32}, - {0x13u, Opcode::VCmpxLeF32}, {0x14u, Opcode::VCmpxGtF32}, - {0x15u, Opcode::VCmpxLgF32}, {0x16u, Opcode::VCmpxGeF32}, - {0x19u, Opcode::VCmpxNgeF32}, {0x1au, Opcode::VCmpxNlgF32}, - {0x1bu, Opcode::VCmpxNgtF32}, {0x1cu, Opcode::VCmpxNleF32}, - {0x1du, Opcode::VCmpxNeqF32}, {0x1eu, Opcode::VCmpxNltF32}, - {0x80u, Opcode::VCmpFI32}, {0x81u, Opcode::VCmpLtI32}, - {0x82u, Opcode::VCmpEqI32}, {0x83u, Opcode::VCmpLeI32}, - {0x84u, Opcode::VCmpGtI32}, {0x85u, Opcode::VCmpNeI32}, - {0x86u, Opcode::VCmpGeI32}, {0x87u, Opcode::VCmpTI32}, - {0x88u, Opcode::VCmpClassF32}, {0x89u, Opcode::VCmpLtI16}, - {0x8au, Opcode::VCmpEqI16}, {0x8bu, Opcode::VCmpLeI16}, - {0x8cu, Opcode::VCmpGtI16}, {0x8du, Opcode::VCmpNeI16}, - {0x8eu, Opcode::VCmpGeI16}, {0x91u, Opcode::VCmpxLtI32}, - {0x92u, Opcode::VCmpxEqI32}, {0x93u, Opcode::VCmpxLeI32}, - {0x94u, Opcode::VCmpxGtI32}, {0x95u, Opcode::VCmpxNeI32}, - {0x96u, Opcode::VCmpxGeI32}, {0xa9u, Opcode::VCmpLtU16}, - {0xaau, Opcode::VCmpEqU16}, {0xabu, Opcode::VCmpLeU16}, - {0xacu, Opcode::VCmpGtU16}, {0xadu, Opcode::VCmpNeU16}, - {0xaeu, Opcode::VCmpGeU16}, {0xc0u, Opcode::VCmpFU32}, - {0xc1u, Opcode::VCmpLtU32}, {0xc2u, Opcode::VCmpEqU32}, - {0xc3u, Opcode::VCmpLeU32}, {0xc4u, Opcode::VCmpGtU32}, - {0xc5u, Opcode::VCmpNeU32}, {0xc6u, Opcode::VCmpGeU32}, - {0xc7u, Opcode::VCmpTU32}, {0xa2u, Opcode::VCmpEqI64, false}, - {0xd1u, Opcode::VCmpxLtU32}, {0xd2u, Opcode::VCmpxEqU32}, - {0xd3u, Opcode::VCmpxLeU32}, {0xd4u, Opcode::VCmpxGtU32}, - {0xd5u, Opcode::VCmpxNeU32}, {0xd6u, Opcode::VCmpxGeU32}, - {0xe4u, Opcode::VCmpGtU64, false}, {0xe5u, Opcode::VCmpNeU64, false}, - {0xc9u, Opcode::VCmpLtF16}, {0xcau, Opcode::VCmpEqF16}, - {0xcbu, Opcode::VCmpLeF16}, {0xccu, Opcode::VCmpGtF16}, - {0xcdu, Opcode::VCmpLgF16}, {0xceu, Opcode::VCmpGeF16}, - {0xedu, Opcode::VCmpNeqF16}, {0xd9u, Opcode::VCmpxLtF16}, - {0xdau, Opcode::VCmpxEqF16}, {0xdbu, Opcode::VCmpxLeF16}, - {0xdcu, Opcode::VCmpxGtF16}, {0xdeu, Opcode::VCmpxGeF16}, - {0xfdu, Opcode::VCmpxNeqF16}, {0xfeu, Opcode::VCmpxNltF16}, + {0x00u, Opcode::V_CMP_F_F32}, {0x01u, Opcode::V_CMP_LT_F32}, + {0x02u, Opcode::V_CMP_EQ_F32}, {0x03u, Opcode::V_CMP_LE_F32}, + {0x04u, Opcode::V_CMP_GT_F32}, {0x05u, Opcode::V_CMP_LG_F32}, + {0x06u, Opcode::V_CMP_GE_F32}, {0x07u, Opcode::V_CMP_O_F32}, + {0x08u, Opcode::V_CMP_U_F32}, {0x09u, Opcode::V_CMP_NGE_F32}, + {0x0au, Opcode::V_CMP_NLG_F32}, {0x0bu, Opcode::V_CMP_NGT_F32}, + {0x0cu, Opcode::V_CMP_NLE_F32}, {0x0du, Opcode::V_CMP_NEQ_F32}, + {0x0eu, Opcode::V_CMP_NLT_F32}, {0x0fu, Opcode::V_CMP_TRU_F32}, + {0x11u, Opcode::V_CMPX_LT_F32}, {0x12u, Opcode::V_CMPX_EQ_F32}, + {0x13u, Opcode::V_CMPX_LE_F32}, {0x14u, Opcode::V_CMPX_GT_F32}, + {0x15u, Opcode::V_CMPX_LG_F32}, {0x16u, Opcode::V_CMPX_GE_F32}, + {0x19u, Opcode::V_CMPX_NGE_F32}, {0x1au, Opcode::V_CMPX_NLG_F32}, + {0x1bu, Opcode::V_CMPX_NGT_F32}, {0x1cu, Opcode::V_CMPX_NLE_F32}, + {0x1du, Opcode::V_CMPX_NEQ_F32}, {0x1eu, Opcode::V_CMPX_NLT_F32}, + {0x80u, Opcode::V_CMP_F_I32}, {0x81u, Opcode::V_CMP_LT_I32}, + {0x82u, Opcode::V_CMP_EQ_I32}, {0x83u, Opcode::V_CMP_LE_I32}, + {0x84u, Opcode::V_CMP_GT_I32}, {0x85u, Opcode::V_CMP_NE_I32}, + {0x86u, Opcode::V_CMP_GE_I32}, {0x87u, Opcode::V_CMP_T_I32}, + {0x88u, Opcode::V_CMP_CLASS_F32}, {0x89u, Opcode::V_CMP_LT_I16}, + {0x8au, Opcode::V_CMP_EQ_I16}, {0x8bu, Opcode::V_CMP_LE_I16}, + {0x8cu, Opcode::V_CMP_GT_I16}, {0x8du, Opcode::V_CMP_NE_I16}, + {0x8eu, Opcode::V_CMP_GE_I16}, {0x91u, Opcode::V_CMPX_LT_I32}, + {0x92u, Opcode::V_CMPX_EQ_I32}, {0x93u, Opcode::V_CMPX_LE_I32}, + {0x94u, Opcode::V_CMPX_GT_I32}, {0x95u, Opcode::V_CMPX_NE_I32}, + {0x96u, Opcode::V_CMPX_GE_I32}, {0xa9u, Opcode::V_CMP_LT_U16}, + {0xaau, Opcode::V_CMP_EQ_U16}, {0xabu, Opcode::V_CMP_LE_U16}, + {0xacu, Opcode::V_CMP_GT_U16}, {0xadu, Opcode::V_CMP_NE_U16}, + {0xaeu, Opcode::V_CMP_GE_U16}, {0xc0u, Opcode::V_CMP_F_U32}, + {0xc1u, Opcode::V_CMP_LT_U32}, {0xc2u, Opcode::V_CMP_EQ_U32}, + {0xc3u, Opcode::V_CMP_LE_U32}, {0xc4u, Opcode::V_CMP_GT_U32}, + {0xc5u, Opcode::V_CMP_NE_U32}, {0xc6u, Opcode::V_CMP_GE_U32}, + {0xc7u, Opcode::V_CMP_T_U32}, {0xa2u, Opcode::V_CMP_EQ_I64, false}, + {0xd1u, Opcode::V_CMPX_LT_U32}, {0xd2u, Opcode::V_CMPX_EQ_U32}, + {0xd3u, Opcode::V_CMPX_LE_U32}, {0xd4u, Opcode::V_CMPX_GT_U32}, + {0xd5u, Opcode::V_CMPX_NE_U32}, {0xd6u, Opcode::V_CMPX_GE_U32}, + {0xe4u, Opcode::V_CMP_GT_U64, false}, {0xe5u, Opcode::V_CMP_NE_U64, false}, + {0xc9u, Opcode::V_CMP_LT_F16}, {0xcau, Opcode::V_CMP_EQ_F16}, + {0xcbu, Opcode::V_CMP_LE_F16}, {0xccu, Opcode::V_CMP_GT_F16}, + {0xcdu, Opcode::V_CMP_LG_F16}, {0xceu, Opcode::V_CMP_GE_F16}, + {0xedu, Opcode::V_CMP_NEQ_F16}, {0xd9u, Opcode::V_CMPX_LT_F16}, + {0xdau, Opcode::V_CMPX_EQ_F16}, {0xdbu, Opcode::V_CMPX_LE_F16}, + {0xdcu, Opcode::V_CMPX_GT_F16}, {0xdeu, Opcode::V_CMPX_GE_F16}, + {0xfdu, Opcode::V_CMPX_NEQ_F16}, {0xfeu, Opcode::V_CMPX_NLT_F16}, }; constexpr auto VOPC_OPS = Detail::MakeOpcodeTable<0x100>(VOPC_OPCODE_LIST); constexpr OpcodeMap VOP3_OPCODE_LIST[] = { - {0x141u, Opcode::VMadF32}, {0x142u, Opcode::VMadI32I24}, - {0x143u, Opcode::VMadU32U24}, {0x176u, Opcode::VMadU64U32}, - {0x144u, Opcode::VCubeidF32}, {0x145u, Opcode::VCubescF32}, - {0x146u, Opcode::VCubetcF32}, {0x147u, Opcode::VCubemaF32}, - {0x14bu, Opcode::VFmaF32}, {0x148u, Opcode::VBfeU32}, - {0x149u, Opcode::VBfeI32}, {0x14au, Opcode::VBfiB32}, - {0x14eu, Opcode::VAlignbitB32}, {0x151u, Opcode::VMin3F32}, - {0x152u, Opcode::VMin3I32}, {0x153u, Opcode::VMin3U32}, - {0x351u, Opcode::VMin3F16}, {0x154u, Opcode::VMax3F32}, - {0x155u, Opcode::VMax3I32}, {0x156u, Opcode::VMax3U32}, - {0x354u, Opcode::VMax3F16}, {0x157u, Opcode::VMed3F32}, - {0x158u, Opcode::VMed3I32}, {0x159u, Opcode::VMed3U32}, - {0x357u, Opcode::VMed3F16}, {0x358u, Opcode::VMed3I16}, - {0x15du, Opcode::VSadU32}, {0x15eu, Opcode::VCvtPkU8F32}, - {0x178u, Opcode::VXor3B32}, {0x12fu, Opcode::VCvtPkrtzF16F32}, - {0x169u, Opcode::VMulLoU32}, {0x16au, Opcode::VMulHiU32}, - {0x16bu, Opcode::VMulLoI32}, {0x16cu, Opcode::VMulHiI32}, - {0x303u, Opcode::VAddNcU16}, {0x304u, Opcode::VSubNcU16}, - {0x307u, Opcode::VLshrrevB16}, {0x308u, Opcode::VAshrrevI16}, - {0x309u, Opcode::VMaxU16}, {0x30au, Opcode::VMaxI16}, - {0x30bu, Opcode::VMinU16}, {0x30cu, Opcode::VMinI16}, - {0x30du, Opcode::VAddNcI16}, {0x30eu, Opcode::VSubNcI16}, - {0x30fu, Opcode::VAddI32}, {0x310u, Opcode::VSubI32}, - {0x311u, Opcode::VPackB32F16}, {0x314u, Opcode::VLshlrevB16}, - {0x319u, Opcode::VSubrevI32}, {0x345u, Opcode::VXadU32}, - {0x346u, Opcode::VLshlAddU32}, {0x347u, Opcode::VAddLshlU32}, - {0x360u, Opcode::VReadlaneB32}, {0x361u, Opcode::VWritelaneB32}, - {0x362u, Opcode::VLdexpF32}, {0x363u, Opcode::VBfmB32}, - {0x364u, Opcode::VBcntU32B32}, {0x365u, Opcode::VMbcntLoU32B32}, - {0x366u, Opcode::VMbcntHiU32B32}, {0x368u, Opcode::VCvtPknormI16F32}, - {0x369u, Opcode::VCvtPknormU16F32}, {0x36au, Opcode::VCvtPkU16U32}, - {0x36bu, Opcode::VCvtPkI16I32}, {0x36fu, Opcode::VLshlOrB32}, - {0x371u, Opcode::VAndOrB32}, {0x372u, Opcode::VOr3B32}, - {0x377u, Opcode::VPermlane16B32}, {0x378u, Opcode::VPermlanex16B32}, - {0x34bu, Opcode::VFmaF16}, {0x36du, Opcode::VAdd3U32}, - {0x14fu, Opcode::VAlignbyteB32}, + {0x141u, Opcode::V_MAD_F32}, + {0x142u, Opcode::V_MAD_I32_I24}, + {0x143u, Opcode::V_MAD_U32_U24}, + {0x176u, Opcode::V_MAD_U64_U32}, + {0x144u, Opcode::V_CUBEID_F32}, + {0x145u, Opcode::V_CUBESC_F32}, + {0x146u, Opcode::V_CUBETC_F32}, + {0x147u, Opcode::V_CUBEMA_F32}, + {0x14bu, Opcode::V_FMA_F32}, + {0x148u, Opcode::V_BFE_U32}, + {0x149u, Opcode::V_BFE_I32}, + {0x14au, Opcode::V_BFI_B32}, + {0x14eu, Opcode::V_ALIGNBIT_B32}, + {0x151u, Opcode::V_MIN3_F32}, + {0x152u, Opcode::V_MIN3_I32}, + {0x153u, Opcode::V_MIN3_U32}, + {0x351u, Opcode::V_MIN3_F16}, + {0x154u, Opcode::V_MAX3_F32}, + {0x155u, Opcode::V_MAX3_I32}, + {0x156u, Opcode::V_MAX3_U32}, + {0x354u, Opcode::V_MAX3_F16}, + {0x157u, Opcode::V_MED3_F32}, + {0x158u, Opcode::V_MED3_I32}, + {0x159u, Opcode::V_MED3_U32}, + {0x357u, Opcode::V_MED3_F16}, + {0x358u, Opcode::V_MED3_I16}, + {0x15du, Opcode::V_SAD_U32}, + {0x15eu, Opcode::V_CVT_PK_U8_F32}, + {0x178u, Opcode::V_XOR3_B32}, + {0x12fu, Opcode::V_CVT_PKRTZ_F16_F32}, + {0x169u, Opcode::V_MUL_LO_U32}, + {0x16au, Opcode::V_MUL_HI_U32}, + {0x16bu, Opcode::V_MUL_LO_I32}, + {0x16cu, Opcode::V_MUL_HI_I32}, + {0x303u, Opcode::V_ADD_NC_U16}, + {0x304u, Opcode::V_SUB_NC_U16}, + {0x307u, Opcode::V_LSHRREV_B16}, + {0x308u, Opcode::V_ASHRREV_I16}, + {0x309u, Opcode::V_MAX_U16}, + {0x30au, Opcode::V_MAX_I16}, + {0x30bu, Opcode::V_MIN_U16}, + {0x30cu, Opcode::V_MIN_I16}, + {0x30du, Opcode::V_ADD_NC_I16}, + {0x30eu, Opcode::V_SUB_NC_I16}, + {0x30fu, Opcode::V_ADD_I32}, + {0x310u, Opcode::V_SUB_I32}, + {0x311u, Opcode::V_PACK_B32_F16}, + {0x314u, Opcode::V_LSHLREV_B16}, + {0x319u, Opcode::V_SUBREV_I32}, + {0x345u, Opcode::V_XAD_U32}, + {0x346u, Opcode::V_LSHL_ADD_U32}, + {0x347u, Opcode::V_ADD_LSHL_U32}, + {0x360u, Opcode::V_READLANE_B32}, + {0x361u, Opcode::V_WRITELANE_B32}, + {0x362u, Opcode::V_LDEXP_F32}, + {0x363u, Opcode::V_BFM_B32}, + {0x364u, Opcode::V_BCNT_U32_B32}, + {0x365u, Opcode::V_MBCNT_LO_U32_B32}, + {0x366u, Opcode::V_MBCNT_HI_U32_B32}, + {0x368u, Opcode::V_CVT_PKNORM_I16_F32}, + {0x369u, Opcode::V_CVT_PKNORM_U16_F32}, + {0x36au, Opcode::V_CVT_PK_U16_U32}, + {0x36bu, Opcode::V_CVT_PK_I16_I32}, + {0x36fu, Opcode::V_LSHL_OR_B32}, + {0x371u, Opcode::V_AND_OR_B32}, + {0x372u, Opcode::V_OR3_B32}, + {0x377u, Opcode::V_PERMLANE16_B32}, + {0x378u, Opcode::V_PERMLANEX16_B32}, + {0x34bu, Opcode::V_FMA_F16}, + {0x36du, Opcode::V_ADD3_U32}, + {0x14fu, Opcode::V_ALIGNBYTE_B32}, }; constexpr auto VOP3_OPS = Detail::MakeOpcodeTable<0x400>(VOP3_OPCODE_LIST); constexpr OpcodeMap VOP3P_OPCODE_LIST[] = { - {0x00u, Opcode::VPkMadI16}, {0x01u, Opcode::VPkMulLoU16}, {0x02u, Opcode::VPkAddI16}, - {0x03u, Opcode::VPkSubI16}, {0x04u, Opcode::VPkLshlrevB16}, {0x05u, Opcode::VPkLshrrevB16}, - {0x06u, Opcode::VPkAshrrevI16}, {0x07u, Opcode::VPkMaxI16}, {0x08u, Opcode::VPkMinI16}, - {0x09u, Opcode::VPkMadU16}, {0x0au, Opcode::VPkAddU16}, {0x0bu, Opcode::VPkSubU16}, - {0x0cu, Opcode::VPkMaxU16}, {0x0du, Opcode::VPkMinU16}, {0x0eu, Opcode::VPkFmaF16}, - {0x0fu, Opcode::VPkAddF16}, {0x10u, Opcode::VPkMulF16}, {0x11u, Opcode::VPkMinF16}, - {0x12u, Opcode::VPkMaxF16}, {0x20u, Opcode::VFmaF32}, {0x21u, Opcode::VMadMixloF16}, - {0x22u, Opcode::VMadMixhiF16}, + {0x00u, Opcode::V_PK_MAD_I16}, {0x01u, Opcode::V_PK_MUL_LO_U16}, + {0x02u, Opcode::V_PK_ADD_I16}, {0x03u, Opcode::V_PK_SUB_I16}, + {0x04u, Opcode::V_PK_LSHLREV_B16}, {0x05u, Opcode::V_PK_LSHRREV_B16}, + {0x06u, Opcode::V_PK_ASHRREV_I16}, {0x07u, Opcode::V_PK_MAX_I16}, + {0x08u, Opcode::V_PK_MIN_I16}, {0x09u, Opcode::V_PK_MAD_U16}, + {0x0au, Opcode::V_PK_ADD_U16}, {0x0bu, Opcode::V_PK_SUB_U16}, + {0x0cu, Opcode::V_PK_MAX_U16}, {0x0du, Opcode::V_PK_MIN_U16}, + {0x0eu, Opcode::V_PK_FMA_F16}, {0x0fu, Opcode::V_PK_ADD_F16}, + {0x10u, Opcode::V_PK_MUL_F16}, {0x11u, Opcode::V_PK_MIN_F16}, + {0x12u, Opcode::V_PK_MAX_F16}, {0x20u, Opcode::V_FMA_F32}, + {0x21u, Opcode::V_MAD_MIXLO_F16}, {0x22u, Opcode::V_MAD_MIXHI_F16}, }; constexpr auto VOP3P_OPS = Detail::MakeOpcodeTable<0x80>(VOP3P_OPCODE_LIST); @@ -310,7 +348,7 @@ bool IsUnsupportedVop3EncodedVop2Alias(uint32_t opcode) { Opcode LookupVop3Opcode(uint32_t opcode) { const auto direct = Detail::LookupOpcode(VOP3_OPS, opcode); - if (direct != Opcode::Unsupported) { + if (direct != Opcode::UNSUPPORTED) { return direct; } if (opcode <= 0xffu) { @@ -318,14 +356,14 @@ Opcode LookupVop3Opcode(uint32_t opcode) { } if (opcode >= 0x100u && opcode <= 0x13fu) { if (IsUnsupportedVop3EncodedVop2Alias(opcode - 0x100u)) { - return Opcode::Unsupported; + return Opcode::UNSUPPORTED; } return LookupVop2Opcode(opcode - 0x100u); } if (opcode >= 0x180u && opcode <= 0x1ffu) { return Detail::LookupOpcode(VOP3_ENCODED_VOP1_OPS, opcode - 0x180u); } - return Opcode::Unsupported; + return Opcode::UNSUPPORTED; } bool IsVop3EncodedVopc(uint32_t opcode) { @@ -342,57 +380,60 @@ bool IsVop3EncodedVop1(uint32_t opcode) { Opcode LookupVintrpOpcode(uint32_t opcode) { switch (opcode) { - case 0x00u: return Opcode::VInterpP1F32; - case 0x01u: return Opcode::VInterpP2F32; - case 0x02u: return Opcode::VInterpMovF32; - default: return Opcode::Unsupported; + case 0x00u: return Opcode::V_INTERP_P1_F32; + case 0x01u: return Opcode::V_INTERP_P2_F32; + case 0x02u: return Opcode::V_INTERP_MOV_F32; + default: return Opcode::UNSUPPORTED; } } bool UsesScalarDestination(Opcode opcode) { - return opcode == Opcode::VReadfirstlaneB32 || opcode == Opcode::VReadlaneB32; + return opcode == Opcode::V_READFIRSTLANE_B32 || opcode == Opcode::V_READLANE_B32; } bool IsVop3BCarryOutOpcode(Opcode opcode) { - return opcode == Opcode::VAddI32 || opcode == Opcode::VSubI32 || opcode == Opcode::VSubrevI32; + return opcode == Opcode::V_ADD_I32 || opcode == Opcode::V_SUB_I32 || + opcode == Opcode::V_SUBREV_I32; } bool IsVop3BMadU64Opcode(Opcode opcode) { - return opcode == Opcode::VMadU64U32; + return opcode == Opcode::V_MAD_U64_U32; } bool IsPermlaneOpcode(Opcode opcode) { - return opcode == Opcode::VPermlane16B32 || opcode == Opcode::VPermlanex16B32; + return opcode == Opcode::V_PERMLANE16_B32 || opcode == Opcode::V_PERMLANEX16_B32; } bool IsVop2LowHalfF16Opcode(Opcode opcode) { - return opcode == Opcode::VAddF16 || opcode == Opcode::VSubF16 || opcode == Opcode::VSubrevF16 || - opcode == Opcode::VMulF16 || opcode == Opcode::VFmacF16 || opcode == Opcode::VFmamkF16 || - opcode == Opcode::VFmaakF16 || opcode == Opcode::VMaxF16 || opcode == Opcode::VMinF16; + return opcode == Opcode::V_ADD_F16 || opcode == Opcode::V_SUB_F16 || + opcode == Opcode::V_SUBREV_F16 || opcode == Opcode::V_MUL_F16 || + opcode == Opcode::V_FMAC_F16 || opcode == Opcode::V_FMAMK_F16 || + opcode == Opcode::V_FMAAK_F16 || opcode == Opcode::V_MAX_F16 || + opcode == Opcode::V_MIN_F16; } bool IsNativeVop3F16TernaryOpcode(Opcode opcode) { - return opcode == Opcode::VMin3F16 || opcode == Opcode::VMax3F16 || opcode == Opcode::VMed3F16 || - opcode == Opcode::VFmaF16; + return opcode == Opcode::V_MIN3_F16 || opcode == Opcode::V_MAX3_F16 || + opcode == Opcode::V_MED3_F16 || opcode == Opcode::V_FMA_F16; } bool IsNativeVop3I16TernaryOpcode(Opcode opcode) { - return opcode == Opcode::VMed3I16; + return opcode == Opcode::V_MED3_I16; } bool IsNativeVop3B16BinaryOpcode(Opcode opcode) { switch (opcode) { - case Opcode::VAddNcU16: - case Opcode::VSubNcU16: - case Opcode::VMaxU16: - case Opcode::VMaxI16: - case Opcode::VMinU16: - case Opcode::VMinI16: - case Opcode::VAddNcI16: - case Opcode::VSubNcI16: - case Opcode::VLshlrevB16: - case Opcode::VLshrrevB16: - case Opcode::VAshrrevI16: return true; + case Opcode::V_ADD_NC_U16: + case Opcode::V_SUB_NC_U16: + case Opcode::V_MAX_U16: + case Opcode::V_MAX_I16: + case Opcode::V_MIN_U16: + case Opcode::V_MIN_I16: + case Opcode::V_ADD_NC_I16: + case Opcode::V_SUB_NC_I16: + case Opcode::V_LSHLREV_B16: + case Opcode::V_LSHRREV_B16: + case Opcode::V_ASHRREV_I16: return true; default: return false; } } @@ -408,33 +449,33 @@ bool IsVopcCompareExec(Opcode opcode); bool IsVop1FloatSourceOpcode(Opcode opcode) { switch (opcode) { - case Opcode::VMovB32: - case Opcode::VCvtF32F16: - case Opcode::VCvtU32F32: - case Opcode::VCvtI32F32: - case Opcode::VCvtRpiI32F32: - case Opcode::VCvtFlrI32F32: - case Opcode::VFrexpExpI32F32: - case Opcode::VFrexpMantF32: - case Opcode::VCvtF16F32: - case Opcode::VRcpF32: - case Opcode::VRcpIflagF32: - case Opcode::VFractF32: - case Opcode::VTruncF32: - case Opcode::VCeilF32: - case Opcode::VRndneF32: - case Opcode::VFloorF32: - case Opcode::VExpF32: - case Opcode::VLogF32: - case Opcode::VRsqF32: - case Opcode::VSqrtF32: - case Opcode::VSqrtF16: - case Opcode::VFloorF16: - case Opcode::VCeilF16: - case Opcode::VTruncF16: - case Opcode::VRndneF16: - case Opcode::VSinF32: - case Opcode::VCosF32: return true; + case Opcode::V_MOV_B32: + case Opcode::V_CVT_F32_F16: + case Opcode::V_CVT_U32_F32: + case Opcode::V_CVT_I32_F32: + case Opcode::V_CVT_RPI_I32_F32: + case Opcode::V_CVT_FLR_I32_F32: + case Opcode::V_FREXP_EXP_I32_F32: + case Opcode::V_FREXP_MANT_F32: + case Opcode::V_CVT_F16_F32: + case Opcode::V_RCP_F32: + case Opcode::V_RCP_IFLAG_F32: + case Opcode::V_FRACT_F32: + case Opcode::V_TRUNC_F32: + case Opcode::V_CEIL_F32: + case Opcode::V_RNDNE_F32: + case Opcode::V_FLOOR_F32: + case Opcode::V_EXP_F32: + case Opcode::V_LOG_F32: + case Opcode::V_RSQ_F32: + case Opcode::V_SQRT_F32: + case Opcode::V_SQRT_F16: + case Opcode::V_FLOOR_F16: + case Opcode::V_CEIL_F16: + case Opcode::V_TRUNC_F16: + case Opcode::V_RNDNE_F16: + case Opcode::V_SIN_F32: + case Opcode::V_COS_F32: return true; default: return false; } } @@ -456,7 +497,7 @@ constexpr uint32_t SdwaSelFull() { } struct Vop1SdwaRule { - Opcode opcode = Opcode::Unknown; + Opcode opcode = Opcode::UNKNOWN; uint32_t source_selectors = SdwaSelFull(); uint32_t partial_dst_selectors = 0; uint32_t partial_dst_source_selectors = 0; @@ -464,43 +505,45 @@ struct Vop1SdwaRule { }; constexpr Vop1SdwaRule VOP1_SDWA_RULES[] = { - {Opcode::VMovB32, SdwaSelBytes() | SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), + {Opcode::V_MOV_B32, SdwaSelBytes() | SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), SdwaSelWords() | SdwaSelFull(), false}, - {Opcode::VCvtF32U32, SdwaSelBytes() | SdwaSelWords() | SdwaSelFull(), 0, 0, false}, - {Opcode::VCvtF32I32, SdwaSelBytes() | SdwaSelWords() | SdwaSelFull(), 0, 0, false}, - {Opcode::VCvtF32Ubyte0, SdwaSelBytes() | SdwaSelWords() | SdwaSelFull(), 0, 0, false}, - {Opcode::VCvtF32F16, SdwaSelWords() | SdwaSelFull(), 0, 0, true}, - {Opcode::VCvtF16F32, SdwaSelFull(), SdwaSelWords(), SdwaSelFull(), false}, - {Opcode::VCvtF16U16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), + {Opcode::V_CVT_F32_U32, SdwaSelBytes() | SdwaSelWords() | SdwaSelFull(), 0, 0, false}, + {Opcode::V_CVT_F32_I32, SdwaSelBytes() | SdwaSelWords() | SdwaSelFull(), 0, 0, false}, + {Opcode::V_CVT_F32_UBYTE0, SdwaSelBytes() | SdwaSelWords() | SdwaSelFull(), 0, 0, false}, + {Opcode::V_CVT_F32_F16, SdwaSelWords() | SdwaSelFull(), 0, 0, true}, + {Opcode::V_CVT_F16_F32, SdwaSelFull(), SdwaSelWords(), SdwaSelFull(), false}, + {Opcode::V_CVT_F16_U16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), SdwaSelWords() | SdwaSelFull(), false}, - {Opcode::VCvtU16F16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), + {Opcode::V_CVT_U16_F16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), SdwaSelWords() | SdwaSelFull(), false}, - {Opcode::VCvtF16I16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), + {Opcode::V_CVT_F16_I16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), SdwaSelWords() | SdwaSelFull(), false}, - {Opcode::VCvtI16F16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), + {Opcode::V_CVT_I16_F16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), SdwaSelWords() | SdwaSelFull(), false}, - {Opcode::VRcpF16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), + {Opcode::V_RCP_F16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), SdwaSelWords() | SdwaSelFull(), true}, - {Opcode::VSqrtF16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), + {Opcode::V_SQRT_F16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), SdwaSelWords() | SdwaSelFull(), false}, - {Opcode::VRsqF16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), + {Opcode::V_RSQ_F16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), SdwaSelWords() | SdwaSelFull(), false}, - {Opcode::VLogF16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), + {Opcode::V_LOG_F16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), SdwaSelWords() | SdwaSelFull(), true}, - {Opcode::VExpF16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), + {Opcode::V_EXP_F16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), SdwaSelWords() | SdwaSelFull(), true}, - {Opcode::VFloorF16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), + {Opcode::V_FLOOR_F16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), SdwaSelWords() | SdwaSelFull(), false}, - {Opcode::VCeilF16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), + {Opcode::V_CEIL_F16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), SdwaSelWords() | SdwaSelFull(), false}, - {Opcode::VTruncF16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), + {Opcode::V_TRUNC_F16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), SdwaSelWords() | SdwaSelFull(), false}, - {Opcode::VRndneF16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), + {Opcode::V_RNDNE_F16, SdwaSelWords() | SdwaSelFull(), SdwaSelWords(), SdwaSelWords() | SdwaSelFull(), false}, - {Opcode::VCvtU32F32, SdwaSelFull(), SdwaSelBytes() | SdwaSelWords(), SdwaSelFull(), false}, - {Opcode::VCvtI32F32, SdwaSelFull(), SdwaSelBytes() | SdwaSelWords(), SdwaSelFull(), false}, - {Opcode::VCvtRpiI32F32, SdwaSelFull(), SdwaSelBytes() | SdwaSelWords(), SdwaSelFull(), false}, - {Opcode::VCvtFlrI32F32, SdwaSelFull(), SdwaSelBytes() | SdwaSelWords(), SdwaSelFull(), false}, + {Opcode::V_CVT_U32_F32, SdwaSelFull(), SdwaSelBytes() | SdwaSelWords(), SdwaSelFull(), false}, + {Opcode::V_CVT_I32_F32, SdwaSelFull(), SdwaSelBytes() | SdwaSelWords(), SdwaSelFull(), false}, + {Opcode::V_CVT_RPI_I32_F32, SdwaSelFull(), SdwaSelBytes() | SdwaSelWords(), SdwaSelFull(), + false}, + {Opcode::V_CVT_FLR_I32_F32, SdwaSelFull(), SdwaSelBytes() | SdwaSelWords(), SdwaSelFull(), + false}, }; const Vop1SdwaRule* FindVop1SdwaRule(Opcode opcode) { @@ -533,7 +576,7 @@ bool IsVop1SdwaSourceSupported(Opcode opcode, uint32_t src_sel, bool src_neg, bo bool IsVop1SdwaDestinationSupported(Opcode opcode, uint32_t dst_sel, uint32_t dst_u, uint32_t src_sel) { - if ((opcode == Opcode::VCvtU16F16 || opcode == Opcode::VCvtI16F16) && dst_sel == 6u) { + if ((opcode == Opcode::V_CVT_U16_F16 || opcode == Opcode::V_CVT_I16_F16) && dst_sel == 6u) { return false; } if (dst_sel == 6u) { @@ -549,11 +592,11 @@ bool IsVop1SdwaDestinationSupported(Opcode opcode, uint32_t dst_sel, uint32_t ds bool HasUnsupportedVop1SdwaSourceModifiers(Opcode opcode, bool src_neg, bool src_abs) { switch (opcode) { - case Opcode::VCvtU16F16: - case Opcode::VCvtI16F16: - case Opcode::VSqrtF16: - case Opcode::VRsqF16: return src_neg || src_abs; - case Opcode::VLogF16: return src_neg; + case Opcode::V_CVT_U16_F16: + case Opcode::V_CVT_I16_F16: + case Opcode::V_SQRT_F16: + case Opcode::V_RSQ_F16: return src_neg || src_abs; + case Opcode::V_LOG_F16: return src_neg; default: return false; } } @@ -707,129 +750,129 @@ bool TryDecodeVop1Modifier(uint32_t pc, std::span code, uint32_t bool IsVop2FloatSourceOpcode(Opcode opcode) { switch (opcode) { - case Opcode::VAddF32: - case Opcode::VSubF32: - case Opcode::VSubrevF32: - case Opcode::VMulF32: - case Opcode::VMinF32: - case Opcode::VMaxF32: - case Opcode::VMacF32: - case Opcode::VMadmkF32: - case Opcode::VMadakF32: - case Opcode::VAddF16: - case Opcode::VSubF16: - case Opcode::VSubrevF16: - case Opcode::VMulF16: - case Opcode::VFmacF16: - case Opcode::VFmamkF16: - case Opcode::VFmaakF16: - case Opcode::VMaxF16: - case Opcode::VMinF16: return true; + case Opcode::V_ADD_F32: + case Opcode::V_SUB_F32: + case Opcode::V_SUBREV_F32: + case Opcode::V_MUL_F32: + case Opcode::V_MIN_F32: + case Opcode::V_MAX_F32: + case Opcode::V_MAC_F32: + case Opcode::V_MADMK_F32: + case Opcode::V_MADAK_F32: + case Opcode::V_ADD_F16: + case Opcode::V_SUB_F16: + case Opcode::V_SUBREV_F16: + case Opcode::V_MUL_F16: + case Opcode::V_FMAC_F16: + case Opcode::V_FMAMK_F16: + case Opcode::V_FMAAK_F16: + case Opcode::V_MAX_F16: + case Opcode::V_MIN_F16: return true; default: return false; } } bool IsVop2FloatResultOpcode(Opcode opcode) { switch (opcode) { - case Opcode::VAddF32: - case Opcode::VSubF32: - case Opcode::VSubrevF32: - case Opcode::VMulF32: - case Opcode::VMinF32: - case Opcode::VMaxF32: - case Opcode::VMacF32: - case Opcode::VMadmkF32: - case Opcode::VMadakF32: - case Opcode::VAddF16: - case Opcode::VSubF16: - case Opcode::VSubrevF16: - case Opcode::VMulF16: - case Opcode::VFmacF16: - case Opcode::VFmamkF16: - case Opcode::VFmaakF16: - case Opcode::VMaxF16: - case Opcode::VMinF16: return true; + case Opcode::V_ADD_F32: + case Opcode::V_SUB_F32: + case Opcode::V_SUBREV_F32: + case Opcode::V_MUL_F32: + case Opcode::V_MIN_F32: + case Opcode::V_MAX_F32: + case Opcode::V_MAC_F32: + case Opcode::V_MADMK_F32: + case Opcode::V_MADAK_F32: + case Opcode::V_ADD_F16: + case Opcode::V_SUB_F16: + case Opcode::V_SUBREV_F16: + case Opcode::V_MUL_F16: + case Opcode::V_FMAC_F16: + case Opcode::V_FMAMK_F16: + case Opcode::V_FMAAK_F16: + case Opcode::V_MAX_F16: + case Opcode::V_MIN_F16: return true; default: return false; } } bool IsVop1FloatResultOpcode(Opcode opcode) { switch (opcode) { - case Opcode::VCvtF32I32: - case Opcode::VCvtF32U32: - case Opcode::VCvtF32F16: - case Opcode::VCvtOffF32I4: - case Opcode::VCvtF32Ubyte0: - case Opcode::VCvtF32Ubyte1: - case Opcode::VCvtF32Ubyte2: - case Opcode::VCvtF32Ubyte3: - case Opcode::VRcpF32: - case Opcode::VRcpIflagF32: - case Opcode::VFractF32: - case Opcode::VTruncF32: - case Opcode::VCeilF32: - case Opcode::VRndneF32: - case Opcode::VFloorF32: - case Opcode::VFrexpMantF32: - case Opcode::VExpF32: - case Opcode::VLogF32: - case Opcode::VRsqF32: - case Opcode::VSqrtF32: - case Opcode::VRcpF16: - case Opcode::VRsqF16: - case Opcode::VLogF16: - case Opcode::VExpF16: - case Opcode::VSinF32: - case Opcode::VCosF32: return true; + case Opcode::V_CVT_F32_I32: + case Opcode::V_CVT_F32_U32: + case Opcode::V_CVT_F32_F16: + case Opcode::V_CVT_OFF_F32_I4: + case Opcode::V_CVT_F32_UBYTE0: + case Opcode::V_CVT_F32_UBYTE1: + case Opcode::V_CVT_F32_UBYTE2: + case Opcode::V_CVT_F32_UBYTE3: + case Opcode::V_RCP_F32: + case Opcode::V_RCP_IFLAG_F32: + case Opcode::V_FRACT_F32: + case Opcode::V_TRUNC_F32: + case Opcode::V_CEIL_F32: + case Opcode::V_RNDNE_F32: + case Opcode::V_FLOOR_F32: + case Opcode::V_FREXP_MANT_F32: + case Opcode::V_EXP_F32: + case Opcode::V_LOG_F32: + case Opcode::V_RSQ_F32: + case Opcode::V_SQRT_F32: + case Opcode::V_RCP_F16: + case Opcode::V_RSQ_F16: + case Opcode::V_LOG_F16: + case Opcode::V_EXP_F16: + case Opcode::V_SIN_F32: + case Opcode::V_COS_F32: return true; default: return false; } } bool IsVopcFloatCompareOpcode(Opcode opcode) { switch (opcode) { - case Opcode::VCmpFF32: - case Opcode::VCmpLtF32: - case Opcode::VCmpEqF32: - case Opcode::VCmpLeF32: - case Opcode::VCmpGtF32: - case Opcode::VCmpLgF32: - case Opcode::VCmpGeF32: - case Opcode::VCmpOF32: - case Opcode::VCmpUF32: - case Opcode::VCmpNgeF32: - case Opcode::VCmpNlgF32: - case Opcode::VCmpNgtF32: - case Opcode::VCmpNleF32: - case Opcode::VCmpNeqF32: - case Opcode::VCmpNltF32: - case Opcode::VCmpTruF32: - case Opcode::VCmpxLtF32: - case Opcode::VCmpxEqF32: - case Opcode::VCmpxLeF32: - case Opcode::VCmpxGtF32: - case Opcode::VCmpxLgF32: - case Opcode::VCmpxGeF32: - case Opcode::VCmpxNgeF32: - case Opcode::VCmpxNlgF32: - case Opcode::VCmpxNgtF32: - case Opcode::VCmpxNleF32: - case Opcode::VCmpxNeqF32: - case Opcode::VCmpxNltF32: - case Opcode::VCmpLtF16: - case Opcode::VCmpEqF16: - case Opcode::VCmpLeF16: - case Opcode::VCmpGtF16: - case Opcode::VCmpLgF16: - case Opcode::VCmpGeF16: - case Opcode::VCmpNeqF16: - case Opcode::VCmpxLtF16: - case Opcode::VCmpxEqF16: - case Opcode::VCmpxLeF16: - case Opcode::VCmpxGtF16: - case Opcode::VCmpxGeF16: - case Opcode::VCmpxNeqF16: - case Opcode::VCmpxNltF16: - case Opcode::VCmpClassF32: return true; + case Opcode::V_CMP_F_F32: + case Opcode::V_CMP_LT_F32: + case Opcode::V_CMP_EQ_F32: + case Opcode::V_CMP_LE_F32: + case Opcode::V_CMP_GT_F32: + case Opcode::V_CMP_LG_F32: + case Opcode::V_CMP_GE_F32: + case Opcode::V_CMP_O_F32: + case Opcode::V_CMP_U_F32: + case Opcode::V_CMP_NGE_F32: + case Opcode::V_CMP_NLG_F32: + case Opcode::V_CMP_NGT_F32: + case Opcode::V_CMP_NLE_F32: + case Opcode::V_CMP_NEQ_F32: + case Opcode::V_CMP_NLT_F32: + case Opcode::V_CMP_TRU_F32: + case Opcode::V_CMPX_LT_F32: + case Opcode::V_CMPX_EQ_F32: + case Opcode::V_CMPX_LE_F32: + case Opcode::V_CMPX_GT_F32: + case Opcode::V_CMPX_LG_F32: + case Opcode::V_CMPX_GE_F32: + case Opcode::V_CMPX_NGE_F32: + case Opcode::V_CMPX_NLG_F32: + case Opcode::V_CMPX_NGT_F32: + case Opcode::V_CMPX_NLE_F32: + case Opcode::V_CMPX_NEQ_F32: + case Opcode::V_CMPX_NLT_F32: + case Opcode::V_CMP_LT_F16: + case Opcode::V_CMP_EQ_F16: + case Opcode::V_CMP_LE_F16: + case Opcode::V_CMP_GT_F16: + case Opcode::V_CMP_LG_F16: + case Opcode::V_CMP_GE_F16: + case Opcode::V_CMP_NEQ_F16: + case Opcode::V_CMPX_LT_F16: + case Opcode::V_CMPX_EQ_F16: + case Opcode::V_CMPX_LE_F16: + case Opcode::V_CMPX_GT_F16: + case Opcode::V_CMPX_GE_F16: + case Opcode::V_CMPX_NEQ_F16: + case Opcode::V_CMPX_NLT_F16: + case Opcode::V_CMP_CLASS_F32: return true; default: return false; } } @@ -933,7 +976,7 @@ bool ValidateVop2Sdwa(Instruction& inst, uint32_t opcode, const Vop2SdwaFields& return false; } if (IsFullWidthVop2Sdwa(fields)) { - if (!IsVop2FloatSourceOpcode(inst.opcode) && inst.opcode != Opcode::VCndmaskB32 && + if (!IsVop2FloatSourceOpcode(inst.opcode) && inst.opcode != Opcode::V_CNDMASK_B32 && (fields.src0_neg != 0u || fields.src0_abs != 0u || fields.src1_neg != 0u || fields.src1_abs != 0u)) { SetUnsupported(inst, Family::VOP2, opcode, @@ -962,7 +1005,7 @@ bool ValidateVop2Sdwa(Instruction& inst, uint32_t opcode, const Vop2SdwaFields& const bool has_source_modifiers = (fields.src0_neg != 0u || fields.src0_abs != 0u || fields.src1_neg != 0u || fields.src1_abs != 0u); const bool cndmask_float_modifiers = - inst.opcode == Opcode::VCndmaskB32 && fields.src0_sel == 6u && fields.src1_sel == 6u; + inst.opcode == Opcode::V_CNDMASK_B32 && fields.src0_sel == 6u && fields.src1_sel == 6u; if (!rule->source_modifiers && has_source_modifiers && !cndmask_float_modifiers) { SetUnsupported(inst, Family::VOP2, opcode, "VOP2 SDWA source modifiers are not supported"); return false; @@ -974,21 +1017,21 @@ bool FinalizeVop2Instruction(uint32_t pc, std::span code, uint32 Instruction& inst, std::string* error) { (void)pc; switch (inst.opcode) { - case Opcode::VMadmkF32: - case Opcode::VFmamkF16: + case Opcode::V_MADMK_F32: + case Opcode::V_FMAMK_F16: inst.src2 = inst.src1; inst.src1 = {}; inst.src1.kind = OperandKind::LiteralConstant; inst.src_count = 3; break; - case Opcode::VMadakF32: - case Opcode::VFmaakF16: + case Opcode::V_MADAK_F32: + case Opcode::V_FMAAK_F16: inst.src2 = {}; inst.src2.kind = OperandKind::LiteralConstant; inst.src_count = 3; break; - case Opcode::VAddcU32: - case Opcode::VSubrevCoCiU32: + case Opcode::V_ADDC_U32: + case Opcode::V_SUBREV_CO_CI_U32: inst.dst2.kind = OperandKind::VccLo; inst.src2.kind = OperandKind::VccLo; inst.src_count = 3; @@ -1121,7 +1164,7 @@ VopcSdwaFields DecodeVopcSdwaFields(uint32_t modifier) { } bool SupportsVopcSdwa(Opcode opcode) { - return opcode != Opcode::Unsupported; + return opcode != Opcode::UNSUPPORTED; } bool DecodeVopcSdwa(uint32_t pc, std::span code, uint32_t word_index, @@ -1168,7 +1211,7 @@ bool DecodeVopcDpp(uint32_t pc, std::span code, uint32_t word_in const auto modifier = code[word_index + 1u]; const auto src0 = modifier & 0xffu; SetRawWords(inst, code, word_index, 2); - if (inst.opcode == Opcode::Unsupported) { + if (inst.opcode == Opcode::UNSUPPORTED) { SetUnsupported(inst, Family::VOPC, opcode, "VOPC opcode is not implemented"); return true; } @@ -1192,75 +1235,75 @@ bool DecodeVopcDpp(uint32_t pc, std::span code, uint32_t word_in uint32_t NativeVop3SourceCount(Opcode opcode) { switch (opcode) { - case Opcode::VMulLoU32: - case Opcode::VMulHiU32: - case Opcode::VMulLoI32: - case Opcode::VMulHiI32: - case Opcode::VMulI32I24: - case Opcode::VAddNcU16: - case Opcode::VSubNcU16: - case Opcode::VMaxU16: - case Opcode::VMaxI16: - case Opcode::VMinU16: - case Opcode::VMinI16: - case Opcode::VAddNcI16: - case Opcode::VSubNcI16: - case Opcode::VLshlrevB16: - case Opcode::VLshrrevB16: - case Opcode::VAshrrevI16: - case Opcode::VAddI32: - case Opcode::VSubI32: - case Opcode::VSubrevI32: - case Opcode::VPackB32F16: - case Opcode::VReadlaneB32: - case Opcode::VWritelaneB32: - case Opcode::VCvtPkrtzF16F32: - case Opcode::VLdexpF32: - case Opcode::VBfmB32: - case Opcode::VBcntU32B32: - case Opcode::VCvtPknormI16F32: - case Opcode::VCvtPknormU16F32: - case Opcode::VCvtPkU16U32: - case Opcode::VCvtPkI16I32: return 2; + case Opcode::V_MUL_LO_U32: + case Opcode::V_MUL_HI_U32: + case Opcode::V_MUL_LO_I32: + case Opcode::V_MUL_HI_I32: + case Opcode::V_MUL_I32_I24: + case Opcode::V_ADD_NC_U16: + case Opcode::V_SUB_NC_U16: + case Opcode::V_MAX_U16: + case Opcode::V_MAX_I16: + case Opcode::V_MIN_U16: + case Opcode::V_MIN_I16: + case Opcode::V_ADD_NC_I16: + case Opcode::V_SUB_NC_I16: + case Opcode::V_LSHLREV_B16: + case Opcode::V_LSHRREV_B16: + case Opcode::V_ASHRREV_I16: + case Opcode::V_ADD_I32: + case Opcode::V_SUB_I32: + case Opcode::V_SUBREV_I32: + case Opcode::V_PACK_B32_F16: + case Opcode::V_READLANE_B32: + case Opcode::V_WRITELANE_B32: + case Opcode::V_CVT_PKRTZ_F16_F32: + case Opcode::V_LDEXP_F32: + case Opcode::V_BFM_B32: + case Opcode::V_BCNT_U32_B32: + case Opcode::V_CVT_PKNORM_I16_F32: + case Opcode::V_CVT_PKNORM_U16_F32: + case Opcode::V_CVT_PK_U16_U32: + case Opcode::V_CVT_PK_I16_I32: return 2; default: return 3; } } uint32_t Vop3pSourceCount(Opcode opcode) { switch (opcode) { - case Opcode::VPkMulLoU16: - case Opcode::VPkAddI16: - case Opcode::VPkSubI16: - case Opcode::VPkLshlrevB16: - case Opcode::VPkLshrrevB16: - case Opcode::VPkAshrrevI16: - case Opcode::VPkMaxI16: - case Opcode::VPkMinI16: - case Opcode::VPkAddU16: - case Opcode::VPkSubU16: - case Opcode::VPkMaxU16: - case Opcode::VPkMinU16: - case Opcode::VPkAddF16: - case Opcode::VPkMulF16: - case Opcode::VPkMinF16: - case Opcode::VPkMaxF16: return 2; + case Opcode::V_PK_MUL_LO_U16: + case Opcode::V_PK_ADD_I16: + case Opcode::V_PK_SUB_I16: + case Opcode::V_PK_LSHLREV_B16: + case Opcode::V_PK_LSHRREV_B16: + case Opcode::V_PK_ASHRREV_I16: + case Opcode::V_PK_MAX_I16: + case Opcode::V_PK_MIN_I16: + case Opcode::V_PK_ADD_U16: + case Opcode::V_PK_SUB_U16: + case Opcode::V_PK_MAX_U16: + case Opcode::V_PK_MIN_U16: + case Opcode::V_PK_ADD_F16: + case Opcode::V_PK_MUL_F16: + case Opcode::V_PK_MIN_F16: + case Opcode::V_PK_MAX_F16: return 2; default: return 3; } } bool IsPackedVop3p(Opcode opcode) { switch (opcode) { - case Opcode::VPkAddF16: - case Opcode::VPkMulF16: - case Opcode::VPkMinF16: - case Opcode::VPkMaxF16: - case Opcode::VPkFmaF16: return true; + case Opcode::V_PK_ADD_F16: + case Opcode::V_PK_MUL_F16: + case Opcode::V_PK_MIN_F16: + case Opcode::V_PK_MAX_F16: + case Opcode::V_PK_FMA_F16: return true; default: return false; } } bool IsMadMixF16(Opcode opcode) { - return opcode == Opcode::VMadMixloF16 || opcode == Opcode::VMadMixhiF16; + return opcode == Opcode::V_MAD_MIXLO_F16 || opcode == Opcode::V_MAD_MIXHI_F16; } void ApplyVop3pSourceModifiers(Instruction& inst, uint32_t op_sel, uint32_t op_sel_hi, uint32_t neg, @@ -1330,28 +1373,28 @@ bool SupportsNativeVop3SourceModifiers(Opcode opcode) { return true; } switch (opcode) { - case Opcode::VCndmaskB32: - case Opcode::VAddF32: - case Opcode::VSubF32: - case Opcode::VSubrevF32: - case Opcode::VMulF32: - case Opcode::VMinF32: - case Opcode::VMaxF32: - case Opcode::VMacF32: - case Opcode::VMadF32: - case Opcode::VFmaF32: - case Opcode::VPackB32F16: - case Opcode::VCubeidF32: - case Opcode::VCubescF32: - case Opcode::VCubetcF32: - case Opcode::VCubemaF32: - case Opcode::VCvtPkrtzF16F32: - case Opcode::VCvtPknormI16F32: - case Opcode::VCvtPknormU16F32: - case Opcode::VMin3F32: - case Opcode::VMax3F32: - case Opcode::VMed3F32: - case Opcode::VLdexpF32: return true; + case Opcode::V_CNDMASK_B32: + case Opcode::V_ADD_F32: + case Opcode::V_SUB_F32: + case Opcode::V_SUBREV_F32: + case Opcode::V_MUL_F32: + case Opcode::V_MIN_F32: + case Opcode::V_MAX_F32: + case Opcode::V_MAC_F32: + case Opcode::V_MAD_F32: + case Opcode::V_FMA_F32: + case Opcode::V_PACK_B32_F16: + case Opcode::V_CUBEID_F32: + case Opcode::V_CUBESC_F32: + case Opcode::V_CUBETC_F32: + case Opcode::V_CUBEMA_F32: + case Opcode::V_CVT_PKRTZ_F16_F32: + case Opcode::V_CVT_PKNORM_I16_F32: + case Opcode::V_CVT_PKNORM_U16_F32: + case Opcode::V_MIN3_F32: + case Opcode::V_MAX3_F32: + case Opcode::V_MED3_F32: + case Opcode::V_LDEXP_F32: return true; default: return false; } } @@ -1361,20 +1404,20 @@ bool SupportsNativeVop3ResultModifiers(Opcode opcode) { return true; } switch (opcode) { - case Opcode::VAddF32: - case Opcode::VSubF32: - case Opcode::VSubrevF32: - case Opcode::VMulF32: - case Opcode::VMinF32: - case Opcode::VMaxF32: - case Opcode::VMacF32: - case Opcode::VMadF32: - case Opcode::VFmaF32: - case Opcode::VFmaF16: - case Opcode::VLdexpF32: - case Opcode::VMin3F32: - case Opcode::VMax3F32: - case Opcode::VMed3F32: return true; + case Opcode::V_ADD_F32: + case Opcode::V_SUB_F32: + case Opcode::V_SUBREV_F32: + case Opcode::V_MUL_F32: + case Opcode::V_MIN_F32: + case Opcode::V_MAX_F32: + case Opcode::V_MAC_F32: + case Opcode::V_MAD_F32: + case Opcode::V_FMA_F32: + case Opcode::V_FMA_F16: + case Opcode::V_LDEXP_F32: + case Opcode::V_MIN3_F32: + case Opcode::V_MAX3_F32: + case Opcode::V_MED3_F32: return true; default: return false; } } @@ -1393,7 +1436,7 @@ bool HasUnsupportedNativeVop3Modifiers(Opcode opcode, bool permlane, bool mad_mi return clamp != 0u || omod != 0u; } if (IsNativeVop3F16TernaryOpcode(opcode)) { - return opcode != Opcode::VFmaF16 && (clamp != 0u || omod != 0u); + return opcode != Opcode::V_FMA_F16 && (clamp != 0u || omod != 0u); } if (IsNativeVop3I16TernaryOpcode(opcode)) { return abs != 0u || clamp != 0u || omod != 0u || neg != 0u; @@ -1405,11 +1448,11 @@ bool HasUnsupportedNativeVop3Modifiers(Opcode opcode, bool permlane, bool mad_mi return clamp != 0u || omod != 0u || neg != 0u; } switch (opcode) { - case Opcode::VLdexpF32: return (abs & ~1u) != 0u || op_sel != 0u || (neg & ~1u) != 0u; - case Opcode::VCndmaskB32: + case Opcode::V_LDEXP_F32: return (abs & ~1u) != 0u || op_sel != 0u || (neg & ~1u) != 0u; + case Opcode::V_CNDMASK_B32: return (abs & ~0x3u) != 0u || op_sel != 0u || clamp != 0u || omod != 0u || (neg & ~0x3u) != 0u; - case Opcode::VPackB32F16: + case Opcode::V_PACK_B32_F16: return (abs & ~0x3u) != 0u || (op_sel & ~0x3u) != 0u || clamp != 0u || omod != 0u || (neg & ~0x3u) != 0u; default: break; @@ -1434,37 +1477,37 @@ void ApplyNativeVop3SourceModifiers(Instruction& inst, uint32_t abs, uint32_t ne bool IsVopcCompareExec(Opcode opcode) { switch (opcode) { - case Opcode::VCmpxLtF32: - case Opcode::VCmpxEqF32: - case Opcode::VCmpxLeF32: - case Opcode::VCmpxGtF32: - case Opcode::VCmpxLgF32: - case Opcode::VCmpxGeF32: - case Opcode::VCmpxNgeF32: - case Opcode::VCmpxNlgF32: - case Opcode::VCmpxNgtF32: - case Opcode::VCmpxNleF32: - case Opcode::VCmpxNeqF32: - case Opcode::VCmpxNltF32: - case Opcode::VCmpxLtI32: - case Opcode::VCmpxEqI32: - case Opcode::VCmpxLeI32: - case Opcode::VCmpxGtI32: - case Opcode::VCmpxNeI32: - case Opcode::VCmpxGeI32: - case Opcode::VCmpxLtU32: - case Opcode::VCmpxEqU32: - case Opcode::VCmpxLeU32: - case Opcode::VCmpxGtU32: - case Opcode::VCmpxNeU32: - case Opcode::VCmpxGeU32: - case Opcode::VCmpxLtF16: - case Opcode::VCmpxEqF16: - case Opcode::VCmpxLeF16: - case Opcode::VCmpxGtF16: - case Opcode::VCmpxGeF16: - case Opcode::VCmpxNeqF16: - case Opcode::VCmpxNltF16: return true; + case Opcode::V_CMPX_LT_F32: + case Opcode::V_CMPX_EQ_F32: + case Opcode::V_CMPX_LE_F32: + case Opcode::V_CMPX_GT_F32: + case Opcode::V_CMPX_LG_F32: + case Opcode::V_CMPX_GE_F32: + case Opcode::V_CMPX_NGE_F32: + case Opcode::V_CMPX_NLG_F32: + case Opcode::V_CMPX_NGT_F32: + case Opcode::V_CMPX_NLE_F32: + case Opcode::V_CMPX_NEQ_F32: + case Opcode::V_CMPX_NLT_F32: + case Opcode::V_CMPX_LT_I32: + case Opcode::V_CMPX_EQ_I32: + case Opcode::V_CMPX_LE_I32: + case Opcode::V_CMPX_GT_I32: + case Opcode::V_CMPX_NE_I32: + case Opcode::V_CMPX_GE_I32: + case Opcode::V_CMPX_LT_U32: + case Opcode::V_CMPX_EQ_U32: + case Opcode::V_CMPX_LE_U32: + case Opcode::V_CMPX_GT_U32: + case Opcode::V_CMPX_NE_U32: + case Opcode::V_CMPX_GE_U32: + case Opcode::V_CMPX_LT_F16: + case Opcode::V_CMPX_EQ_F16: + case Opcode::V_CMPX_LE_F16: + case Opcode::V_CMPX_GT_F16: + case Opcode::V_CMPX_GE_F16: + case Opcode::V_CMPX_NEQ_F16: + case Opcode::V_CMPX_NLT_F16: return true; default: return false; } } @@ -1486,7 +1529,7 @@ bool DecodeVop2(uint32_t pc, std::span code, uint32_t word_index inst.opcode = LookupVop2Opcode(opcode); SetRawWords(inst, code, word_index, 1); - if (inst.opcode == Opcode::Unsupported) { + if (inst.opcode == Opcode::UNSUPPORTED) { SetUnsupported(inst, Family::VOP2, opcode, "VOP2 opcode is not implemented"); return true; } @@ -1522,11 +1565,11 @@ bool DecodeVop1(uint32_t pc, std::span code, uint32_t word_index inst.opcode = Detail::LookupOpcode(VOP1_OPS, opcode); SetRawWords(inst, code, word_index, 1); - if (inst.opcode == Opcode::Unsupported) { + if (inst.opcode == Opcode::UNSUPPORTED) { SetUnsupported(inst, Family::VOP1, opcode, "VOP1 opcode is not implemented"); return true; } - if (inst.opcode == Opcode::VNop) { + if (inst.opcode == Opcode::V_NOP) { inst.dst.kind = OperandKind::Null; inst.src_count = 0; return true; @@ -1575,7 +1618,7 @@ bool DecodeVopc(uint32_t pc, std::span code, uint32_t word_index case 250u: return DecodeVopcDpp(pc, code, word_index, opcode, vsrc1, inst, error); default: break; } - if (inst.opcode == Opcode::Unsupported) { + if (inst.opcode == Opcode::UNSUPPORTED) { SetUnsupported(inst, Family::VOPC, opcode, "VOPC opcode is not implemented"); return true; } @@ -1611,21 +1654,21 @@ bool DecodeVop3(uint32_t pc, std::span code, uint32_t word_index inst.opcode = LookupVop3Opcode(opcode); SetRawWords(inst, code, word_index, 2); - const bool carry_in_out = (inst.opcode == Opcode::VAddcU32 && opcode == 0x128u) || - (inst.opcode == Opcode::VSubrevCoCiU32 && opcode == 0x12au); - const bool vop3b_carry_out = IsVop3BCarryOutOpcode(inst.opcode); - const bool vop3b_mad_u64 = IsVop3BMadU64Opcode(inst.opcode); - const bool vop3b_uses_sdst = carry_in_out || vop3b_carry_out || vop3b_mad_u64; - const bool mad_mix = false; - const bool f16_ternary = IsNativeVop3F16TernaryOpcode(inst.opcode); - const bool i16_ternary = IsNativeVop3I16TernaryOpcode(inst.opcode); - const bool b16_binary = IsNativeVop3B16BinaryOpcode(inst.opcode); - const bool pack_b32_f16 = inst.opcode == Opcode::VPackB32F16; - const bool permlane = IsPermlaneOpcode(inst.opcode); - const bool vop3_vopc = IsVop3EncodedVopc(opcode); - const bool compare_exec = vop3_vopc && IsVopcCompareExec(inst.opcode); - const bool scalar_dst = vop3_vopc || UsesScalarDestination(inst.opcode); - const bool scalar_modifier_limits = UsesScalarDestination(inst.opcode); + const bool carry_in_out = (inst.opcode == Opcode::V_ADDC_U32 && opcode == 0x128u) || + (inst.opcode == Opcode::V_SUBREV_CO_CI_U32 && opcode == 0x12au); + const bool vop3b_carry_out = IsVop3BCarryOutOpcode(inst.opcode); + const bool vop3b_mad_u64 = IsVop3BMadU64Opcode(inst.opcode); + const bool vop3b_uses_sdst = carry_in_out || vop3b_carry_out || vop3b_mad_u64; + const bool mad_mix = false; + const bool f16_ternary = IsNativeVop3F16TernaryOpcode(inst.opcode); + const bool i16_ternary = IsNativeVop3I16TernaryOpcode(inst.opcode); + const bool b16_binary = IsNativeVop3B16BinaryOpcode(inst.opcode); + const bool pack_b32_f16 = inst.opcode == Opcode::V_PACK_B32_F16; + const bool permlane = IsPermlaneOpcode(inst.opcode); + const bool vop3_vopc = IsVop3EncodedVopc(opcode); + const bool compare_exec = vop3_vopc && IsVopcCompareExec(inst.opcode); + const bool scalar_dst = vop3_vopc || UsesScalarDestination(inst.opcode); + const bool scalar_modifier_limits = UsesScalarDestination(inst.opcode); const bool native_source_modifiers = SupportsNativeVop3SourceModifiers(inst.opcode); const bool native_result_modifiers = SupportsNativeVop3ResultModifiers(inst.opcode); const bool modifiers = @@ -1641,11 +1684,11 @@ bool DecodeVop3(uint32_t pc, std::span code, uint32_t word_index SetUnsupported(inst, Family::VOP3, opcode, reason); return true; } - if (inst.opcode == Opcode::Unsupported) { + if (inst.opcode == Opcode::UNSUPPORTED) { SetUnsupported(inst, Family::VOP3, opcode, "VOP3 opcode is not implemented"); return true; } - if (inst.opcode == Opcode::VNop) { + if (inst.opcode == Opcode::V_NOP) { inst.dst.kind = OperandKind::Null; inst.src_count = 0; return true; @@ -1720,7 +1763,7 @@ bool DecodeVop3(uint32_t pc, std::span code, uint32_t word_index if (!DecodeScalarSource(src1, pc, inst.src1, error)) { return false; } - if (inst.opcode == Opcode::VCndmaskB32) { + if (inst.opcode == Opcode::V_CNDMASK_B32) { if (!DecodeScalarSource(src2, pc, inst.src2, error)) { return false; } @@ -1781,7 +1824,7 @@ bool DecodeVop3p(uint32_t pc, std::span code, uint32_t word_inde inst.opcode = Detail::LookupOpcode(VOP3P_OPS, opcode); SetRawWords(inst, code, word_index, 2); - if (inst.opcode == Opcode::Unsupported) { + if (inst.opcode == Opcode::UNSUPPORTED) { SetUnsupported(inst, Family::VOP3P, opcode, "VOP3P opcode is not implemented"); return true; } @@ -1794,7 +1837,7 @@ bool DecodeVop3p(uint32_t pc, std::span code, uint32_t word_inde if (inst.src_count > 2u && !DecodeScalarSource(src2, pc, inst.src2, error)) { return false; } - if (inst.opcode == Opcode::VFmaF32) { + if (inst.opcode == Opcode::V_FMA_F32) { inst.dst.clamp = clamp != 0u; } else if (IsMadMixF16(inst.opcode)) { inst.dst.clamp = clamp != 0u; @@ -1805,13 +1848,13 @@ bool DecodeVop3p(uint32_t pc, std::span code, uint32_t word_inde return true; } ApplyVop3pSourceModifiers(inst, op_sel, op_sel_hi, neg, neg_hi); - if (inst.opcode == Opcode::VMadMixloF16) { + if (inst.opcode == Opcode::V_MAD_MIXLO_F16) { ApplyVop3pMixAbsModifiers(inst); inst.dst.sdwa_sel = 4; - } else if (inst.opcode == Opcode::VMadMixhiF16) { + } else if (inst.opcode == Opcode::V_MAD_MIXHI_F16) { ApplyVop3pMixAbsModifiers(inst); inst.dst.sdwa_sel = 5; - } else if (inst.opcode == Opcode::VFmaF32) { + } else if (inst.opcode == Opcode::V_FMA_F32) { ApplyVop3pMixAbsModifiers(inst); } ReadLiteralOperands(code, word_index, inst); @@ -1834,13 +1877,13 @@ void DecodeVintrp(uint32_t pc, std::span code, uint32_t word_ind inst.opcode_id = opcode; inst.opcode = LookupVintrpOpcode(opcode); SetRawWords(inst, code, word_index, 1); - if (inst.opcode == Opcode::Unsupported) { + if (inst.opcode == Opcode::UNSUPPORTED) { SetUnsupported(inst, Family::VINTRP, opcode, "VINTRP opcode is not implemented"); return; } DecodeVectorGpr(vdst, inst.dst); - if (inst.opcode == Opcode::VInterpMovF32) { + if (inst.opcode == Opcode::V_INTERP_MOV_F32) { inst.src0.kind = OperandKind::IntegerInlineConstant; inst.src0.value = vsrc & 0x3u; inst.src0.signed_val = static_cast(inst.src0.value); diff --git a/src/graphics/shader/recompiler/ir/ShaderIR.cpp b/src/graphics/shader/recompiler/ir/ShaderIR.cpp index 9f87e0f10..789654bb8 100644 --- a/src/graphics/shader/recompiler/ir/ShaderIR.cpp +++ b/src/graphics/shader/recompiler/ir/ShaderIR.cpp @@ -71,10 +71,10 @@ bool AppendScalarResultSccNonZero(const Decoder::Instruction& decoded, BasicBloc uint32_t VectorByteConvertIndex(Decoder::Opcode opcode) { switch (opcode) { - case Decoder::Opcode::VCvtF32Ubyte0: return 0; - case Decoder::Opcode::VCvtF32Ubyte1: return 1; - case Decoder::Opcode::VCvtF32Ubyte2: return 2; - case Decoder::Opcode::VCvtF32Ubyte3: return 3; + case Decoder::Opcode::V_CVT_F32_UBYTE0: return 0; + case Decoder::Opcode::V_CVT_F32_UBYTE1: return 1; + case Decoder::Opcode::V_CVT_F32_UBYTE2: return 2; + case Decoder::Opcode::V_CVT_F32_UBYTE3: return 3; default: return 0xffffffffu; } } @@ -228,8 +228,8 @@ MemoryInfo MemoryInfoFromDecoded(const Decoder::Instruction& decoded, ResourceKi mem.data_signed = decoded.data_signed; mem.typed = decoded.typed; mem.formatted = decoded.formatted; - mem.image_has_mip = decoded.opcode == Decoder::Opcode::ImageLoadMip || - decoded.opcode == Decoder::Opcode::ImageStoreMip; + mem.image_has_mip = decoded.opcode == Decoder::Opcode::IMAGE_LOAD_MIP || + decoded.opcode == Decoder::Opcode::IMAGE_STORE_MIP; mem.glc = decoded.glc; mem.slc = decoded.slc; mem.idxen = decoded.idxen; @@ -451,10 +451,10 @@ bool LowerScalarSelect64(const Decoder::Instruction& decoded, BasicBlock& block, uint32_t ScalarShiftLeftAddAmount(Decoder::Opcode opcode) { switch (opcode) { - case Decoder::Opcode::SLshl1AddU32: return 1; - case Decoder::Opcode::SLshl2AddU32: return 2; - case Decoder::Opcode::SLshl3AddU32: return 3; - case Decoder::Opcode::SLshl4AddU32: return 4; + case Decoder::Opcode::S_LSHL1_ADD_U32: return 1; + case Decoder::Opcode::S_LSHL2_ADD_U32: return 2; + case Decoder::Opcode::S_LSHL3_ADD_U32: return 3; + case Decoder::Opcode::S_LSHL4_ADD_U32: return 4; default: return 0; } } @@ -484,20 +484,20 @@ bool LowerScalarShiftLeftAdd(const Decoder::Instruction& decoded, BasicBlock& bl Opcode ScalarMinMaxSccCompareOpcode(Decoder::Opcode opcode) { switch (opcode) { - case Decoder::Opcode::SMinI32: return Opcode::CompareLtI32; - case Decoder::Opcode::SMaxI32: return Opcode::CompareGtI32; - case Decoder::Opcode::SMinU32: return Opcode::CompareLtU32; - case Decoder::Opcode::SMaxU32: return Opcode::CompareGtU32; + case Decoder::Opcode::S_MIN_I32: return Opcode::CompareLtI32; + case Decoder::Opcode::S_MAX_I32: return Opcode::CompareGtI32; + case Decoder::Opcode::S_MIN_U32: return Opcode::CompareLtU32; + case Decoder::Opcode::S_MAX_U32: return Opcode::CompareGtU32; default: return Opcode::CompareFalse; } } bool IsScalarMinMaxOpcode(Decoder::Opcode opcode) { switch (opcode) { - case Decoder::Opcode::SMinI32: - case Decoder::Opcode::SMaxI32: - case Decoder::Opcode::SMinU32: - case Decoder::Opcode::SMaxU32: return true; + case Decoder::Opcode::S_MIN_I32: + case Decoder::Opcode::S_MAX_I32: + case Decoder::Opcode::S_MIN_U32: + case Decoder::Opcode::S_MAX_U32: return true; default: return false; } } @@ -507,7 +507,7 @@ bool ResolveIrOpcode(Decoder::Opcode decoded, Opcode& lowered, std::string* erro if (!opcode.has_value()) { if (error != nullptr) { *error = fmt::format("decoded opcode has no IR lowering: {}", - Decoder::OpcodeToString(decoded)); + magic_enum::enum_name(decoded)); } return false; } @@ -763,17 +763,19 @@ bool LowerVectorCarryOut(const Decoder::Instruction& decoded, BasicBlock& block, Instruction inst; inst.pc = decoded.pc; inst.op = - decoded.opcode == Decoder::Opcode::VAddI32 ? Opcode::IAddCarryU32 : Opcode::ISubBorrowU32; - inst.src_count = decoded.opcode == Decoder::Opcode::VAddI32 ? 3u : 2u; - const auto& src0 = decoded.opcode == Decoder::Opcode::VSubrevI32 ? decoded.src1 : decoded.src0; - const auto& src1 = decoded.opcode == Decoder::Opcode::VSubrevI32 ? decoded.src0 : decoded.src1; + decoded.opcode == Decoder::Opcode::V_ADD_I32 ? Opcode::IAddCarryU32 : Opcode::ISubBorrowU32; + inst.src_count = decoded.opcode == Decoder::Opcode::V_ADD_I32 ? 3u : 2u; + const auto& src0 = + decoded.opcode == Decoder::Opcode::V_SUBREV_I32 ? decoded.src1 : decoded.src0; + const auto& src1 = + decoded.opcode == Decoder::Opcode::V_SUBREV_I32 ? decoded.src0 : decoded.src1; if (!LowerRegisterOperand(decoded.dst, inst.dst, error) || !LowerRegisterOperand(decoded.dst2, inst.dst2, error) || !LowerSourceOperand(src0, inst.src[0], error) || !LowerSourceOperand(src1, inst.src[1], error)) { return false; } - if (decoded.opcode == Decoder::Opcode::VAddI32) { + if (decoded.opcode == Decoder::Opcode::V_ADD_I32) { inst.src[2] = MakeImmediateU32(0); } block.instructions.push_back(inst); @@ -892,7 +894,7 @@ bool LowerVInterpP1F32(const Decoder::Instruction& decoded, BasicBlock& block) { bool LowerVInterpLoadF32(const Decoder::Instruction& decoded, BasicBlock& block, std::string* error) { - if (decoded.opcode == Decoder::Opcode::VInterpMovF32 && decoded.src0.value != 2u) { + if (decoded.opcode == Decoder::Opcode::V_INTERP_MOV_F32 && decoded.src0.value != 2u) { if (error != nullptr) { *error = fmt::format("v_interp_mov_f32 mode {} is not implemented at pc 0x{:08x}", decoded.src0.value, decoded.pc); @@ -989,29 +991,29 @@ bool LowerControlMarker(const Decoder::Instruction& decoded, BasicBlock& block, bool LowerControlInstruction(const Decoder::Instruction& decoded, BasicBlock& block, std::string* error) { switch (decoded.opcode) { - case Decoder::Opcode::SNop: + case Decoder::Opcode::S_NOP: return LowerControlMarker(decoded, block, Opcode::ControlNop, true, error); - case Decoder::Opcode::SWaitcnt: - case Decoder::Opcode::SWaitcntDepctr: + case Decoder::Opcode::S_WAITCNT: + case Decoder::Opcode::S_WAITCNT_DEPCTR: return LowerControlMarker(decoded, block, Opcode::Waitcnt, true, error); - case Decoder::Opcode::SBarrier: + case Decoder::Opcode::S_BARRIER: return LowerControlMarker(decoded, block, Opcode::Barrier, false, error); - case Decoder::Opcode::SSendmsg: + case Decoder::Opcode::S_SENDMSG: return LowerControlMarker(decoded, block, Opcode::Sendmsg, true, error); - case Decoder::Opcode::SSetregB32: - case Decoder::Opcode::SSleep: + case Decoder::Opcode::S_SETREG_B32: + case Decoder::Opcode::S_SLEEP: return LowerControlMarker(decoded, block, Opcode::ControlNop, true, error); - case Decoder::Opcode::STrap: + case Decoder::Opcode::S_TRAP: // RDNA2 converts S_TRAP to a NOP when the unmodeled trap state is disabled. return LowerControlMarker(decoded, block, Opcode::ControlNop, true, error); - case Decoder::Opcode::STtraceData: + case Decoder::Opcode::S_TTRACEDATA: return LowerControlMarker(decoded, block, Opcode::TtraceData, true, error); - case Decoder::Opcode::SInstPrefetch: + case Decoder::Opcode::S_INST_PREFETCH: return LowerControlMarker(decoded, block, Opcode::InstPrefetch, true, error); default: if (error != nullptr) { *error = fmt::format("control opcode has no specialized IR lowering: {}", - Decoder::OpcodeToString(decoded.opcode)); + magic_enum::enum_name(decoded.opcode)); } return false; } @@ -1036,20 +1038,20 @@ bool LowerScalarGetpcB64(const Decoder::Instruction& decoded, BasicBlock& block, bool IsScalarSaveexecOpcode(Decoder::Opcode opcode) { switch (opcode) { - case Decoder::Opcode::SAndSaveexecB32: - case Decoder::Opcode::SAndn1SaveexecB32: - case Decoder::Opcode::SAndSaveexecB64: - case Decoder::Opcode::SOrn2SaveexecB64: - case Decoder::Opcode::SAndn1SaveexecB64: return true; + case Decoder::Opcode::S_AND_SAVEEXEC_B32: + case Decoder::Opcode::S_ANDN1_SAVEEXEC_B32: + case Decoder::Opcode::S_AND_SAVEEXEC_B64: + case Decoder::Opcode::S_ORN2_SAVEEXEC_B64: + case Decoder::Opcode::S_ANDN1_SAVEEXEC_B64: return true; default: return false; } } SaveexecMode ScalarSaveexecMode(Decoder::Opcode opcode) { switch (opcode) { - case Decoder::Opcode::SOrn2SaveexecB64: return SaveexecMode::Orn2; - case Decoder::Opcode::SAndn1SaveexecB32: - case Decoder::Opcode::SAndn1SaveexecB64: return SaveexecMode::Andn1; + case Decoder::Opcode::S_ORN2_SAVEEXEC_B64: return SaveexecMode::Orn2; + case Decoder::Opcode::S_ANDN1_SAVEEXEC_B32: + case Decoder::Opcode::S_ANDN1_SAVEEXEC_B64: return SaveexecMode::Andn1; default: return SaveexecMode::And; } } @@ -1058,8 +1060,8 @@ bool LowerScalarSaveexec(const Decoder::Instruction& decoded, BasicBlock& block, std::string* error) { Instruction inst; inst.pc = decoded.pc; - inst.op = (decoded.opcode == Decoder::Opcode::SAndSaveexecB32 || - decoded.opcode == Decoder::Opcode::SAndn1SaveexecB32) + inst.op = (decoded.opcode == Decoder::Opcode::S_AND_SAVEEXEC_B32 || + decoded.opcode == Decoder::Opcode::S_ANDN1_SAVEEXEC_B32) ? Opcode::SaveexecB32 : Opcode::SaveexecB64; inst.saveexec_mode = ScalarSaveexecMode(decoded.opcode); @@ -1074,31 +1076,31 @@ bool LowerScalarSaveexec(const Decoder::Instruction& decoded, BasicBlock& block, bool IsControlOpcode(Decoder::Opcode opcode) { switch (opcode) { - case Decoder::Opcode::SNop: - case Decoder::Opcode::SWaitcnt: - case Decoder::Opcode::SWaitcntDepctr: - case Decoder::Opcode::SBarrier: - case Decoder::Opcode::SSendmsg: - case Decoder::Opcode::SSetregB32: - case Decoder::Opcode::SSleep: - case Decoder::Opcode::STrap: - case Decoder::Opcode::STtraceData: - case Decoder::Opcode::SInstPrefetch: return true; + case Decoder::Opcode::S_NOP: + case Decoder::Opcode::S_WAITCNT: + case Decoder::Opcode::S_WAITCNT_DEPCTR: + case Decoder::Opcode::S_BARRIER: + case Decoder::Opcode::S_SENDMSG: + case Decoder::Opcode::S_SETREG_B32: + case Decoder::Opcode::S_SLEEP: + case Decoder::Opcode::S_TRAP: + case Decoder::Opcode::S_TTRACEDATA: + case Decoder::Opcode::S_INST_PREFETCH: return true; default: return false; } } bool IsTerminatorOpcode(Decoder::Opcode opcode) { switch (opcode) { - case Decoder::Opcode::SEndpgm: - case Decoder::Opcode::SBranch: - case Decoder::Opcode::SCbranchScc0: - case Decoder::Opcode::SCbranchScc1: - case Decoder::Opcode::SCbranchVccz: - case Decoder::Opcode::SCbranchVccnz: - case Decoder::Opcode::SCbranchExecz: - case Decoder::Opcode::SCbranchExecnz: - case Decoder::Opcode::SSetpcB64: return true; + case Decoder::Opcode::S_ENDPGM: + case Decoder::Opcode::S_BRANCH: + case Decoder::Opcode::S_CBRANCH_SCC0: + case Decoder::Opcode::S_CBRANCH_SCC1: + case Decoder::Opcode::S_CBRANCH_VCCZ: + case Decoder::Opcode::S_CBRANCH_VCCNZ: + case Decoder::Opcode::S_CBRANCH_EXECZ: + case Decoder::Opcode::S_CBRANCH_EXECNZ: + case Decoder::Opcode::S_SETPC_B64: return true; default: return false; } } @@ -1120,43 +1122,44 @@ bool IsMemoryFamily(Decoder::Family family) { bool LowerDecodedInstruction(const Decoder::Instruction& inst, BasicBlock& block, std::string* error) { switch (inst.opcode) { - case Decoder::Opcode::Unsupported: + case Decoder::Opcode::UNSUPPORTED: if (error != nullptr) { *error = fmt::format("unsupported decoded instruction: {}", Decoder::InstructionToString(inst).c_str()); } return false; - case Decoder::Opcode::SGetpcB64: return LowerScalarGetpcB64(inst, block, error); - case Decoder::Opcode::VNop: return true; - case Decoder::Opcode::Exp: return LowerExportInstruction(inst, block, error); - case Decoder::Opcode::SCselectB32: return LowerScalarSelect(inst, block, error); - case Decoder::Opcode::SCselectB64: return LowerScalarSelect64(inst, block, error); - case Decoder::Opcode::SAddU32: return LowerScalarAddCarry(inst, block, false, error); - case Decoder::Opcode::SAddcU32: return LowerScalarAddCarry(inst, block, true, error); - case Decoder::Opcode::SSubbU32: return LowerScalarSubBorrowCarry(inst, block, error); - case Decoder::Opcode::SSubU32: + case Decoder::Opcode::S_GETPC_B64: return LowerScalarGetpcB64(inst, block, error); + case Decoder::Opcode::V_NOP: return true; + case Decoder::Opcode::EXP: return LowerExportInstruction(inst, block, error); + case Decoder::Opcode::S_CSELECT_B32: return LowerScalarSelect(inst, block, error); + case Decoder::Opcode::S_CSELECT_B64: return LowerScalarSelect64(inst, block, error); + case Decoder::Opcode::S_ADD_U32: return LowerScalarAddCarry(inst, block, false, error); + case Decoder::Opcode::S_ADDC_U32: return LowerScalarAddCarry(inst, block, true, error); + case Decoder::Opcode::S_SUBB_U32: return LowerScalarSubBorrowCarry(inst, block, error); + case Decoder::Opcode::S_SUB_U32: return LowerScalarBinaryScc(inst, block, Opcode::ScalarSubBorrowU32, error); - case Decoder::Opcode::SBitset0B32: return LowerScalarBitset0B32(inst, block, error); - case Decoder::Opcode::SBitset1B32: return LowerScalarBitset1B32(inst, block, error); - case Decoder::Opcode::SAddI32: + case Decoder::Opcode::S_BITSET0_B32: return LowerScalarBitset0B32(inst, block, error); + case Decoder::Opcode::S_BITSET1_B32: return LowerScalarBitset1B32(inst, block, error); + case Decoder::Opcode::S_ADD_I32: return LowerScalarBinaryScc(inst, block, Opcode::ScalarSignedAddOverflowI32, error); - case Decoder::Opcode::SSubI32: + case Decoder::Opcode::S_SUB_I32: return LowerScalarBinaryScc(inst, block, Opcode::ScalarSignedSubOverflowI32, error); - case Decoder::Opcode::VCndmaskB32: return LowerVectorCndmask(inst, block, error); - case Decoder::Opcode::VMovB32: return LowerVectorMoveB32(inst, block, error); - case Decoder::Opcode::VMovreldB32: return LowerVectorMoveRelDestination(inst, block, error); - case Decoder::Opcode::VMovrelsB32: return LowerVectorMoveRelSource(inst, block, error); - case Decoder::Opcode::VAddcU32: return LowerVectorAddCarry(inst, block, error); - case Decoder::Opcode::VSubrevCoCiU32: + case Decoder::Opcode::V_CNDMASK_B32: return LowerVectorCndmask(inst, block, error); + case Decoder::Opcode::V_MOV_B32: return LowerVectorMoveB32(inst, block, error); + case Decoder::Opcode::V_MOVRELD_B32: + return LowerVectorMoveRelDestination(inst, block, error); + case Decoder::Opcode::V_MOVRELS_B32: return LowerVectorMoveRelSource(inst, block, error); + case Decoder::Opcode::V_ADDC_U32: return LowerVectorAddCarry(inst, block, error); + case Decoder::Opcode::V_SUBREV_CO_CI_U32: return LowerVectorSubrevBorrowCarry(inst, block, error); - case Decoder::Opcode::VMadU64U32: return LowerVectorMadU64U32(inst, block, error); - case Decoder::Opcode::VMacF32: return LowerVectorMacF32(inst, block, error); - case Decoder::Opcode::VPkFmacF16: return LowerVectorPkFmacF16(inst, block, error); - case Decoder::Opcode::VFmacF16: return LowerVectorFmacF16(inst, block, error); - case Decoder::Opcode::VDot2cF32F16: return LowerVectorDot2cF32F16(inst, block, error); - case Decoder::Opcode::VInterpP1F32: return LowerVInterpP1F32(inst, block); - case Decoder::Opcode::VInterpP2F32: - case Decoder::Opcode::VInterpMovF32: return LowerVInterpLoadF32(inst, block, error); + case Decoder::Opcode::V_MAD_U64_U32: return LowerVectorMadU64U32(inst, block, error); + case Decoder::Opcode::V_MAC_F32: return LowerVectorMacF32(inst, block, error); + case Decoder::Opcode::V_PK_FMAC_F16: return LowerVectorPkFmacF16(inst, block, error); + case Decoder::Opcode::V_FMAC_F16: return LowerVectorFmacF16(inst, block, error); + case Decoder::Opcode::V_DOT2C_F32_F16: return LowerVectorDot2cF32F16(inst, block, error); + case Decoder::Opcode::V_INTERP_P1_F32: return LowerVInterpP1F32(inst, block); + case Decoder::Opcode::V_INTERP_P2_F32: + case Decoder::Opcode::V_INTERP_MOV_F32: return LowerVInterpLoadF32(inst, block, error); default: break; } @@ -1177,7 +1180,7 @@ bool LowerDecodedInstruction(const Decoder::Instruction& inst, BasicBlock& block if (IsMemoryFamily(inst.family)) { if (error != nullptr) { *error = fmt::format("decoded memory-family opcode has no specialized IR lowering: {}", - Decoder::OpcodeToString(inst.opcode)); + magic_enum::enum_name(inst.opcode)); } return false; } diff --git a/src/graphics/shader/recompiler/ir/ShaderIRMemory.cpp b/src/graphics/shader/recompiler/ir/ShaderIRMemory.cpp index 5ac06ed70..6fc445f52 100644 --- a/src/graphics/shader/recompiler/ir/ShaderIRMemory.cpp +++ b/src/graphics/shader/recompiler/ir/ShaderIRMemory.cpp @@ -60,17 +60,17 @@ Opcode DsWriteOpcode(uint32_t data_bits) { Opcode LoweredImageOpcode(Decoder::Opcode opcode) { switch (opcode) { - case Decoder::Opcode::ImageGetResinfo: return Opcode::ImageGetResinfo; - case Decoder::Opcode::ImageGetLod: return Opcode::ImageGetLod; - case Decoder::Opcode::ImageLoad: - case Decoder::Opcode::ImageLoadMip: return Opcode::ImageLoad; - case Decoder::Opcode::ImageGather4Lz: - case Decoder::Opcode::ImageGather4C: - case Decoder::Opcode::ImageGather4CLz: - case Decoder::Opcode::ImageGather4LzO: - case Decoder::Opcode::ImageGather4CO: - case Decoder::Opcode::ImageGather4CLzO: - case Decoder::Opcode::ImageGather4H: return Opcode::ImageGather4; + case Decoder::Opcode::IMAGE_GET_RESINFO: return Opcode::ImageGetResinfo; + case Decoder::Opcode::IMAGE_GET_LOD: return Opcode::ImageGetLod; + case Decoder::Opcode::IMAGE_LOAD: + case Decoder::Opcode::IMAGE_LOAD_MIP: return Opcode::ImageLoad; + case Decoder::Opcode::IMAGE_GATHER4_LZ: + case Decoder::Opcode::IMAGE_GATHER4_C: + case Decoder::Opcode::IMAGE_GATHER4_C_LZ: + case Decoder::Opcode::IMAGE_GATHER4_LZ_O: + case Decoder::Opcode::IMAGE_GATHER4_C_O: + case Decoder::Opcode::IMAGE_GATHER4_C_LZ_O: + case Decoder::Opcode::IMAGE_GATHER4H: return Opcode::ImageGather4; default: return Opcode::ImageSample; } } @@ -334,12 +334,12 @@ bool LowerDsAppendConsume(const Decoder::Instruction& decoded, BasicBlock& block Opcode ImageAtomicIrOpcode(Decoder::Opcode opcode) { switch (opcode) { - case Decoder::Opcode::ImageAtomicAdd: return Opcode::AtomicAddU32; - case Decoder::Opcode::ImageAtomicUMin: return Opcode::AtomicUMinU32; - case Decoder::Opcode::ImageAtomicUMax: return Opcode::AtomicUMaxU32; - case Decoder::Opcode::ImageAtomicAnd: return Opcode::AtomicAndU32; - case Decoder::Opcode::ImageAtomicOr: return Opcode::AtomicOrU32; - case Decoder::Opcode::ImageAtomicXor: return Opcode::AtomicXorU32; + case Decoder::Opcode::IMAGE_ATOMIC_ADD: return Opcode::AtomicAddU32; + case Decoder::Opcode::IMAGE_ATOMIC_UMIN: return Opcode::AtomicUMinU32; + case Decoder::Opcode::IMAGE_ATOMIC_UMAX: return Opcode::AtomicUMaxU32; + case Decoder::Opcode::IMAGE_ATOMIC_AND: return Opcode::AtomicAndU32; + case Decoder::Opcode::IMAGE_ATOMIC_OR: return Opcode::AtomicOrU32; + case Decoder::Opcode::IMAGE_ATOMIC_XOR: return Opcode::AtomicXorU32; default: return Opcode::AtomicAddU32; } } @@ -477,8 +477,8 @@ bool LowerImageOperation(const Decoder::Instruction& decoded, BasicBlock& block, std::string* error) { Instruction inst; inst.pc = decoded.pc; - if (decoded.opcode == Decoder::Opcode::ImageStore || - decoded.opcode == Decoder::Opcode::ImageStoreMip) { + if (decoded.opcode == Decoder::Opcode::IMAGE_STORE || + decoded.opcode == Decoder::Opcode::IMAGE_STORE_MIP) { inst.op = Opcode::ImageStore; inst.src_count = 2; inst.memory = MemoryInfoFromDecoded(decoded, ResourceKind::StorageImage); @@ -508,181 +508,184 @@ bool LowerImageOperation(const Decoder::Instruction& decoded, BasicBlock& block, bool LowerMemoryInstruction(const Decoder::Instruction& decoded, BasicBlock& block, std::string* error) { switch (decoded.opcode) { - case Decoder::Opcode::SLoadDword: - case Decoder::Opcode::SLoadDwordx2: - case Decoder::Opcode::SLoadDwordx4: - case Decoder::Opcode::SLoadDwordx8: - case Decoder::Opcode::SLoadDwordx16: + case Decoder::Opcode::S_LOAD_DWORD: + case Decoder::Opcode::S_LOAD_DWORDX2: + case Decoder::Opcode::S_LOAD_DWORDX4: + case Decoder::Opcode::S_LOAD_DWORDX8: + case Decoder::Opcode::S_LOAD_DWORDX16: return LowerScalarMemoryLoadDword(decoded, block, Opcode::SLoadDword, error); - case Decoder::Opcode::SBufferLoadDword: - case Decoder::Opcode::SBufferLoadDwordx2: - case Decoder::Opcode::SBufferLoadDwordx4: - case Decoder::Opcode::SBufferLoadDwordx8: - case Decoder::Opcode::SBufferLoadDwordx16: + case Decoder::Opcode::S_BUFFER_LOAD_DWORD: + case Decoder::Opcode::S_BUFFER_LOAD_DWORDX2: + case Decoder::Opcode::S_BUFFER_LOAD_DWORDX4: + case Decoder::Opcode::S_BUFFER_LOAD_DWORDX8: + case Decoder::Opcode::S_BUFFER_LOAD_DWORDX16: return LowerScalarMemoryLoadDword(decoded, block, Opcode::SBufferLoadDword, error); - case Decoder::Opcode::BufferLoadUbyte: - case Decoder::Opcode::BufferLoadSbyte: - case Decoder::Opcode::BufferLoadUshort: - case Decoder::Opcode::BufferLoadSshort: - case Decoder::Opcode::BufferLoadDword: - case Decoder::Opcode::BufferLoadDwordx2: - case Decoder::Opcode::BufferLoadDwordx3: - case Decoder::Opcode::BufferLoadDwordx4: - case Decoder::Opcode::BufferLoadFormatX: - case Decoder::Opcode::BufferLoadFormatXy: - case Decoder::Opcode::BufferLoadFormatXyz: - case Decoder::Opcode::BufferLoadFormatXyzw: - case Decoder::Opcode::TBufferLoadFormatX: - case Decoder::Opcode::TBufferLoadFormatXy: - case Decoder::Opcode::TBufferLoadFormatXyz: - case Decoder::Opcode::TBufferLoadFormatXyzw: return LowerBufferLoad(decoded, block, error); - case Decoder::Opcode::BufferStoreDword: - case Decoder::Opcode::BufferStoreDwordx2: - case Decoder::Opcode::BufferStoreDwordx3: - case Decoder::Opcode::BufferStoreDwordx4: - case Decoder::Opcode::BufferStoreByte: - case Decoder::Opcode::BufferStoreShort: - case Decoder::Opcode::BufferStoreFormatX: - case Decoder::Opcode::BufferStoreFormatXy: - case Decoder::Opcode::BufferStoreFormatXyz: - case Decoder::Opcode::BufferStoreFormatXyzw: - case Decoder::Opcode::TBufferStoreFormatX: - case Decoder::Opcode::TBufferStoreFormatXy: - case Decoder::Opcode::TBufferStoreFormatXyz: - case Decoder::Opcode::TBufferStoreFormatXyzw: + case Decoder::Opcode::BUFFER_LOAD_UBYTE: + case Decoder::Opcode::BUFFER_LOAD_SBYTE: + case Decoder::Opcode::BUFFER_LOAD_USHORT: + case Decoder::Opcode::BUFFER_LOAD_SSHORT: + case Decoder::Opcode::BUFFER_LOAD_DWORD: + case Decoder::Opcode::BUFFER_LOAD_DWORDX2: + case Decoder::Opcode::BUFFER_LOAD_DWORDX3: + case Decoder::Opcode::BUFFER_LOAD_DWORDX4: + case Decoder::Opcode::BUFFER_LOAD_FORMAT_X: + case Decoder::Opcode::BUFFER_LOAD_FORMAT_XY: + case Decoder::Opcode::BUFFER_LOAD_FORMAT_XYZ: + case Decoder::Opcode::BUFFER_LOAD_FORMAT_XYZW: + case Decoder::Opcode::TBUFFER_LOAD_FORMAT_X: + case Decoder::Opcode::TBUFFER_LOAD_FORMAT_XY: + case Decoder::Opcode::TBUFFER_LOAD_FORMAT_XYZ: + case Decoder::Opcode::TBUFFER_LOAD_FORMAT_XYZW: + return LowerBufferLoad(decoded, block, error); + case Decoder::Opcode::BUFFER_STORE_DWORD: + case Decoder::Opcode::BUFFER_STORE_DWORDX2: + case Decoder::Opcode::BUFFER_STORE_DWORDX3: + case Decoder::Opcode::BUFFER_STORE_DWORDX4: + case Decoder::Opcode::BUFFER_STORE_BYTE: + case Decoder::Opcode::BUFFER_STORE_SHORT: + case Decoder::Opcode::BUFFER_STORE_FORMAT_X: + case Decoder::Opcode::BUFFER_STORE_FORMAT_XY: + case Decoder::Opcode::BUFFER_STORE_FORMAT_XYZ: + case Decoder::Opcode::BUFFER_STORE_FORMAT_XYZW: + case Decoder::Opcode::TBUFFER_STORE_FORMAT_X: + case Decoder::Opcode::TBUFFER_STORE_FORMAT_XY: + case Decoder::Opcode::TBUFFER_STORE_FORMAT_XYZ: + case Decoder::Opcode::TBUFFER_STORE_FORMAT_XYZW: return LowerBufferStore(decoded, block, error); - case Decoder::Opcode::BufferAtomicSwap: + case Decoder::Opcode::BUFFER_ATOMIC_SWAP: return LowerBufferAtomicDword(decoded, block, Opcode::AtomicSwapU32, error); - case Decoder::Opcode::BufferAtomicAdd: + case Decoder::Opcode::BUFFER_ATOMIC_ADD: return LowerBufferAtomicDword(decoded, block, Opcode::AtomicAddU32, error); - case Decoder::Opcode::BufferAtomicSub: + case Decoder::Opcode::BUFFER_ATOMIC_SUB: return LowerBufferAtomicDword(decoded, block, Opcode::AtomicSubU32, error); - case Decoder::Opcode::BufferAtomicSMin: + case Decoder::Opcode::BUFFER_ATOMIC_SMIN: return LowerBufferAtomicDword(decoded, block, Opcode::AtomicSMinI32, error); - case Decoder::Opcode::BufferAtomicUMin: + case Decoder::Opcode::BUFFER_ATOMIC_UMIN: return LowerBufferAtomicDword(decoded, block, Opcode::AtomicUMinU32, error); - case Decoder::Opcode::BufferAtomicSMax: + case Decoder::Opcode::BUFFER_ATOMIC_SMAX: return LowerBufferAtomicDword(decoded, block, Opcode::AtomicSMaxI32, error); - case Decoder::Opcode::BufferAtomicUMax: + case Decoder::Opcode::BUFFER_ATOMIC_UMAX: return LowerBufferAtomicDword(decoded, block, Opcode::AtomicUMaxU32, error); - case Decoder::Opcode::BufferAtomicAnd: + case Decoder::Opcode::BUFFER_ATOMIC_AND: return LowerBufferAtomicDword(decoded, block, Opcode::AtomicAndU32, error); - case Decoder::Opcode::BufferAtomicOr: + case Decoder::Opcode::BUFFER_ATOMIC_OR: return LowerBufferAtomicDword(decoded, block, Opcode::AtomicOrU32, error); - case Decoder::Opcode::BufferAtomicXor: + case Decoder::Opcode::BUFFER_ATOMIC_XOR: return LowerBufferAtomicDword(decoded, block, Opcode::AtomicXorU32, error); - case Decoder::Opcode::BufferAtomicFMin: + case Decoder::Opcode::BUFFER_ATOMIC_FMIN: return LowerBufferAtomicDword(decoded, block, Opcode::AtomicFMinF32, error); - case Decoder::Opcode::BufferAtomicFMax: + case Decoder::Opcode::BUFFER_ATOMIC_FMAX: return LowerBufferAtomicDword(decoded, block, Opcode::AtomicFMaxF32, error); - case Decoder::Opcode::FlatLoadUbyte: - case Decoder::Opcode::FlatLoadSbyte: - case Decoder::Opcode::FlatLoadUshort: - case Decoder::Opcode::FlatLoadSshort: - case Decoder::Opcode::FlatLoadDword: - case Decoder::Opcode::FlatLoadDwordx2: - case Decoder::Opcode::FlatLoadDwordx3: - case Decoder::Opcode::FlatLoadDwordx4: return LowerFlatLoad(decoded, block, error); - case Decoder::Opcode::FlatStoreByte: - case Decoder::Opcode::FlatStoreShort: - case Decoder::Opcode::FlatStoreDword: - case Decoder::Opcode::FlatStoreDwordx2: - case Decoder::Opcode::FlatStoreDwordx3: - case Decoder::Opcode::FlatStoreDwordx4: return LowerFlatStore(decoded, block, error); - case Decoder::Opcode::DsAddU32: + case Decoder::Opcode::FLAT_LOAD_UBYTE: + case Decoder::Opcode::FLAT_LOAD_SBYTE: + case Decoder::Opcode::FLAT_LOAD_USHORT: + case Decoder::Opcode::FLAT_LOAD_SSHORT: + case Decoder::Opcode::FLAT_LOAD_DWORD: + case Decoder::Opcode::FLAT_LOAD_DWORDX2: + case Decoder::Opcode::FLAT_LOAD_DWORDX3: + case Decoder::Opcode::FLAT_LOAD_DWORDX4: return LowerFlatLoad(decoded, block, error); + case Decoder::Opcode::FLAT_STORE_BYTE: + case Decoder::Opcode::FLAT_STORE_SHORT: + case Decoder::Opcode::FLAT_STORE_DWORD: + case Decoder::Opcode::FLAT_STORE_DWORDX2: + case Decoder::Opcode::FLAT_STORE_DWORDX3: + case Decoder::Opcode::FLAT_STORE_DWORDX4: return LowerFlatStore(decoded, block, error); + case Decoder::Opcode::DS_ADD_U32: return LowerDsAtomicU32(decoded, block, Opcode::AtomicAddU32, false, error); - case Decoder::Opcode::DsAddRtnU32: + case Decoder::Opcode::DS_ADD_RTN_U32: return LowerDsAtomicU32(decoded, block, Opcode::AtomicAddU32, true, error); - case Decoder::Opcode::DsSubU32: + case Decoder::Opcode::DS_SUB_U32: return LowerDsAtomicU32(decoded, block, Opcode::AtomicSubU32, false, error); - case Decoder::Opcode::DsSubRtnU32: + case Decoder::Opcode::DS_SUB_RTN_U32: return LowerDsAtomicU32(decoded, block, Opcode::AtomicSubU32, true, error); - case Decoder::Opcode::DsMinI32: + case Decoder::Opcode::DS_MIN_I32: return LowerDsAtomicU32(decoded, block, Opcode::AtomicSMinI32, false, error); - case Decoder::Opcode::DsMinRtnI32: + case Decoder::Opcode::DS_MIN_RTN_I32: return LowerDsAtomicU32(decoded, block, Opcode::AtomicSMinI32, true, error); - case Decoder::Opcode::DsMaxI32: + case Decoder::Opcode::DS_MAX_I32: return LowerDsAtomicU32(decoded, block, Opcode::AtomicSMaxI32, false, error); - case Decoder::Opcode::DsMaxRtnI32: + case Decoder::Opcode::DS_MAX_RTN_I32: return LowerDsAtomicU32(decoded, block, Opcode::AtomicSMaxI32, true, error); - case Decoder::Opcode::DsMinU32: + case Decoder::Opcode::DS_MIN_U32: return LowerDsAtomicU32(decoded, block, Opcode::AtomicUMinU32, false, error); - case Decoder::Opcode::DsMinRtnU32: + case Decoder::Opcode::DS_MIN_RTN_U32: return LowerDsAtomicU32(decoded, block, Opcode::AtomicUMinU32, true, error); - case Decoder::Opcode::DsMaxU32: + case Decoder::Opcode::DS_MAX_U32: return LowerDsAtomicU32(decoded, block, Opcode::AtomicUMaxU32, false, error); - case Decoder::Opcode::DsMaxRtnU32: + case Decoder::Opcode::DS_MAX_RTN_U32: return LowerDsAtomicU32(decoded, block, Opcode::AtomicUMaxU32, true, error); - case Decoder::Opcode::DsAndB32: + case Decoder::Opcode::DS_AND_B32: return LowerDsAtomicU32(decoded, block, Opcode::AtomicAndU32, false, error); - case Decoder::Opcode::DsAndRtnB32: + case Decoder::Opcode::DS_AND_RTN_B32: return LowerDsAtomicU32(decoded, block, Opcode::AtomicAndU32, true, error); - case Decoder::Opcode::DsOrB32: + case Decoder::Opcode::DS_OR_B32: return LowerDsAtomicU32(decoded, block, Opcode::AtomicOrU32, false, error); - case Decoder::Opcode::DsOrRtnB32: + case Decoder::Opcode::DS_OR_RTN_B32: return LowerDsAtomicU32(decoded, block, Opcode::AtomicOrU32, true, error); - case Decoder::Opcode::DsXorB32: + case Decoder::Opcode::DS_XOR_B32: return LowerDsAtomicU32(decoded, block, Opcode::AtomicXorU32, false, error); - case Decoder::Opcode::DsXorRtnB32: + case Decoder::Opcode::DS_XOR_RTN_B32: return LowerDsAtomicU32(decoded, block, Opcode::AtomicXorU32, true, error); - case Decoder::Opcode::DsWrxchgRtnB32: + case Decoder::Opcode::DS_WRXCHG_RTN_B32: return LowerDsAtomicU32(decoded, block, Opcode::AtomicSwapU32, true, error); - case Decoder::Opcode::DsMinF32: + case Decoder::Opcode::DS_MIN_F32: return LowerDsFloatMinMaxF32(decoded, block, Opcode::DsMinF32, error); - case Decoder::Opcode::DsMaxF32: + case Decoder::Opcode::DS_MAX_F32: return LowerDsFloatMinMaxF32(decoded, block, Opcode::DsMaxF32, error); - case Decoder::Opcode::DsSwizzleB32: return LowerDsSwizzleB32(decoded, block, error); - case Decoder::Opcode::DsConsume: + case Decoder::Opcode::DS_SWIZZLE_B32: return LowerDsSwizzleB32(decoded, block, error); + case Decoder::Opcode::DS_CONSUME: return LowerDsAppendConsume(decoded, block, Opcode::DsConsume, error); - case Decoder::Opcode::DsAppend: + case Decoder::Opcode::DS_APPEND: return LowerDsAppendConsume(decoded, block, Opcode::DsAppend, error); - case Decoder::Opcode::DsWriteAddtidB32: return LowerDsWriteAddtidB32(decoded, block, error); - case Decoder::Opcode::DsReadAddtidB32: return LowerDsReadAddtidB32(decoded, block, error); - case Decoder::Opcode::DsRead2B32: return LowerDsRead2(decoded, block, 1, error); - case Decoder::Opcode::DsRead2B64: - case Decoder::Opcode::DsRead2St64B64: return LowerDsRead2(decoded, block, 2, error); - case Decoder::Opcode::DsReadSbyte: - case Decoder::Opcode::DsReadUbyte: - case Decoder::Opcode::DsReadSshort: - case Decoder::Opcode::DsReadUshort: - case Decoder::Opcode::DsReadB32: - case Decoder::Opcode::DsReadB64: - case Decoder::Opcode::DsReadB96: - case Decoder::Opcode::DsReadB128: return LowerDsRead(decoded, block, error); - case Decoder::Opcode::DsWrite2B32: - case Decoder::Opcode::DsWrite2St64B32: return LowerDsWrite2(decoded, block, 1, error); - case Decoder::Opcode::DsWrite2B64: - case Decoder::Opcode::DsWrite2St64B64: return LowerDsWrite2(decoded, block, 2, error); - case Decoder::Opcode::DsWriteByte: - case Decoder::Opcode::DsWriteShort: - case Decoder::Opcode::DsWriteB32: - case Decoder::Opcode::DsWriteB64: - case Decoder::Opcode::DsWriteB96: - case Decoder::Opcode::DsWriteB128: return LowerDsWrite(decoded, block, error); - case Decoder::Opcode::ImageGetResinfo: - case Decoder::Opcode::ImageGetLod: - case Decoder::Opcode::ImageLoad: - case Decoder::Opcode::ImageLoadMip: - case Decoder::Opcode::ImageStore: - case Decoder::Opcode::ImageStoreMip: - case Decoder::Opcode::ImageGather4Lz: - case Decoder::Opcode::ImageGather4C: - case Decoder::Opcode::ImageGather4CLz: - case Decoder::Opcode::ImageGather4LzO: - case Decoder::Opcode::ImageGather4CO: - case Decoder::Opcode::ImageGather4CLzO: - case Decoder::Opcode::ImageGather4H: - case Decoder::Opcode::ImageSample: return LowerImageOperation(decoded, block, error); - case Decoder::Opcode::ImageAtomicAdd: - case Decoder::Opcode::ImageAtomicUMin: - case Decoder::Opcode::ImageAtomicUMax: - case Decoder::Opcode::ImageAtomicAnd: - case Decoder::Opcode::ImageAtomicOr: - case Decoder::Opcode::ImageAtomicXor: return LowerImageAtomicU32(decoded, block, error); + case Decoder::Opcode::DS_WRITE_ADDTID_B32: + return LowerDsWriteAddtidB32(decoded, block, error); + case Decoder::Opcode::DS_READ_ADDTID_B32: + return LowerDsReadAddtidB32(decoded, block, error); + case Decoder::Opcode::DS_READ2_B32: return LowerDsRead2(decoded, block, 1, error); + case Decoder::Opcode::DS_READ2_B64: + case Decoder::Opcode::DS_READ2ST64_B64: return LowerDsRead2(decoded, block, 2, error); + case Decoder::Opcode::DS_READ_I8: + case Decoder::Opcode::DS_READ_U8: + case Decoder::Opcode::DS_READ_I16: + case Decoder::Opcode::DS_READ_U16: + case Decoder::Opcode::DS_READ_B32: + case Decoder::Opcode::DS_READ_B64: + case Decoder::Opcode::DS_READ_B96: + case Decoder::Opcode::DS_READ_B128: return LowerDsRead(decoded, block, error); + case Decoder::Opcode::DS_WRITE2_B32: + case Decoder::Opcode::DS_WRITE2ST64_B32: return LowerDsWrite2(decoded, block, 1, error); + case Decoder::Opcode::DS_WRITE2_B64: + case Decoder::Opcode::DS_WRITE2ST64_B64: return LowerDsWrite2(decoded, block, 2, error); + case Decoder::Opcode::DS_WRITE_B8: + case Decoder::Opcode::DS_WRITE_B16: + case Decoder::Opcode::DS_WRITE_B32: + case Decoder::Opcode::DS_WRITE_B64: + case Decoder::Opcode::DS_WRITE_B96: + case Decoder::Opcode::DS_WRITE_B128: return LowerDsWrite(decoded, block, error); + case Decoder::Opcode::IMAGE_GET_RESINFO: + case Decoder::Opcode::IMAGE_GET_LOD: + case Decoder::Opcode::IMAGE_LOAD: + case Decoder::Opcode::IMAGE_LOAD_MIP: + case Decoder::Opcode::IMAGE_STORE: + case Decoder::Opcode::IMAGE_STORE_MIP: + case Decoder::Opcode::IMAGE_GATHER4_LZ: + case Decoder::Opcode::IMAGE_GATHER4_C: + case Decoder::Opcode::IMAGE_GATHER4_C_LZ: + case Decoder::Opcode::IMAGE_GATHER4_LZ_O: + case Decoder::Opcode::IMAGE_GATHER4_C_O: + case Decoder::Opcode::IMAGE_GATHER4_C_LZ_O: + case Decoder::Opcode::IMAGE_GATHER4H: + case Decoder::Opcode::IMAGE_SAMPLE: return LowerImageOperation(decoded, block, error); + case Decoder::Opcode::IMAGE_ATOMIC_ADD: + case Decoder::Opcode::IMAGE_ATOMIC_UMIN: + case Decoder::Opcode::IMAGE_ATOMIC_UMAX: + case Decoder::Opcode::IMAGE_ATOMIC_AND: + case Decoder::Opcode::IMAGE_ATOMIC_OR: + case Decoder::Opcode::IMAGE_ATOMIC_XOR: return LowerImageAtomicU32(decoded, block, error); default: if (error != nullptr) { *error = fmt::format("memory opcode has no specialized IR lowering: {}", - Decoder::OpcodeToString(decoded.opcode)); + magic_enum::enum_name(decoded.opcode)); } return false; } @@ -690,139 +693,139 @@ bool LowerMemoryInstruction(const Decoder::Instruction& decoded, BasicBlock& blo bool IsMemoryOpcode(Decoder::Opcode opcode) { switch (opcode) { - case Decoder::Opcode::SLoadDword: - case Decoder::Opcode::SLoadDwordx2: - case Decoder::Opcode::SLoadDwordx4: - case Decoder::Opcode::SLoadDwordx8: - case Decoder::Opcode::SLoadDwordx16: - case Decoder::Opcode::SBufferLoadDword: - case Decoder::Opcode::SBufferLoadDwordx2: - case Decoder::Opcode::SBufferLoadDwordx4: - case Decoder::Opcode::SBufferLoadDwordx8: - case Decoder::Opcode::SBufferLoadDwordx16: - case Decoder::Opcode::BufferLoadUbyte: - case Decoder::Opcode::BufferLoadSbyte: - case Decoder::Opcode::BufferLoadUshort: - case Decoder::Opcode::BufferLoadSshort: - case Decoder::Opcode::BufferLoadDword: - case Decoder::Opcode::BufferLoadDwordx2: - case Decoder::Opcode::BufferLoadDwordx3: - case Decoder::Opcode::BufferLoadDwordx4: - case Decoder::Opcode::BufferLoadFormatX: - case Decoder::Opcode::BufferLoadFormatXy: - case Decoder::Opcode::BufferLoadFormatXyz: - case Decoder::Opcode::BufferLoadFormatXyzw: - case Decoder::Opcode::TBufferLoadFormatX: - case Decoder::Opcode::TBufferLoadFormatXy: - case Decoder::Opcode::TBufferLoadFormatXyz: - case Decoder::Opcode::TBufferLoadFormatXyzw: - case Decoder::Opcode::BufferStoreDword: - case Decoder::Opcode::BufferStoreDwordx2: - case Decoder::Opcode::BufferStoreDwordx3: - case Decoder::Opcode::BufferStoreDwordx4: - case Decoder::Opcode::BufferStoreByte: - case Decoder::Opcode::BufferStoreShort: - case Decoder::Opcode::BufferStoreFormatX: - case Decoder::Opcode::BufferStoreFormatXy: - case Decoder::Opcode::BufferStoreFormatXyz: - case Decoder::Opcode::BufferStoreFormatXyzw: - case Decoder::Opcode::TBufferStoreFormatX: - case Decoder::Opcode::TBufferStoreFormatXy: - case Decoder::Opcode::TBufferStoreFormatXyz: - case Decoder::Opcode::TBufferStoreFormatXyzw: - case Decoder::Opcode::BufferAtomicSwap: - case Decoder::Opcode::BufferAtomicAdd: - case Decoder::Opcode::BufferAtomicSub: - case Decoder::Opcode::BufferAtomicSMin: - case Decoder::Opcode::BufferAtomicUMin: - case Decoder::Opcode::BufferAtomicSMax: - case Decoder::Opcode::BufferAtomicUMax: - case Decoder::Opcode::BufferAtomicAnd: - case Decoder::Opcode::BufferAtomicOr: - case Decoder::Opcode::BufferAtomicXor: - case Decoder::Opcode::BufferAtomicFMin: - case Decoder::Opcode::BufferAtomicFMax: - case Decoder::Opcode::FlatLoadUbyte: - case Decoder::Opcode::FlatLoadSbyte: - case Decoder::Opcode::FlatLoadUshort: - case Decoder::Opcode::FlatLoadSshort: - case Decoder::Opcode::FlatLoadDword: - case Decoder::Opcode::FlatLoadDwordx2: - case Decoder::Opcode::FlatLoadDwordx3: - case Decoder::Opcode::FlatLoadDwordx4: - case Decoder::Opcode::FlatStoreByte: - case Decoder::Opcode::FlatStoreShort: - case Decoder::Opcode::FlatStoreDword: - case Decoder::Opcode::FlatStoreDwordx2: - case Decoder::Opcode::FlatStoreDwordx3: - case Decoder::Opcode::FlatStoreDwordx4: - case Decoder::Opcode::DsAddU32: - case Decoder::Opcode::DsAddRtnU32: - case Decoder::Opcode::DsSubU32: - case Decoder::Opcode::DsSubRtnU32: - case Decoder::Opcode::DsMinI32: - case Decoder::Opcode::DsMinRtnI32: - case Decoder::Opcode::DsMaxI32: - case Decoder::Opcode::DsMaxRtnI32: - case Decoder::Opcode::DsMinU32: - case Decoder::Opcode::DsMinRtnU32: - case Decoder::Opcode::DsMaxU32: - case Decoder::Opcode::DsMaxRtnU32: - case Decoder::Opcode::DsAndB32: - case Decoder::Opcode::DsAndRtnB32: - case Decoder::Opcode::DsOrB32: - case Decoder::Opcode::DsOrRtnB32: - case Decoder::Opcode::DsXorB32: - case Decoder::Opcode::DsXorRtnB32: - case Decoder::Opcode::DsWrxchgRtnB32: - case Decoder::Opcode::DsMinF32: - case Decoder::Opcode::DsMaxF32: - case Decoder::Opcode::DsSwizzleB32: - case Decoder::Opcode::DsConsume: - case Decoder::Opcode::DsAppend: - case Decoder::Opcode::DsReadSbyte: - case Decoder::Opcode::DsReadUbyte: - case Decoder::Opcode::DsReadSshort: - case Decoder::Opcode::DsReadUshort: - case Decoder::Opcode::DsRead2B32: - case Decoder::Opcode::DsReadB32: - case Decoder::Opcode::DsReadB64: - case Decoder::Opcode::DsRead2B64: - case Decoder::Opcode::DsRead2St64B64: - case Decoder::Opcode::DsReadB96: - case Decoder::Opcode::DsReadB128: - case Decoder::Opcode::DsWriteByte: - case Decoder::Opcode::DsWriteShort: - case Decoder::Opcode::DsWrite2B32: - case Decoder::Opcode::DsWrite2St64B32: - case Decoder::Opcode::DsWrite2B64: - case Decoder::Opcode::DsWrite2St64B64: - case Decoder::Opcode::DsWriteB32: - case Decoder::Opcode::DsWriteB64: - case Decoder::Opcode::DsWriteB96: - case Decoder::Opcode::DsWriteB128: - case Decoder::Opcode::DsWriteAddtidB32: - case Decoder::Opcode::DsReadAddtidB32: - case Decoder::Opcode::ImageGetResinfo: - case Decoder::Opcode::ImageGetLod: - case Decoder::Opcode::ImageLoad: - case Decoder::Opcode::ImageLoadMip: - case Decoder::Opcode::ImageStore: - case Decoder::Opcode::ImageStoreMip: - case Decoder::Opcode::ImageAtomicAdd: - case Decoder::Opcode::ImageAtomicUMin: - case Decoder::Opcode::ImageAtomicUMax: - case Decoder::Opcode::ImageAtomicAnd: - case Decoder::Opcode::ImageAtomicOr: - case Decoder::Opcode::ImageAtomicXor: - case Decoder::Opcode::ImageGather4Lz: - case Decoder::Opcode::ImageGather4C: - case Decoder::Opcode::ImageGather4CLz: - case Decoder::Opcode::ImageGather4LzO: - case Decoder::Opcode::ImageGather4CO: - case Decoder::Opcode::ImageGather4CLzO: - case Decoder::Opcode::ImageGather4H: - case Decoder::Opcode::ImageSample: return true; + case Decoder::Opcode::S_LOAD_DWORD: + case Decoder::Opcode::S_LOAD_DWORDX2: + case Decoder::Opcode::S_LOAD_DWORDX4: + case Decoder::Opcode::S_LOAD_DWORDX8: + case Decoder::Opcode::S_LOAD_DWORDX16: + case Decoder::Opcode::S_BUFFER_LOAD_DWORD: + case Decoder::Opcode::S_BUFFER_LOAD_DWORDX2: + case Decoder::Opcode::S_BUFFER_LOAD_DWORDX4: + case Decoder::Opcode::S_BUFFER_LOAD_DWORDX8: + case Decoder::Opcode::S_BUFFER_LOAD_DWORDX16: + case Decoder::Opcode::BUFFER_LOAD_UBYTE: + case Decoder::Opcode::BUFFER_LOAD_SBYTE: + case Decoder::Opcode::BUFFER_LOAD_USHORT: + case Decoder::Opcode::BUFFER_LOAD_SSHORT: + case Decoder::Opcode::BUFFER_LOAD_DWORD: + case Decoder::Opcode::BUFFER_LOAD_DWORDX2: + case Decoder::Opcode::BUFFER_LOAD_DWORDX3: + case Decoder::Opcode::BUFFER_LOAD_DWORDX4: + case Decoder::Opcode::BUFFER_LOAD_FORMAT_X: + case Decoder::Opcode::BUFFER_LOAD_FORMAT_XY: + case Decoder::Opcode::BUFFER_LOAD_FORMAT_XYZ: + case Decoder::Opcode::BUFFER_LOAD_FORMAT_XYZW: + case Decoder::Opcode::TBUFFER_LOAD_FORMAT_X: + case Decoder::Opcode::TBUFFER_LOAD_FORMAT_XY: + case Decoder::Opcode::TBUFFER_LOAD_FORMAT_XYZ: + case Decoder::Opcode::TBUFFER_LOAD_FORMAT_XYZW: + case Decoder::Opcode::BUFFER_STORE_DWORD: + case Decoder::Opcode::BUFFER_STORE_DWORDX2: + case Decoder::Opcode::BUFFER_STORE_DWORDX3: + case Decoder::Opcode::BUFFER_STORE_DWORDX4: + case Decoder::Opcode::BUFFER_STORE_BYTE: + case Decoder::Opcode::BUFFER_STORE_SHORT: + case Decoder::Opcode::BUFFER_STORE_FORMAT_X: + case Decoder::Opcode::BUFFER_STORE_FORMAT_XY: + case Decoder::Opcode::BUFFER_STORE_FORMAT_XYZ: + case Decoder::Opcode::BUFFER_STORE_FORMAT_XYZW: + case Decoder::Opcode::TBUFFER_STORE_FORMAT_X: + case Decoder::Opcode::TBUFFER_STORE_FORMAT_XY: + case Decoder::Opcode::TBUFFER_STORE_FORMAT_XYZ: + case Decoder::Opcode::TBUFFER_STORE_FORMAT_XYZW: + case Decoder::Opcode::BUFFER_ATOMIC_SWAP: + case Decoder::Opcode::BUFFER_ATOMIC_ADD: + case Decoder::Opcode::BUFFER_ATOMIC_SUB: + case Decoder::Opcode::BUFFER_ATOMIC_SMIN: + case Decoder::Opcode::BUFFER_ATOMIC_UMIN: + case Decoder::Opcode::BUFFER_ATOMIC_SMAX: + case Decoder::Opcode::BUFFER_ATOMIC_UMAX: + case Decoder::Opcode::BUFFER_ATOMIC_AND: + case Decoder::Opcode::BUFFER_ATOMIC_OR: + case Decoder::Opcode::BUFFER_ATOMIC_XOR: + case Decoder::Opcode::BUFFER_ATOMIC_FMIN: + case Decoder::Opcode::BUFFER_ATOMIC_FMAX: + case Decoder::Opcode::FLAT_LOAD_UBYTE: + case Decoder::Opcode::FLAT_LOAD_SBYTE: + case Decoder::Opcode::FLAT_LOAD_USHORT: + case Decoder::Opcode::FLAT_LOAD_SSHORT: + case Decoder::Opcode::FLAT_LOAD_DWORD: + case Decoder::Opcode::FLAT_LOAD_DWORDX2: + case Decoder::Opcode::FLAT_LOAD_DWORDX3: + case Decoder::Opcode::FLAT_LOAD_DWORDX4: + case Decoder::Opcode::FLAT_STORE_BYTE: + case Decoder::Opcode::FLAT_STORE_SHORT: + case Decoder::Opcode::FLAT_STORE_DWORD: + case Decoder::Opcode::FLAT_STORE_DWORDX2: + case Decoder::Opcode::FLAT_STORE_DWORDX3: + case Decoder::Opcode::FLAT_STORE_DWORDX4: + case Decoder::Opcode::DS_ADD_U32: + case Decoder::Opcode::DS_ADD_RTN_U32: + case Decoder::Opcode::DS_SUB_U32: + case Decoder::Opcode::DS_SUB_RTN_U32: + case Decoder::Opcode::DS_MIN_I32: + case Decoder::Opcode::DS_MIN_RTN_I32: + case Decoder::Opcode::DS_MAX_I32: + case Decoder::Opcode::DS_MAX_RTN_I32: + case Decoder::Opcode::DS_MIN_U32: + case Decoder::Opcode::DS_MIN_RTN_U32: + case Decoder::Opcode::DS_MAX_U32: + case Decoder::Opcode::DS_MAX_RTN_U32: + case Decoder::Opcode::DS_AND_B32: + case Decoder::Opcode::DS_AND_RTN_B32: + case Decoder::Opcode::DS_OR_B32: + case Decoder::Opcode::DS_OR_RTN_B32: + case Decoder::Opcode::DS_XOR_B32: + case Decoder::Opcode::DS_XOR_RTN_B32: + case Decoder::Opcode::DS_WRXCHG_RTN_B32: + case Decoder::Opcode::DS_MIN_F32: + case Decoder::Opcode::DS_MAX_F32: + case Decoder::Opcode::DS_SWIZZLE_B32: + case Decoder::Opcode::DS_CONSUME: + case Decoder::Opcode::DS_APPEND: + case Decoder::Opcode::DS_READ_I8: + case Decoder::Opcode::DS_READ_U8: + case Decoder::Opcode::DS_READ_I16: + case Decoder::Opcode::DS_READ_U16: + case Decoder::Opcode::DS_READ2_B32: + case Decoder::Opcode::DS_READ_B32: + case Decoder::Opcode::DS_READ_B64: + case Decoder::Opcode::DS_READ2_B64: + case Decoder::Opcode::DS_READ2ST64_B64: + case Decoder::Opcode::DS_READ_B96: + case Decoder::Opcode::DS_READ_B128: + case Decoder::Opcode::DS_WRITE_B8: + case Decoder::Opcode::DS_WRITE_B16: + case Decoder::Opcode::DS_WRITE2_B32: + case Decoder::Opcode::DS_WRITE2ST64_B32: + case Decoder::Opcode::DS_WRITE2_B64: + case Decoder::Opcode::DS_WRITE2ST64_B64: + case Decoder::Opcode::DS_WRITE_B32: + case Decoder::Opcode::DS_WRITE_B64: + case Decoder::Opcode::DS_WRITE_B96: + case Decoder::Opcode::DS_WRITE_B128: + case Decoder::Opcode::DS_WRITE_ADDTID_B32: + case Decoder::Opcode::DS_READ_ADDTID_B32: + case Decoder::Opcode::IMAGE_GET_RESINFO: + case Decoder::Opcode::IMAGE_GET_LOD: + case Decoder::Opcode::IMAGE_LOAD: + case Decoder::Opcode::IMAGE_LOAD_MIP: + case Decoder::Opcode::IMAGE_STORE: + case Decoder::Opcode::IMAGE_STORE_MIP: + case Decoder::Opcode::IMAGE_ATOMIC_ADD: + case Decoder::Opcode::IMAGE_ATOMIC_UMIN: + case Decoder::Opcode::IMAGE_ATOMIC_UMAX: + case Decoder::Opcode::IMAGE_ATOMIC_AND: + case Decoder::Opcode::IMAGE_ATOMIC_OR: + case Decoder::Opcode::IMAGE_ATOMIC_XOR: + case Decoder::Opcode::IMAGE_GATHER4_LZ: + case Decoder::Opcode::IMAGE_GATHER4_C: + case Decoder::Opcode::IMAGE_GATHER4_C_LZ: + case Decoder::Opcode::IMAGE_GATHER4_LZ_O: + case Decoder::Opcode::IMAGE_GATHER4_C_O: + case Decoder::Opcode::IMAGE_GATHER4_C_LZ_O: + case Decoder::Opcode::IMAGE_GATHER4H: + case Decoder::Opcode::IMAGE_SAMPLE: return true; default: return false; } } diff --git a/src/graphics/shader/recompiler/ir/opcodes/ShaderIROpcodes.cpp b/src/graphics/shader/recompiler/ir/opcodes/ShaderIROpcodes.cpp index 44c0bed45..b3623b8fb 100644 --- a/src/graphics/shader/recompiler/ir/opcodes/ShaderIROpcodes.cpp +++ b/src/graphics/shader/recompiler/ir/opcodes/ShaderIROpcodes.cpp @@ -11,430 +11,430 @@ namespace Libs::Graphics::ShaderRecompiler::IR { namespace { struct LowerMap { - Decoder::Opcode decoded = Decoder::Opcode::Unknown; + Decoder::Opcode decoded = Decoder::Opcode::UNKNOWN; Opcode ir = Opcode::MoveU32; }; constexpr LowerMap LOWER_OPS[] = { - {Decoder::Opcode::SMovB32, Opcode::MoveU32}, - {Decoder::Opcode::SMovB64, Opcode::MoveU64}, - {Decoder::Opcode::SWqmB64, Opcode::WqmB64}, - {Decoder::Opcode::SMovkI32, Opcode::MoveU32}, - {Decoder::Opcode::SAbsI32, Opcode::AbsI32}, - {Decoder::Opcode::SBrevB32, Opcode::BitReverseU32}, - {Decoder::Opcode::SBcnt1I32B32, Opcode::BitCountU32}, - {Decoder::Opcode::SBcnt1I32B64, Opcode::BitCountU64}, - {Decoder::Opcode::SFf1I32B32, Opcode::FindLsbU32}, - {Decoder::Opcode::SFf1I32B64, Opcode::FindLsbU64}, - {Decoder::Opcode::SFlbitI32B64, Opcode::FindMsbFromHighU64}, - {Decoder::Opcode::SBitreplicateB64B32, Opcode::BitReplicateB64B32}, - {Decoder::Opcode::SNotB32, Opcode::BitwiseNotU32}, - {Decoder::Opcode::SNotB64, Opcode::BitwiseNotU64}, - {Decoder::Opcode::SAddU32, Opcode::IAddU32}, - {Decoder::Opcode::SSubU32, Opcode::ISubU32}, - {Decoder::Opcode::SAddI32, Opcode::IAddU32}, - {Decoder::Opcode::SSubI32, Opcode::ISubU32}, - {Decoder::Opcode::SMinI32, Opcode::IMinI32}, - {Decoder::Opcode::SMaxI32, Opcode::IMaxI32}, - {Decoder::Opcode::SMinU32, Opcode::UMinU32}, - {Decoder::Opcode::SMaxU32, Opcode::UMaxU32}, - {Decoder::Opcode::SAndB32, Opcode::BitwiseAndU32}, - {Decoder::Opcode::SAndB64, Opcode::BitwiseAndU64}, - {Decoder::Opcode::SAndn2B32, Opcode::BitwiseAndNotU32}, - {Decoder::Opcode::SAndn2B64, Opcode::BitwiseAndNotU64}, - {Decoder::Opcode::SOrB32, Opcode::BitwiseOrU32}, - {Decoder::Opcode::SOrB64, Opcode::BitwiseOrU64}, - {Decoder::Opcode::SOrn2B32, Opcode::BitwiseOrNotU32}, - {Decoder::Opcode::SOrn2B64, Opcode::BitwiseOrNotU64}, - {Decoder::Opcode::SXorB32, Opcode::BitwiseXorU32}, - {Decoder::Opcode::SXorB64, Opcode::BitwiseXorU64}, - {Decoder::Opcode::SNandB32, Opcode::BitwiseNandU32}, - {Decoder::Opcode::SNandB64, Opcode::BitwiseNandU64}, - {Decoder::Opcode::SNorB32, Opcode::BitwiseNorU32}, - {Decoder::Opcode::SNorB64, Opcode::BitwiseNorU64}, - {Decoder::Opcode::SXnorB32, Opcode::BitwiseXnorU32}, - {Decoder::Opcode::SXnorB64, Opcode::BitwiseXnorU64}, - {Decoder::Opcode::SLshlB32, Opcode::ShiftLeftLogicalU32}, - {Decoder::Opcode::SLshlB64, Opcode::ShiftLeftLogicalU64}, - {Decoder::Opcode::SLshrB32, Opcode::ShiftRightLogicalU32}, - {Decoder::Opcode::SLshrB64, Opcode::ShiftRightLogicalU64}, - {Decoder::Opcode::SAshrI32, Opcode::ShiftRightArithmeticI32}, - {Decoder::Opcode::SMulI32, Opcode::IMulU32}, - {Decoder::Opcode::SMulHiU32, Opcode::UMulHighU32}, - {Decoder::Opcode::SMulkI32, Opcode::IMulU32}, - {Decoder::Opcode::SBfeU32, Opcode::BitFieldExtractU32}, - {Decoder::Opcode::SBfeI32, Opcode::BitFieldExtractI32}, - {Decoder::Opcode::SBfeU64, Opcode::BitFieldExtractU64}, - {Decoder::Opcode::SBfmB32, Opcode::BitFieldMaskU32}, - {Decoder::Opcode::SBfmB64, Opcode::BitFieldMaskU64}, - {Decoder::Opcode::SBitcmp0B32, Opcode::BitCompare0B32}, - {Decoder::Opcode::SBitcmp1B32, Opcode::BitCompare1B32}, - {Decoder::Opcode::SPackLlB32B16, Opcode::PackLowLowU16}, - {Decoder::Opcode::SPackLhB32B16, Opcode::PackLowHighU16}, - {Decoder::Opcode::SPackHhB32B16, Opcode::PackHighHighU16}, - {Decoder::Opcode::SCmpEqI32, Opcode::CompareEqI32}, - {Decoder::Opcode::SCmpLgI32, Opcode::CompareNeI32}, - {Decoder::Opcode::SCmpGtI32, Opcode::CompareGtI32}, - {Decoder::Opcode::SCmpGeI32, Opcode::CompareGeI32}, - {Decoder::Opcode::SCmpLtI32, Opcode::CompareLtI32}, - {Decoder::Opcode::SCmpLeI32, Opcode::CompareLeI32}, - {Decoder::Opcode::SCmpEqU32, Opcode::CompareEqU32}, - {Decoder::Opcode::SCmpLgU32, Opcode::CompareNeU32}, - {Decoder::Opcode::SCmpGtU32, Opcode::CompareGtU32}, - {Decoder::Opcode::SCmpGeU32, Opcode::CompareGeU32}, - {Decoder::Opcode::SCmpLtU32, Opcode::CompareLtU32}, - {Decoder::Opcode::SCmpLeU32, Opcode::CompareLeU32}, - {Decoder::Opcode::SCmpEqU64, Opcode::CompareEqU64}, - {Decoder::Opcode::SCmpLgU64, Opcode::CompareNeU64}, - {Decoder::Opcode::VReadfirstlaneB32, Opcode::ReadFirstLaneU32}, - {Decoder::Opcode::VReadlaneB32, Opcode::ReadLaneU32}, - {Decoder::Opcode::VWritelaneB32, Opcode::WriteLaneU32}, - {Decoder::Opcode::VPermlane16B32, Opcode::Permlane16B32}, - {Decoder::Opcode::VPermlanex16B32, Opcode::Permlanex16B32}, - {Decoder::Opcode::VCvtF32I32, Opcode::ConvertI32ToF32}, - {Decoder::Opcode::VCvtF32U32, Opcode::ConvertU32ToF32}, - {Decoder::Opcode::VCvtU32F32, Opcode::ConvertF32ToU32}, - {Decoder::Opcode::VCvtI32F32, Opcode::ConvertF32ToI32}, - {Decoder::Opcode::VCvtF16F32, Opcode::ConvertF32ToF16}, - {Decoder::Opcode::VCvtF32F16, Opcode::ConvertF16ToF32}, - {Decoder::Opcode::VCvtF16U16, Opcode::ConvertU16ToF16}, - {Decoder::Opcode::VCvtU16F16, Opcode::ConvertF16ToU16}, - {Decoder::Opcode::VCvtF16I16, Opcode::ConvertI16ToF16}, - {Decoder::Opcode::VCvtI16F16, Opcode::ConvertF16ToI16}, - {Decoder::Opcode::VCvtRpiI32F32, Opcode::ConvertRoundPlusInfF32ToI32}, - {Decoder::Opcode::VCvtFlrI32F32, Opcode::ConvertFloorF32ToI32}, - {Decoder::Opcode::VFrexpExpI32F32, Opcode::FrexpExpI32F32}, - {Decoder::Opcode::VFrexpMantF32, Opcode::FrexpMantF32}, - {Decoder::Opcode::VCvtOffF32I4, Opcode::ConvertI4ToOffsetF32}, - {Decoder::Opcode::VRcpF32, Opcode::RcpF32}, - {Decoder::Opcode::VRcpIflagF32, Opcode::RcpIflagF32}, - {Decoder::Opcode::VFractF32, Opcode::FractF32}, - {Decoder::Opcode::VTruncF32, Opcode::TruncF32}, - {Decoder::Opcode::VCeilF32, Opcode::CeilF32}, - {Decoder::Opcode::VRndneF32, Opcode::RoundEvenF32}, - {Decoder::Opcode::VFloorF32, Opcode::FloorF32}, - {Decoder::Opcode::VExpF32, Opcode::Exp2F32}, - {Decoder::Opcode::VLogF32, Opcode::Log2F32}, - {Decoder::Opcode::VRsqF32, Opcode::InverseSqrtF32}, - {Decoder::Opcode::VSqrtF32, Opcode::SqrtF32}, - {Decoder::Opcode::VRcpF16, Opcode::RcpF16}, - {Decoder::Opcode::VSqrtF16, Opcode::SqrtF16}, - {Decoder::Opcode::VRsqF16, Opcode::InverseSqrtF16}, - {Decoder::Opcode::VLogF16, Opcode::Log2F16}, - {Decoder::Opcode::VExpF16, Opcode::Exp2F16}, - {Decoder::Opcode::VFloorF16, Opcode::FloorF16}, - {Decoder::Opcode::VCeilF16, Opcode::CeilF16}, - {Decoder::Opcode::VTruncF16, Opcode::TruncF16}, - {Decoder::Opcode::VRndneF16, Opcode::RoundEvenF16}, - {Decoder::Opcode::VSinF32, Opcode::SinF32}, - {Decoder::Opcode::VCosF32, Opcode::CosF32}, - {Decoder::Opcode::VNotB32, Opcode::BitwiseNotU32}, - {Decoder::Opcode::VBfrevB32, Opcode::BitReverseU32}, - {Decoder::Opcode::VFfblB32, Opcode::FindLsbU32}, - {Decoder::Opcode::VFfbhU32, Opcode::FindMsbFromHighU32}, - {Decoder::Opcode::VAddF32, Opcode::FAddF32}, - {Decoder::Opcode::VSubF32, Opcode::FSubF32}, - {Decoder::Opcode::VSubrevF32, Opcode::FSubF32}, - {Decoder::Opcode::VMulF32, Opcode::FMulF32}, - {Decoder::Opcode::VMacF32, Opcode::FMadF32}, - {Decoder::Opcode::VMadmkF32, Opcode::FMadF32}, - {Decoder::Opcode::VMadakF32, Opcode::FMadF32}, - {Decoder::Opcode::VMinF32, Opcode::FMinF32}, - {Decoder::Opcode::VMaxF32, Opcode::FMaxF32}, - {Decoder::Opcode::VMinI32, Opcode::IMinI32}, - {Decoder::Opcode::VMaxI32, Opcode::IMaxI32}, - {Decoder::Opcode::VMadF32, Opcode::FMadF32}, - {Decoder::Opcode::VMadI32I24, Opcode::IMadI24U32}, - {Decoder::Opcode::VMadU32U24, Opcode::UMadU24U32}, - {Decoder::Opcode::VCubeidF32, Opcode::CubeIdF32}, - {Decoder::Opcode::VCubescF32, Opcode::CubeScF32}, - {Decoder::Opcode::VCubetcF32, Opcode::CubeTcF32}, - {Decoder::Opcode::VCubemaF32, Opcode::CubeMaF32}, - {Decoder::Opcode::VFmaF32, Opcode::FMadF32}, - {Decoder::Opcode::VBfeU32, Opcode::BitFieldExtract3U32}, - {Decoder::Opcode::VBfeI32, Opcode::BitFieldExtract3I32}, - {Decoder::Opcode::VBfiB32, Opcode::BitFieldInsertSelectU32}, - {Decoder::Opcode::VAlignbitB32, Opcode::AlignBitU32}, - {Decoder::Opcode::VAlignbyteB32, Opcode::AlignByteU32}, - {Decoder::Opcode::VMin3F32, Opcode::FMin3F32}, - {Decoder::Opcode::VMin3I32, Opcode::IMin3I32}, - {Decoder::Opcode::VMin3U32, Opcode::UMin3U32}, - {Decoder::Opcode::VMin3F16, Opcode::Min3F16}, - {Decoder::Opcode::VMax3F32, Opcode::FMax3F32}, - {Decoder::Opcode::VMax3I32, Opcode::IMax3I32}, - {Decoder::Opcode::VMax3U32, Opcode::UMax3U32}, - {Decoder::Opcode::VMax3F16, Opcode::Max3F16}, - {Decoder::Opcode::VMed3F32, Opcode::FMed3F32}, - {Decoder::Opcode::VMed3I32, Opcode::IMed3I32}, - {Decoder::Opcode::VMed3U32, Opcode::UMed3U32}, - {Decoder::Opcode::VMed3F16, Opcode::Med3F16}, - {Decoder::Opcode::VMed3I16, Opcode::IMed3I16}, - {Decoder::Opcode::VSadU32, Opcode::SadU32}, - {Decoder::Opcode::VAdd3U32, Opcode::IAdd3U32}, - {Decoder::Opcode::VLshlAddU32, Opcode::ShiftLeftAddU32}, - {Decoder::Opcode::VAddLshlU32, Opcode::AddShiftLeftU32}, - {Decoder::Opcode::VXadU32, Opcode::XorAddU32}, - {Decoder::Opcode::VLshlOrB32, Opcode::ShiftLeftOrU32}, - {Decoder::Opcode::VAndOrB32, Opcode::BitwiseAndOrU32}, - {Decoder::Opcode::VOr3B32, Opcode::BitwiseOr3U32}, - {Decoder::Opcode::VXor3B32, Opcode::BitwiseXor3U32}, - {Decoder::Opcode::VAddNcU32, Opcode::IAddU32}, - {Decoder::Opcode::VSubNcU32, Opcode::ISubU32}, - {Decoder::Opcode::VSubrevNcU32, Opcode::ISubU32}, - {Decoder::Opcode::VAddNcU16, Opcode::IAddU16}, - {Decoder::Opcode::VSubNcU16, Opcode::ISubI16}, - {Decoder::Opcode::VMaxU16, Opcode::UMaxU16}, - {Decoder::Opcode::VMaxI16, Opcode::IMaxI16}, - {Decoder::Opcode::VMinU16, Opcode::UMinU16}, - {Decoder::Opcode::VMinI16, Opcode::IMinI16}, - {Decoder::Opcode::VAddNcI16, Opcode::IAddU16}, - {Decoder::Opcode::VSubNcI16, Opcode::ISubI16}, - {Decoder::Opcode::VMulI32I24, Opcode::IMulI24U32}, - {Decoder::Opcode::VMulU32U24, Opcode::UMulU24U32}, - {Decoder::Opcode::VMulLoU32, Opcode::IMulU32}, - {Decoder::Opcode::VMulHiU32, Opcode::UMulHighU32}, - {Decoder::Opcode::VMulLoI32, Opcode::IMulU32}, - {Decoder::Opcode::VMulHiI32, Opcode::SMulHighI32}, - {Decoder::Opcode::VAddI32, Opcode::IAddU32}, - {Decoder::Opcode::VSubI32, Opcode::ISubU32}, - {Decoder::Opcode::VSubrevI32, Opcode::ISubU32}, - {Decoder::Opcode::VBfmB32, Opcode::BitFieldMaskU32}, - {Decoder::Opcode::VCvtPkrtzF16F32, Opcode::PackF32ToF16Rtz}, - {Decoder::Opcode::VLdexpF32, Opcode::LdexpF32}, - {Decoder::Opcode::VCvtPknormI16F32, Opcode::PackSnorm2x16F32}, - {Decoder::Opcode::VCvtPknormU16F32, Opcode::PackUnorm2x16F32}, - {Decoder::Opcode::VCvtPkU16U32, Opcode::PackU16U32}, - {Decoder::Opcode::VCvtPkI16I32, Opcode::PackU16U32}, - {Decoder::Opcode::VCvtPkU8F32, Opcode::PackU8F32}, - {Decoder::Opcode::VPackB32F16, Opcode::PackB32F16}, - {Decoder::Opcode::VPkMadI16, Opcode::PackedMadI16}, - {Decoder::Opcode::VPkMulLoU16, Opcode::PackedMulLoU16}, - {Decoder::Opcode::VPkAddI16, Opcode::PackedAddI16}, - {Decoder::Opcode::VPkSubI16, Opcode::PackedSubI16}, - {Decoder::Opcode::VPkLshlrevB16, Opcode::PackedLshlrevB16}, - {Decoder::Opcode::VPkLshrrevB16, Opcode::PackedLshrrevB16}, - {Decoder::Opcode::VPkAshrrevI16, Opcode::PackedAshrrevI16}, - {Decoder::Opcode::VPkMaxI16, Opcode::PackedMaxI16}, - {Decoder::Opcode::VPkMinI16, Opcode::PackedMinI16}, - {Decoder::Opcode::VPkMadU16, Opcode::PackedMadU16}, - {Decoder::Opcode::VPkAddU16, Opcode::PackedAddU16}, - {Decoder::Opcode::VPkSubU16, Opcode::PackedSubU16}, - {Decoder::Opcode::VPkMaxU16, Opcode::PackedMaxU16}, - {Decoder::Opcode::VPkMinU16, Opcode::PackedMinU16}, - {Decoder::Opcode::VPkAddF16, Opcode::PackedAddF16}, - {Decoder::Opcode::VPkMulF16, Opcode::PackedMulF16}, - {Decoder::Opcode::VPkMinF16, Opcode::PackedMinF16}, - {Decoder::Opcode::VPkMaxF16, Opcode::PackedMaxF16}, - {Decoder::Opcode::VPkFmaF16, Opcode::PackedFmaF16}, - {Decoder::Opcode::VPkFmacF16, Opcode::PackedFmaF16}, - {Decoder::Opcode::VAddF16, Opcode::AddF16}, - {Decoder::Opcode::VSubF16, Opcode::SubF16}, - {Decoder::Opcode::VSubrevF16, Opcode::SubF16}, - {Decoder::Opcode::VMulF16, Opcode::MulF16}, - {Decoder::Opcode::VFmacF16, Opcode::FmaF16}, - {Decoder::Opcode::VFmamkF16, Opcode::FmaF16}, - {Decoder::Opcode::VFmaakF16, Opcode::FmaF16}, - {Decoder::Opcode::VFmaF16, Opcode::FmaF16}, - {Decoder::Opcode::VMadMixloF16, Opcode::MadMixF16}, - {Decoder::Opcode::VMadMixhiF16, Opcode::MadMixF16}, - {Decoder::Opcode::VAndB32, Opcode::BitwiseAndU32}, - {Decoder::Opcode::VOrB32, Opcode::BitwiseOrU32}, - {Decoder::Opcode::VXorB32, Opcode::BitwiseXorU32}, - {Decoder::Opcode::VXnorB32, Opcode::BitwiseXnorU32}, - {Decoder::Opcode::VBcntU32B32, Opcode::BitCountAddU32}, - {Decoder::Opcode::VMbcntLoU32B32, Opcode::MaskedBitCountLowU32}, - {Decoder::Opcode::VMbcntHiU32B32, Opcode::MaskedBitCountHighU32}, - {Decoder::Opcode::VLshlB32, Opcode::ShiftLeftLogicalU32}, - {Decoder::Opcode::VLshlrevB32, Opcode::ShiftLeftLogicalU32}, - {Decoder::Opcode::VLshlrevB16, Opcode::ShiftLeftLogicalU16}, - {Decoder::Opcode::VLshrB32, Opcode::ShiftRightLogicalU32}, - {Decoder::Opcode::VLshrrevB32, Opcode::ShiftRightLogicalU32}, - {Decoder::Opcode::VLshrrevB16, Opcode::ShiftRightLogicalU16}, - {Decoder::Opcode::VAshrI32, Opcode::ShiftRightArithmeticI32}, - {Decoder::Opcode::VAshrrevI32, Opcode::ShiftRightArithmeticI32}, - {Decoder::Opcode::VAshrrevI16, Opcode::ShiftRightArithmeticI16}, - {Decoder::Opcode::VMinU32, Opcode::UMinU32}, - {Decoder::Opcode::VMaxU32, Opcode::UMaxU32}, - {Decoder::Opcode::VMaxF16, Opcode::MaxF16}, - {Decoder::Opcode::VMinF16, Opcode::MinF16}, - {Decoder::Opcode::VCmpFF32, Opcode::CompareFalse}, - {Decoder::Opcode::VCmpLtF32, Opcode::CompareLtF32}, - {Decoder::Opcode::VCmpEqF32, Opcode::CompareEqF32}, - {Decoder::Opcode::VCmpLeF32, Opcode::CompareLeF32}, - {Decoder::Opcode::VCmpGtF32, Opcode::CompareGtF32}, - {Decoder::Opcode::VCmpLgF32, Opcode::CompareNeF32}, - {Decoder::Opcode::VCmpGeF32, Opcode::CompareGeF32}, - {Decoder::Opcode::VCmpOF32, Opcode::CompareOrderedF32}, - {Decoder::Opcode::VCmpUF32, Opcode::CompareUnorderedF32}, - {Decoder::Opcode::VCmpNgeF32, Opcode::CompareUnordLtF32}, - {Decoder::Opcode::VCmpNlgF32, Opcode::CompareUnordEqF32}, - {Decoder::Opcode::VCmpNgtF32, Opcode::CompareUnordLeF32}, - {Decoder::Opcode::VCmpNleF32, Opcode::CompareUnordGtF32}, - {Decoder::Opcode::VCmpNeqF32, Opcode::CompareUnordNeF32}, - {Decoder::Opcode::VCmpNltF32, Opcode::CompareUnordGeF32}, - {Decoder::Opcode::VCmpTruF32, Opcode::CompareTrue}, - {Decoder::Opcode::VCmpClassF32, Opcode::CompareClassF32}, - {Decoder::Opcode::VCmpLtF16, Opcode::CompareLtF16}, - {Decoder::Opcode::VCmpEqF16, Opcode::CompareEqF16}, - {Decoder::Opcode::VCmpLeF16, Opcode::CompareLeF16}, - {Decoder::Opcode::VCmpGtF16, Opcode::CompareGtF16}, - {Decoder::Opcode::VCmpLgF16, Opcode::CompareNeF16}, - {Decoder::Opcode::VCmpGeF16, Opcode::CompareGeF16}, - {Decoder::Opcode::VCmpNeqF16, Opcode::CompareUnordNeF16}, - {Decoder::Opcode::VCmpxLtF16, Opcode::CompareMaskLtF16}, - {Decoder::Opcode::VCmpxEqF16, Opcode::CompareMaskEqF16}, - {Decoder::Opcode::VCmpxLeF16, Opcode::CompareMaskLeF16}, - {Decoder::Opcode::VCmpxGtF16, Opcode::CompareMaskGtF16}, - {Decoder::Opcode::VCmpxGeF16, Opcode::CompareMaskGeF16}, - {Decoder::Opcode::VCmpxNeqF16, Opcode::CompareMaskUnordNeF16}, - {Decoder::Opcode::VCmpxNltF16, Opcode::CompareMaskUnordGeF16}, - {Decoder::Opcode::VCmpxLtF32, Opcode::CompareMaskLtF32}, - {Decoder::Opcode::VCmpxEqF32, Opcode::CompareMaskEqF32}, - {Decoder::Opcode::VCmpxLeF32, Opcode::CompareMaskLeF32}, - {Decoder::Opcode::VCmpxGtF32, Opcode::CompareMaskGtF32}, - {Decoder::Opcode::VCmpxLgF32, Opcode::CompareMaskNeF32}, - {Decoder::Opcode::VCmpxGeF32, Opcode::CompareMaskGeF32}, - {Decoder::Opcode::VCmpxNgeF32, Opcode::CompareMaskUnordLtF32}, - {Decoder::Opcode::VCmpxNlgF32, Opcode::CompareMaskUnordEqF32}, - {Decoder::Opcode::VCmpxNgtF32, Opcode::CompareMaskUnordLeF32}, - {Decoder::Opcode::VCmpxNleF32, Opcode::CompareMaskUnordGtF32}, - {Decoder::Opcode::VCmpxNeqF32, Opcode::CompareMaskUnordNeF32}, - {Decoder::Opcode::VCmpxNltF32, Opcode::CompareMaskUnordGeF32}, - {Decoder::Opcode::VCmpFI32, Opcode::CompareFalse}, - {Decoder::Opcode::VCmpLtI32, Opcode::CompareLtI32}, - {Decoder::Opcode::VCmpEqI32, Opcode::CompareEqI32}, - {Decoder::Opcode::VCmpLeI32, Opcode::CompareLeI32}, - {Decoder::Opcode::VCmpGtI32, Opcode::CompareGtI32}, - {Decoder::Opcode::VCmpNeI32, Opcode::CompareNeI32}, - {Decoder::Opcode::VCmpGeI32, Opcode::CompareGeI32}, - {Decoder::Opcode::VCmpTI32, Opcode::CompareTrue}, - {Decoder::Opcode::VCmpLtI16, Opcode::CompareLtI16}, - {Decoder::Opcode::VCmpEqI16, Opcode::CompareEqI16}, - {Decoder::Opcode::VCmpLeI16, Opcode::CompareLeI16}, - {Decoder::Opcode::VCmpGtI16, Opcode::CompareGtI16}, - {Decoder::Opcode::VCmpNeI16, Opcode::CompareNeI16}, - {Decoder::Opcode::VCmpGeI16, Opcode::CompareGeI16}, - {Decoder::Opcode::VCmpxLtI32, Opcode::CompareMaskLtI32}, - {Decoder::Opcode::VCmpxEqI32, Opcode::CompareMaskEqI32}, - {Decoder::Opcode::VCmpxLeI32, Opcode::CompareMaskLeI32}, - {Decoder::Opcode::VCmpxGtI32, Opcode::CompareMaskGtI32}, - {Decoder::Opcode::VCmpxNeI32, Opcode::CompareMaskNeI32}, - {Decoder::Opcode::VCmpxGeI32, Opcode::CompareMaskGeI32}, - {Decoder::Opcode::VCmpLtU16, Opcode::CompareLtU16}, - {Decoder::Opcode::VCmpEqU16, Opcode::CompareEqU16}, - {Decoder::Opcode::VCmpLeU16, Opcode::CompareLeU16}, - {Decoder::Opcode::VCmpGtU16, Opcode::CompareGtU16}, - {Decoder::Opcode::VCmpNeU16, Opcode::CompareNeU16}, - {Decoder::Opcode::VCmpGeU16, Opcode::CompareGeU16}, - {Decoder::Opcode::VCmpFU32, Opcode::CompareFalse}, - {Decoder::Opcode::VCmpLtU32, Opcode::CompareLtU32}, - {Decoder::Opcode::VCmpEqU32, Opcode::CompareEqU32}, - {Decoder::Opcode::VCmpLeU32, Opcode::CompareLeU32}, - {Decoder::Opcode::VCmpGtU32, Opcode::CompareGtU32}, - {Decoder::Opcode::VCmpNeU32, Opcode::CompareNeU32}, - {Decoder::Opcode::VCmpGeU32, Opcode::CompareGeU32}, - {Decoder::Opcode::VCmpTU32, Opcode::CompareTrue}, - {Decoder::Opcode::VCmpEqI64, Opcode::CompareEqU64}, - {Decoder::Opcode::VCmpGtU64, Opcode::CompareGtU64}, - {Decoder::Opcode::VCmpNeU64, Opcode::CompareNeU64}, - {Decoder::Opcode::VCmpxLtU32, Opcode::CompareMaskLtU32}, - {Decoder::Opcode::VCmpxEqU32, Opcode::CompareMaskEqU32}, - {Decoder::Opcode::VCmpxLeU32, Opcode::CompareMaskLeU32}, - {Decoder::Opcode::VCmpxGtU32, Opcode::CompareMaskGtU32}, - {Decoder::Opcode::VCmpxNeU32, Opcode::CompareMaskNeU32}, - {Decoder::Opcode::VCmpxGeU32, Opcode::CompareMaskGeU32}, - {Decoder::Opcode::SLoadDword, Opcode::SLoadDword}, - {Decoder::Opcode::SBufferLoadDword, Opcode::SBufferLoadDword}, - {Decoder::Opcode::BufferLoadDword, Opcode::BufferLoadDword}, - {Decoder::Opcode::BufferLoadSbyte, Opcode::BufferLoadSbyte}, - {Decoder::Opcode::BufferLoadSshort, Opcode::BufferLoadSshort}, - {Decoder::Opcode::BufferStoreByte, Opcode::BufferStoreByte}, - {Decoder::Opcode::BufferStoreShort, Opcode::BufferStoreShort}, - {Decoder::Opcode::BufferStoreDword, Opcode::BufferStoreDword}, - {Decoder::Opcode::BufferAtomicSwap, Opcode::AtomicSwapU32}, - {Decoder::Opcode::BufferAtomicAdd, Opcode::AtomicAddU32}, - {Decoder::Opcode::BufferAtomicSub, Opcode::AtomicSubU32}, - {Decoder::Opcode::BufferAtomicSMin, Opcode::AtomicSMinI32}, - {Decoder::Opcode::BufferAtomicUMin, Opcode::AtomicUMinU32}, - {Decoder::Opcode::BufferAtomicSMax, Opcode::AtomicSMaxI32}, - {Decoder::Opcode::BufferAtomicUMax, Opcode::AtomicUMaxU32}, - {Decoder::Opcode::BufferAtomicAnd, Opcode::AtomicAndU32}, - {Decoder::Opcode::BufferAtomicOr, Opcode::AtomicOrU32}, - {Decoder::Opcode::BufferAtomicXor, Opcode::AtomicXorU32}, - {Decoder::Opcode::BufferAtomicFMin, Opcode::AtomicFMinF32}, - {Decoder::Opcode::BufferAtomicFMax, Opcode::AtomicFMaxF32}, - {Decoder::Opcode::FlatLoadUbyte, Opcode::FlatLoadUbyte}, - {Decoder::Opcode::FlatLoadSbyte, Opcode::FlatLoadSbyte}, - {Decoder::Opcode::FlatLoadSshort, Opcode::FlatLoadSshort}, - {Decoder::Opcode::FlatStoreByte, Opcode::FlatStoreByte}, - {Decoder::Opcode::FlatStoreShort, Opcode::FlatStoreShort}, - {Decoder::Opcode::FlatStoreDword, Opcode::FlatStoreDword}, - {Decoder::Opcode::DsAddU32, Opcode::AtomicAddU32}, - {Decoder::Opcode::DsAddRtnU32, Opcode::AtomicAddU32}, - {Decoder::Opcode::DsSubU32, Opcode::AtomicSubU32}, - {Decoder::Opcode::DsSubRtnU32, Opcode::AtomicSubU32}, - {Decoder::Opcode::DsMinI32, Opcode::AtomicSMinI32}, - {Decoder::Opcode::DsMinRtnI32, Opcode::AtomicSMinI32}, - {Decoder::Opcode::DsMaxI32, Opcode::AtomicSMaxI32}, - {Decoder::Opcode::DsMaxRtnI32, Opcode::AtomicSMaxI32}, - {Decoder::Opcode::DsMinU32, Opcode::AtomicUMinU32}, - {Decoder::Opcode::DsMinRtnU32, Opcode::AtomicUMinU32}, - {Decoder::Opcode::DsMaxU32, Opcode::AtomicUMaxU32}, - {Decoder::Opcode::DsMaxRtnU32, Opcode::AtomicUMaxU32}, - {Decoder::Opcode::DsAndB32, Opcode::AtomicAndU32}, - {Decoder::Opcode::DsAndRtnB32, Opcode::AtomicAndU32}, - {Decoder::Opcode::DsOrB32, Opcode::AtomicOrU32}, - {Decoder::Opcode::DsOrRtnB32, Opcode::AtomicOrU32}, - {Decoder::Opcode::DsXorB32, Opcode::AtomicXorU32}, - {Decoder::Opcode::DsXorRtnB32, Opcode::AtomicXorU32}, - {Decoder::Opcode::DsWrxchgRtnB32, Opcode::AtomicSwapU32}, - {Decoder::Opcode::DsReadSbyte, Opcode::DsReadSbyte}, - {Decoder::Opcode::DsReadUbyte, Opcode::DsReadUbyte}, - {Decoder::Opcode::DsReadSshort, Opcode::DsReadSshort}, - {Decoder::Opcode::DsReadUshort, Opcode::DsReadUshort}, - {Decoder::Opcode::DsRead2B32, Opcode::DsReadB32}, - {Decoder::Opcode::DsReadB32, Opcode::DsReadB32}, - {Decoder::Opcode::DsReadB64, Opcode::DsReadB32}, - {Decoder::Opcode::DsRead2B64, Opcode::DsReadB32}, - {Decoder::Opcode::DsRead2St64B64, Opcode::DsReadB32}, - {Decoder::Opcode::DsReadB96, Opcode::DsReadB32}, - {Decoder::Opcode::DsReadB128, Opcode::DsReadB32}, - {Decoder::Opcode::DsWriteByte, Opcode::DsWriteByte}, - {Decoder::Opcode::DsWriteShort, Opcode::DsWriteShort}, - {Decoder::Opcode::DsWrite2B32, Opcode::DsWriteB32}, - {Decoder::Opcode::DsWrite2St64B32, Opcode::DsWriteB32}, - {Decoder::Opcode::DsWrite2B64, Opcode::DsWriteB32}, - {Decoder::Opcode::DsWrite2St64B64, Opcode::DsWriteB32}, - {Decoder::Opcode::DsWriteB32, Opcode::DsWriteB32}, - {Decoder::Opcode::DsWriteB64, Opcode::DsWriteB32}, - {Decoder::Opcode::DsWriteB96, Opcode::DsWriteB32}, - {Decoder::Opcode::DsWriteB128, Opcode::DsWriteB32}, - {Decoder::Opcode::DsMinF32, Opcode::DsMinF32}, - {Decoder::Opcode::DsMaxF32, Opcode::DsMaxF32}, - {Decoder::Opcode::DsConsume, Opcode::DsConsume}, - {Decoder::Opcode::DsAppend, Opcode::DsAppend}, - {Decoder::Opcode::DsWriteAddtidB32, Opcode::DsWriteAddtidB32}, - {Decoder::Opcode::DsReadAddtidB32, Opcode::DsReadAddtidB32}, - {Decoder::Opcode::ImageGetResinfo, Opcode::ImageGetResinfo}, - {Decoder::Opcode::ImageGetLod, Opcode::ImageGetLod}, - {Decoder::Opcode::ImageLoad, Opcode::ImageLoad}, - {Decoder::Opcode::ImageLoadMip, Opcode::ImageLoad}, - {Decoder::Opcode::ImageStore, Opcode::ImageStore}, - {Decoder::Opcode::ImageStoreMip, Opcode::ImageStore}, - {Decoder::Opcode::ImageAtomicAdd, Opcode::AtomicAddU32}, - {Decoder::Opcode::ImageAtomicUMin, Opcode::AtomicUMinU32}, - {Decoder::Opcode::ImageAtomicUMax, Opcode::AtomicUMaxU32}, - {Decoder::Opcode::ImageAtomicAnd, Opcode::AtomicAndU32}, - {Decoder::Opcode::ImageAtomicOr, Opcode::AtomicOrU32}, - {Decoder::Opcode::ImageAtomicXor, Opcode::AtomicXorU32}, - {Decoder::Opcode::ImageSample, Opcode::ImageSample}, - {Decoder::Opcode::ImageGather4Lz, Opcode::ImageGather4}, - {Decoder::Opcode::ImageGather4C, Opcode::ImageGather4}, - {Decoder::Opcode::ImageGather4CLz, Opcode::ImageGather4}, - {Decoder::Opcode::ImageGather4LzO, Opcode::ImageGather4}, - {Decoder::Opcode::ImageGather4CO, Opcode::ImageGather4}, - {Decoder::Opcode::ImageGather4CLzO, Opcode::ImageGather4}, - {Decoder::Opcode::ImageGather4H, Opcode::ImageGather4}, + {Decoder::Opcode::S_MOV_B32, Opcode::MoveU32}, + {Decoder::Opcode::S_MOV_B64, Opcode::MoveU64}, + {Decoder::Opcode::S_WQM_B64, Opcode::WqmB64}, + {Decoder::Opcode::S_MOVK_I32, Opcode::MoveU32}, + {Decoder::Opcode::S_ABS_I32, Opcode::AbsI32}, + {Decoder::Opcode::S_BREV_B32, Opcode::BitReverseU32}, + {Decoder::Opcode::S_BCNT1_I32_B32, Opcode::BitCountU32}, + {Decoder::Opcode::S_BCNT1_I32_B64, Opcode::BitCountU64}, + {Decoder::Opcode::S_FF1_I32_B32, Opcode::FindLsbU32}, + {Decoder::Opcode::S_FF1_I32_B64, Opcode::FindLsbU64}, + {Decoder::Opcode::S_FLBIT_I32_B64, Opcode::FindMsbFromHighU64}, + {Decoder::Opcode::S_BITREPLICATE_B64_B32, Opcode::BitReplicateB64B32}, + {Decoder::Opcode::S_NOT_B32, Opcode::BitwiseNotU32}, + {Decoder::Opcode::S_NOT_B64, Opcode::BitwiseNotU64}, + {Decoder::Opcode::S_ADD_U32, Opcode::IAddU32}, + {Decoder::Opcode::S_SUB_U32, Opcode::ISubU32}, + {Decoder::Opcode::S_ADD_I32, Opcode::IAddU32}, + {Decoder::Opcode::S_SUB_I32, Opcode::ISubU32}, + {Decoder::Opcode::S_MIN_I32, Opcode::IMinI32}, + {Decoder::Opcode::S_MAX_I32, Opcode::IMaxI32}, + {Decoder::Opcode::S_MIN_U32, Opcode::UMinU32}, + {Decoder::Opcode::S_MAX_U32, Opcode::UMaxU32}, + {Decoder::Opcode::S_AND_B32, Opcode::BitwiseAndU32}, + {Decoder::Opcode::S_AND_B64, Opcode::BitwiseAndU64}, + {Decoder::Opcode::S_ANDN2_B32, Opcode::BitwiseAndNotU32}, + {Decoder::Opcode::S_ANDN2_B64, Opcode::BitwiseAndNotU64}, + {Decoder::Opcode::S_OR_B32, Opcode::BitwiseOrU32}, + {Decoder::Opcode::S_OR_B64, Opcode::BitwiseOrU64}, + {Decoder::Opcode::S_ORN2_B32, Opcode::BitwiseOrNotU32}, + {Decoder::Opcode::S_ORN2_B64, Opcode::BitwiseOrNotU64}, + {Decoder::Opcode::S_XOR_B32, Opcode::BitwiseXorU32}, + {Decoder::Opcode::S_XOR_B64, Opcode::BitwiseXorU64}, + {Decoder::Opcode::S_NAND_B32, Opcode::BitwiseNandU32}, + {Decoder::Opcode::S_NAND_B64, Opcode::BitwiseNandU64}, + {Decoder::Opcode::S_NOR_B32, Opcode::BitwiseNorU32}, + {Decoder::Opcode::S_NOR_B64, Opcode::BitwiseNorU64}, + {Decoder::Opcode::S_XNOR_B32, Opcode::BitwiseXnorU32}, + {Decoder::Opcode::S_XNOR_B64, Opcode::BitwiseXnorU64}, + {Decoder::Opcode::S_LSHL_B32, Opcode::ShiftLeftLogicalU32}, + {Decoder::Opcode::S_LSHL_B64, Opcode::ShiftLeftLogicalU64}, + {Decoder::Opcode::S_LSHR_B32, Opcode::ShiftRightLogicalU32}, + {Decoder::Opcode::S_LSHR_B64, Opcode::ShiftRightLogicalU64}, + {Decoder::Opcode::S_ASHR_I32, Opcode::ShiftRightArithmeticI32}, + {Decoder::Opcode::S_MUL_I32, Opcode::IMulU32}, + {Decoder::Opcode::S_MUL_HI_U32, Opcode::UMulHighU32}, + {Decoder::Opcode::S_MULK_I32, Opcode::IMulU32}, + {Decoder::Opcode::S_BFE_U32, Opcode::BitFieldExtractU32}, + {Decoder::Opcode::S_BFE_I32, Opcode::BitFieldExtractI32}, + {Decoder::Opcode::S_BFE_U64, Opcode::BitFieldExtractU64}, + {Decoder::Opcode::S_BFM_B32, Opcode::BitFieldMaskU32}, + {Decoder::Opcode::S_BFM_B64, Opcode::BitFieldMaskU64}, + {Decoder::Opcode::S_BITCMP0_B32, Opcode::BitCompare0B32}, + {Decoder::Opcode::S_BITCMP1_B32, Opcode::BitCompare1B32}, + {Decoder::Opcode::S_PACK_LL_B32_B16, Opcode::PackLowLowU16}, + {Decoder::Opcode::S_PACK_LH_B32_B16, Opcode::PackLowHighU16}, + {Decoder::Opcode::S_PACK_HH_B32_B16, Opcode::PackHighHighU16}, + {Decoder::Opcode::S_CMP_EQ_I32, Opcode::CompareEqI32}, + {Decoder::Opcode::S_CMP_LG_I32, Opcode::CompareNeI32}, + {Decoder::Opcode::S_CMP_GT_I32, Opcode::CompareGtI32}, + {Decoder::Opcode::S_CMP_GE_I32, Opcode::CompareGeI32}, + {Decoder::Opcode::S_CMP_LT_I32, Opcode::CompareLtI32}, + {Decoder::Opcode::S_CMP_LE_I32, Opcode::CompareLeI32}, + {Decoder::Opcode::S_CMP_EQ_U32, Opcode::CompareEqU32}, + {Decoder::Opcode::S_CMP_LG_U32, Opcode::CompareNeU32}, + {Decoder::Opcode::S_CMP_GT_U32, Opcode::CompareGtU32}, + {Decoder::Opcode::S_CMP_GE_U32, Opcode::CompareGeU32}, + {Decoder::Opcode::S_CMP_LT_U32, Opcode::CompareLtU32}, + {Decoder::Opcode::S_CMP_LE_U32, Opcode::CompareLeU32}, + {Decoder::Opcode::S_CMP_EQ_U64, Opcode::CompareEqU64}, + {Decoder::Opcode::S_CMP_LG_U64, Opcode::CompareNeU64}, + {Decoder::Opcode::V_READFIRSTLANE_B32, Opcode::ReadFirstLaneU32}, + {Decoder::Opcode::V_READLANE_B32, Opcode::ReadLaneU32}, + {Decoder::Opcode::V_WRITELANE_B32, Opcode::WriteLaneU32}, + {Decoder::Opcode::V_PERMLANE16_B32, Opcode::Permlane16B32}, + {Decoder::Opcode::V_PERMLANEX16_B32, Opcode::Permlanex16B32}, + {Decoder::Opcode::V_CVT_F32_I32, Opcode::ConvertI32ToF32}, + {Decoder::Opcode::V_CVT_F32_U32, Opcode::ConvertU32ToF32}, + {Decoder::Opcode::V_CVT_U32_F32, Opcode::ConvertF32ToU32}, + {Decoder::Opcode::V_CVT_I32_F32, Opcode::ConvertF32ToI32}, + {Decoder::Opcode::V_CVT_F16_F32, Opcode::ConvertF32ToF16}, + {Decoder::Opcode::V_CVT_F32_F16, Opcode::ConvertF16ToF32}, + {Decoder::Opcode::V_CVT_F16_U16, Opcode::ConvertU16ToF16}, + {Decoder::Opcode::V_CVT_U16_F16, Opcode::ConvertF16ToU16}, + {Decoder::Opcode::V_CVT_F16_I16, Opcode::ConvertI16ToF16}, + {Decoder::Opcode::V_CVT_I16_F16, Opcode::ConvertF16ToI16}, + {Decoder::Opcode::V_CVT_RPI_I32_F32, Opcode::ConvertRoundPlusInfF32ToI32}, + {Decoder::Opcode::V_CVT_FLR_I32_F32, Opcode::ConvertFloorF32ToI32}, + {Decoder::Opcode::V_FREXP_EXP_I32_F32, Opcode::FrexpExpI32F32}, + {Decoder::Opcode::V_FREXP_MANT_F32, Opcode::FrexpMantF32}, + {Decoder::Opcode::V_CVT_OFF_F32_I4, Opcode::ConvertI4ToOffsetF32}, + {Decoder::Opcode::V_RCP_F32, Opcode::RcpF32}, + {Decoder::Opcode::V_RCP_IFLAG_F32, Opcode::RcpIflagF32}, + {Decoder::Opcode::V_FRACT_F32, Opcode::FractF32}, + {Decoder::Opcode::V_TRUNC_F32, Opcode::TruncF32}, + {Decoder::Opcode::V_CEIL_F32, Opcode::CeilF32}, + {Decoder::Opcode::V_RNDNE_F32, Opcode::RoundEvenF32}, + {Decoder::Opcode::V_FLOOR_F32, Opcode::FloorF32}, + {Decoder::Opcode::V_EXP_F32, Opcode::Exp2F32}, + {Decoder::Opcode::V_LOG_F32, Opcode::Log2F32}, + {Decoder::Opcode::V_RSQ_F32, Opcode::InverseSqrtF32}, + {Decoder::Opcode::V_SQRT_F32, Opcode::SqrtF32}, + {Decoder::Opcode::V_RCP_F16, Opcode::RcpF16}, + {Decoder::Opcode::V_SQRT_F16, Opcode::SqrtF16}, + {Decoder::Opcode::V_RSQ_F16, Opcode::InverseSqrtF16}, + {Decoder::Opcode::V_LOG_F16, Opcode::Log2F16}, + {Decoder::Opcode::V_EXP_F16, Opcode::Exp2F16}, + {Decoder::Opcode::V_FLOOR_F16, Opcode::FloorF16}, + {Decoder::Opcode::V_CEIL_F16, Opcode::CeilF16}, + {Decoder::Opcode::V_TRUNC_F16, Opcode::TruncF16}, + {Decoder::Opcode::V_RNDNE_F16, Opcode::RoundEvenF16}, + {Decoder::Opcode::V_SIN_F32, Opcode::SinF32}, + {Decoder::Opcode::V_COS_F32, Opcode::CosF32}, + {Decoder::Opcode::V_NOT_B32, Opcode::BitwiseNotU32}, + {Decoder::Opcode::V_BFREV_B32, Opcode::BitReverseU32}, + {Decoder::Opcode::V_FFBL_B32, Opcode::FindLsbU32}, + {Decoder::Opcode::V_FFBH_U32, Opcode::FindMsbFromHighU32}, + {Decoder::Opcode::V_ADD_F32, Opcode::FAddF32}, + {Decoder::Opcode::V_SUB_F32, Opcode::FSubF32}, + {Decoder::Opcode::V_SUBREV_F32, Opcode::FSubF32}, + {Decoder::Opcode::V_MUL_F32, Opcode::FMulF32}, + {Decoder::Opcode::V_MAC_F32, Opcode::FMadF32}, + {Decoder::Opcode::V_MADMK_F32, Opcode::FMadF32}, + {Decoder::Opcode::V_MADAK_F32, Opcode::FMadF32}, + {Decoder::Opcode::V_MIN_F32, Opcode::FMinF32}, + {Decoder::Opcode::V_MAX_F32, Opcode::FMaxF32}, + {Decoder::Opcode::V_MIN_I32, Opcode::IMinI32}, + {Decoder::Opcode::V_MAX_I32, Opcode::IMaxI32}, + {Decoder::Opcode::V_MAD_F32, Opcode::FMadF32}, + {Decoder::Opcode::V_MAD_I32_I24, Opcode::IMadI24U32}, + {Decoder::Opcode::V_MAD_U32_U24, Opcode::UMadU24U32}, + {Decoder::Opcode::V_CUBEID_F32, Opcode::CubeIdF32}, + {Decoder::Opcode::V_CUBESC_F32, Opcode::CubeScF32}, + {Decoder::Opcode::V_CUBETC_F32, Opcode::CubeTcF32}, + {Decoder::Opcode::V_CUBEMA_F32, Opcode::CubeMaF32}, + {Decoder::Opcode::V_FMA_F32, Opcode::FMadF32}, + {Decoder::Opcode::V_BFE_U32, Opcode::BitFieldExtract3U32}, + {Decoder::Opcode::V_BFE_I32, Opcode::BitFieldExtract3I32}, + {Decoder::Opcode::V_BFI_B32, Opcode::BitFieldInsertSelectU32}, + {Decoder::Opcode::V_ALIGNBIT_B32, Opcode::AlignBitU32}, + {Decoder::Opcode::V_ALIGNBYTE_B32, Opcode::AlignByteU32}, + {Decoder::Opcode::V_MIN3_F32, Opcode::FMin3F32}, + {Decoder::Opcode::V_MIN3_I32, Opcode::IMin3I32}, + {Decoder::Opcode::V_MIN3_U32, Opcode::UMin3U32}, + {Decoder::Opcode::V_MIN3_F16, Opcode::Min3F16}, + {Decoder::Opcode::V_MAX3_F32, Opcode::FMax3F32}, + {Decoder::Opcode::V_MAX3_I32, Opcode::IMax3I32}, + {Decoder::Opcode::V_MAX3_U32, Opcode::UMax3U32}, + {Decoder::Opcode::V_MAX3_F16, Opcode::Max3F16}, + {Decoder::Opcode::V_MED3_F32, Opcode::FMed3F32}, + {Decoder::Opcode::V_MED3_I32, Opcode::IMed3I32}, + {Decoder::Opcode::V_MED3_U32, Opcode::UMed3U32}, + {Decoder::Opcode::V_MED3_F16, Opcode::Med3F16}, + {Decoder::Opcode::V_MED3_I16, Opcode::IMed3I16}, + {Decoder::Opcode::V_SAD_U32, Opcode::SadU32}, + {Decoder::Opcode::V_ADD3_U32, Opcode::IAdd3U32}, + {Decoder::Opcode::V_LSHL_ADD_U32, Opcode::ShiftLeftAddU32}, + {Decoder::Opcode::V_ADD_LSHL_U32, Opcode::AddShiftLeftU32}, + {Decoder::Opcode::V_XAD_U32, Opcode::XorAddU32}, + {Decoder::Opcode::V_LSHL_OR_B32, Opcode::ShiftLeftOrU32}, + {Decoder::Opcode::V_AND_OR_B32, Opcode::BitwiseAndOrU32}, + {Decoder::Opcode::V_OR3_B32, Opcode::BitwiseOr3U32}, + {Decoder::Opcode::V_XOR3_B32, Opcode::BitwiseXor3U32}, + {Decoder::Opcode::V_ADD_NC_U32, Opcode::IAddU32}, + {Decoder::Opcode::V_SUB_NC_U32, Opcode::ISubU32}, + {Decoder::Opcode::V_SUBREV_NC_U32, Opcode::ISubU32}, + {Decoder::Opcode::V_ADD_NC_U16, Opcode::IAddU16}, + {Decoder::Opcode::V_SUB_NC_U16, Opcode::ISubI16}, + {Decoder::Opcode::V_MAX_U16, Opcode::UMaxU16}, + {Decoder::Opcode::V_MAX_I16, Opcode::IMaxI16}, + {Decoder::Opcode::V_MIN_U16, Opcode::UMinU16}, + {Decoder::Opcode::V_MIN_I16, Opcode::IMinI16}, + {Decoder::Opcode::V_ADD_NC_I16, Opcode::IAddU16}, + {Decoder::Opcode::V_SUB_NC_I16, Opcode::ISubI16}, + {Decoder::Opcode::V_MUL_I32_I24, Opcode::IMulI24U32}, + {Decoder::Opcode::V_MUL_U32_U24, Opcode::UMulU24U32}, + {Decoder::Opcode::V_MUL_LO_U32, Opcode::IMulU32}, + {Decoder::Opcode::V_MUL_HI_U32, Opcode::UMulHighU32}, + {Decoder::Opcode::V_MUL_LO_I32, Opcode::IMulU32}, + {Decoder::Opcode::V_MUL_HI_I32, Opcode::SMulHighI32}, + {Decoder::Opcode::V_ADD_I32, Opcode::IAddU32}, + {Decoder::Opcode::V_SUB_I32, Opcode::ISubU32}, + {Decoder::Opcode::V_SUBREV_I32, Opcode::ISubU32}, + {Decoder::Opcode::V_BFM_B32, Opcode::BitFieldMaskU32}, + {Decoder::Opcode::V_CVT_PKRTZ_F16_F32, Opcode::PackF32ToF16Rtz}, + {Decoder::Opcode::V_LDEXP_F32, Opcode::LdexpF32}, + {Decoder::Opcode::V_CVT_PKNORM_I16_F32, Opcode::PackSnorm2x16F32}, + {Decoder::Opcode::V_CVT_PKNORM_U16_F32, Opcode::PackUnorm2x16F32}, + {Decoder::Opcode::V_CVT_PK_U16_U32, Opcode::PackU16U32}, + {Decoder::Opcode::V_CVT_PK_I16_I32, Opcode::PackU16U32}, + {Decoder::Opcode::V_CVT_PK_U8_F32, Opcode::PackU8F32}, + {Decoder::Opcode::V_PACK_B32_F16, Opcode::PackB32F16}, + {Decoder::Opcode::V_PK_MAD_I16, Opcode::PackedMadI16}, + {Decoder::Opcode::V_PK_MUL_LO_U16, Opcode::PackedMulLoU16}, + {Decoder::Opcode::V_PK_ADD_I16, Opcode::PackedAddI16}, + {Decoder::Opcode::V_PK_SUB_I16, Opcode::PackedSubI16}, + {Decoder::Opcode::V_PK_LSHLREV_B16, Opcode::PackedLshlrevB16}, + {Decoder::Opcode::V_PK_LSHRREV_B16, Opcode::PackedLshrrevB16}, + {Decoder::Opcode::V_PK_ASHRREV_I16, Opcode::PackedAshrrevI16}, + {Decoder::Opcode::V_PK_MAX_I16, Opcode::PackedMaxI16}, + {Decoder::Opcode::V_PK_MIN_I16, Opcode::PackedMinI16}, + {Decoder::Opcode::V_PK_MAD_U16, Opcode::PackedMadU16}, + {Decoder::Opcode::V_PK_ADD_U16, Opcode::PackedAddU16}, + {Decoder::Opcode::V_PK_SUB_U16, Opcode::PackedSubU16}, + {Decoder::Opcode::V_PK_MAX_U16, Opcode::PackedMaxU16}, + {Decoder::Opcode::V_PK_MIN_U16, Opcode::PackedMinU16}, + {Decoder::Opcode::V_PK_ADD_F16, Opcode::PackedAddF16}, + {Decoder::Opcode::V_PK_MUL_F16, Opcode::PackedMulF16}, + {Decoder::Opcode::V_PK_MIN_F16, Opcode::PackedMinF16}, + {Decoder::Opcode::V_PK_MAX_F16, Opcode::PackedMaxF16}, + {Decoder::Opcode::V_PK_FMA_F16, Opcode::PackedFmaF16}, + {Decoder::Opcode::V_PK_FMAC_F16, Opcode::PackedFmaF16}, + {Decoder::Opcode::V_ADD_F16, Opcode::AddF16}, + {Decoder::Opcode::V_SUB_F16, Opcode::SubF16}, + {Decoder::Opcode::V_SUBREV_F16, Opcode::SubF16}, + {Decoder::Opcode::V_MUL_F16, Opcode::MulF16}, + {Decoder::Opcode::V_FMAC_F16, Opcode::FmaF16}, + {Decoder::Opcode::V_FMAMK_F16, Opcode::FmaF16}, + {Decoder::Opcode::V_FMAAK_F16, Opcode::FmaF16}, + {Decoder::Opcode::V_FMA_F16, Opcode::FmaF16}, + {Decoder::Opcode::V_MAD_MIXLO_F16, Opcode::MadMixF16}, + {Decoder::Opcode::V_MAD_MIXHI_F16, Opcode::MadMixF16}, + {Decoder::Opcode::V_AND_B32, Opcode::BitwiseAndU32}, + {Decoder::Opcode::V_OR_B32, Opcode::BitwiseOrU32}, + {Decoder::Opcode::V_XOR_B32, Opcode::BitwiseXorU32}, + {Decoder::Opcode::V_XNOR_B32, Opcode::BitwiseXnorU32}, + {Decoder::Opcode::V_BCNT_U32_B32, Opcode::BitCountAddU32}, + {Decoder::Opcode::V_MBCNT_LO_U32_B32, Opcode::MaskedBitCountLowU32}, + {Decoder::Opcode::V_MBCNT_HI_U32_B32, Opcode::MaskedBitCountHighU32}, + {Decoder::Opcode::V_LSHL_B32, Opcode::ShiftLeftLogicalU32}, + {Decoder::Opcode::V_LSHLREV_B32, Opcode::ShiftLeftLogicalU32}, + {Decoder::Opcode::V_LSHLREV_B16, Opcode::ShiftLeftLogicalU16}, + {Decoder::Opcode::V_LSHR_B32, Opcode::ShiftRightLogicalU32}, + {Decoder::Opcode::V_LSHRREV_B32, Opcode::ShiftRightLogicalU32}, + {Decoder::Opcode::V_LSHRREV_B16, Opcode::ShiftRightLogicalU16}, + {Decoder::Opcode::V_ASHR_I32, Opcode::ShiftRightArithmeticI32}, + {Decoder::Opcode::V_ASHRREV_I32, Opcode::ShiftRightArithmeticI32}, + {Decoder::Opcode::V_ASHRREV_I16, Opcode::ShiftRightArithmeticI16}, + {Decoder::Opcode::V_MIN_U32, Opcode::UMinU32}, + {Decoder::Opcode::V_MAX_U32, Opcode::UMaxU32}, + {Decoder::Opcode::V_MAX_F16, Opcode::MaxF16}, + {Decoder::Opcode::V_MIN_F16, Opcode::MinF16}, + {Decoder::Opcode::V_CMP_F_F32, Opcode::CompareFalse}, + {Decoder::Opcode::V_CMP_LT_F32, Opcode::CompareLtF32}, + {Decoder::Opcode::V_CMP_EQ_F32, Opcode::CompareEqF32}, + {Decoder::Opcode::V_CMP_LE_F32, Opcode::CompareLeF32}, + {Decoder::Opcode::V_CMP_GT_F32, Opcode::CompareGtF32}, + {Decoder::Opcode::V_CMP_LG_F32, Opcode::CompareNeF32}, + {Decoder::Opcode::V_CMP_GE_F32, Opcode::CompareGeF32}, + {Decoder::Opcode::V_CMP_O_F32, Opcode::CompareOrderedF32}, + {Decoder::Opcode::V_CMP_U_F32, Opcode::CompareUnorderedF32}, + {Decoder::Opcode::V_CMP_NGE_F32, Opcode::CompareUnordLtF32}, + {Decoder::Opcode::V_CMP_NLG_F32, Opcode::CompareUnordEqF32}, + {Decoder::Opcode::V_CMP_NGT_F32, Opcode::CompareUnordLeF32}, + {Decoder::Opcode::V_CMP_NLE_F32, Opcode::CompareUnordGtF32}, + {Decoder::Opcode::V_CMP_NEQ_F32, Opcode::CompareUnordNeF32}, + {Decoder::Opcode::V_CMP_NLT_F32, Opcode::CompareUnordGeF32}, + {Decoder::Opcode::V_CMP_TRU_F32, Opcode::CompareTrue}, + {Decoder::Opcode::V_CMP_CLASS_F32, Opcode::CompareClassF32}, + {Decoder::Opcode::V_CMP_LT_F16, Opcode::CompareLtF16}, + {Decoder::Opcode::V_CMP_EQ_F16, Opcode::CompareEqF16}, + {Decoder::Opcode::V_CMP_LE_F16, Opcode::CompareLeF16}, + {Decoder::Opcode::V_CMP_GT_F16, Opcode::CompareGtF16}, + {Decoder::Opcode::V_CMP_LG_F16, Opcode::CompareNeF16}, + {Decoder::Opcode::V_CMP_GE_F16, Opcode::CompareGeF16}, + {Decoder::Opcode::V_CMP_NEQ_F16, Opcode::CompareUnordNeF16}, + {Decoder::Opcode::V_CMPX_LT_F16, Opcode::CompareMaskLtF16}, + {Decoder::Opcode::V_CMPX_EQ_F16, Opcode::CompareMaskEqF16}, + {Decoder::Opcode::V_CMPX_LE_F16, Opcode::CompareMaskLeF16}, + {Decoder::Opcode::V_CMPX_GT_F16, Opcode::CompareMaskGtF16}, + {Decoder::Opcode::V_CMPX_GE_F16, Opcode::CompareMaskGeF16}, + {Decoder::Opcode::V_CMPX_NEQ_F16, Opcode::CompareMaskUnordNeF16}, + {Decoder::Opcode::V_CMPX_NLT_F16, Opcode::CompareMaskUnordGeF16}, + {Decoder::Opcode::V_CMPX_LT_F32, Opcode::CompareMaskLtF32}, + {Decoder::Opcode::V_CMPX_EQ_F32, Opcode::CompareMaskEqF32}, + {Decoder::Opcode::V_CMPX_LE_F32, Opcode::CompareMaskLeF32}, + {Decoder::Opcode::V_CMPX_GT_F32, Opcode::CompareMaskGtF32}, + {Decoder::Opcode::V_CMPX_LG_F32, Opcode::CompareMaskNeF32}, + {Decoder::Opcode::V_CMPX_GE_F32, Opcode::CompareMaskGeF32}, + {Decoder::Opcode::V_CMPX_NGE_F32, Opcode::CompareMaskUnordLtF32}, + {Decoder::Opcode::V_CMPX_NLG_F32, Opcode::CompareMaskUnordEqF32}, + {Decoder::Opcode::V_CMPX_NGT_F32, Opcode::CompareMaskUnordLeF32}, + {Decoder::Opcode::V_CMPX_NLE_F32, Opcode::CompareMaskUnordGtF32}, + {Decoder::Opcode::V_CMPX_NEQ_F32, Opcode::CompareMaskUnordNeF32}, + {Decoder::Opcode::V_CMPX_NLT_F32, Opcode::CompareMaskUnordGeF32}, + {Decoder::Opcode::V_CMP_F_I32, Opcode::CompareFalse}, + {Decoder::Opcode::V_CMP_LT_I32, Opcode::CompareLtI32}, + {Decoder::Opcode::V_CMP_EQ_I32, Opcode::CompareEqI32}, + {Decoder::Opcode::V_CMP_LE_I32, Opcode::CompareLeI32}, + {Decoder::Opcode::V_CMP_GT_I32, Opcode::CompareGtI32}, + {Decoder::Opcode::V_CMP_NE_I32, Opcode::CompareNeI32}, + {Decoder::Opcode::V_CMP_GE_I32, Opcode::CompareGeI32}, + {Decoder::Opcode::V_CMP_T_I32, Opcode::CompareTrue}, + {Decoder::Opcode::V_CMP_LT_I16, Opcode::CompareLtI16}, + {Decoder::Opcode::V_CMP_EQ_I16, Opcode::CompareEqI16}, + {Decoder::Opcode::V_CMP_LE_I16, Opcode::CompareLeI16}, + {Decoder::Opcode::V_CMP_GT_I16, Opcode::CompareGtI16}, + {Decoder::Opcode::V_CMP_NE_I16, Opcode::CompareNeI16}, + {Decoder::Opcode::V_CMP_GE_I16, Opcode::CompareGeI16}, + {Decoder::Opcode::V_CMPX_LT_I32, Opcode::CompareMaskLtI32}, + {Decoder::Opcode::V_CMPX_EQ_I32, Opcode::CompareMaskEqI32}, + {Decoder::Opcode::V_CMPX_LE_I32, Opcode::CompareMaskLeI32}, + {Decoder::Opcode::V_CMPX_GT_I32, Opcode::CompareMaskGtI32}, + {Decoder::Opcode::V_CMPX_NE_I32, Opcode::CompareMaskNeI32}, + {Decoder::Opcode::V_CMPX_GE_I32, Opcode::CompareMaskGeI32}, + {Decoder::Opcode::V_CMP_LT_U16, Opcode::CompareLtU16}, + {Decoder::Opcode::V_CMP_EQ_U16, Opcode::CompareEqU16}, + {Decoder::Opcode::V_CMP_LE_U16, Opcode::CompareLeU16}, + {Decoder::Opcode::V_CMP_GT_U16, Opcode::CompareGtU16}, + {Decoder::Opcode::V_CMP_NE_U16, Opcode::CompareNeU16}, + {Decoder::Opcode::V_CMP_GE_U16, Opcode::CompareGeU16}, + {Decoder::Opcode::V_CMP_F_U32, Opcode::CompareFalse}, + {Decoder::Opcode::V_CMP_LT_U32, Opcode::CompareLtU32}, + {Decoder::Opcode::V_CMP_EQ_U32, Opcode::CompareEqU32}, + {Decoder::Opcode::V_CMP_LE_U32, Opcode::CompareLeU32}, + {Decoder::Opcode::V_CMP_GT_U32, Opcode::CompareGtU32}, + {Decoder::Opcode::V_CMP_NE_U32, Opcode::CompareNeU32}, + {Decoder::Opcode::V_CMP_GE_U32, Opcode::CompareGeU32}, + {Decoder::Opcode::V_CMP_T_U32, Opcode::CompareTrue}, + {Decoder::Opcode::V_CMP_EQ_I64, Opcode::CompareEqU64}, + {Decoder::Opcode::V_CMP_GT_U64, Opcode::CompareGtU64}, + {Decoder::Opcode::V_CMP_NE_U64, Opcode::CompareNeU64}, + {Decoder::Opcode::V_CMPX_LT_U32, Opcode::CompareMaskLtU32}, + {Decoder::Opcode::V_CMPX_EQ_U32, Opcode::CompareMaskEqU32}, + {Decoder::Opcode::V_CMPX_LE_U32, Opcode::CompareMaskLeU32}, + {Decoder::Opcode::V_CMPX_GT_U32, Opcode::CompareMaskGtU32}, + {Decoder::Opcode::V_CMPX_NE_U32, Opcode::CompareMaskNeU32}, + {Decoder::Opcode::V_CMPX_GE_U32, Opcode::CompareMaskGeU32}, + {Decoder::Opcode::S_LOAD_DWORD, Opcode::SLoadDword}, + {Decoder::Opcode::S_BUFFER_LOAD_DWORD, Opcode::SBufferLoadDword}, + {Decoder::Opcode::BUFFER_LOAD_DWORD, Opcode::BufferLoadDword}, + {Decoder::Opcode::BUFFER_LOAD_SBYTE, Opcode::BufferLoadSbyte}, + {Decoder::Opcode::BUFFER_LOAD_SSHORT, Opcode::BufferLoadSshort}, + {Decoder::Opcode::BUFFER_STORE_BYTE, Opcode::BufferStoreByte}, + {Decoder::Opcode::BUFFER_STORE_SHORT, Opcode::BufferStoreShort}, + {Decoder::Opcode::BUFFER_STORE_DWORD, Opcode::BufferStoreDword}, + {Decoder::Opcode::BUFFER_ATOMIC_SWAP, Opcode::AtomicSwapU32}, + {Decoder::Opcode::BUFFER_ATOMIC_ADD, Opcode::AtomicAddU32}, + {Decoder::Opcode::BUFFER_ATOMIC_SUB, Opcode::AtomicSubU32}, + {Decoder::Opcode::BUFFER_ATOMIC_SMIN, Opcode::AtomicSMinI32}, + {Decoder::Opcode::BUFFER_ATOMIC_UMIN, Opcode::AtomicUMinU32}, + {Decoder::Opcode::BUFFER_ATOMIC_SMAX, Opcode::AtomicSMaxI32}, + {Decoder::Opcode::BUFFER_ATOMIC_UMAX, Opcode::AtomicUMaxU32}, + {Decoder::Opcode::BUFFER_ATOMIC_AND, Opcode::AtomicAndU32}, + {Decoder::Opcode::BUFFER_ATOMIC_OR, Opcode::AtomicOrU32}, + {Decoder::Opcode::BUFFER_ATOMIC_XOR, Opcode::AtomicXorU32}, + {Decoder::Opcode::BUFFER_ATOMIC_FMIN, Opcode::AtomicFMinF32}, + {Decoder::Opcode::BUFFER_ATOMIC_FMAX, Opcode::AtomicFMaxF32}, + {Decoder::Opcode::FLAT_LOAD_UBYTE, Opcode::FlatLoadUbyte}, + {Decoder::Opcode::FLAT_LOAD_SBYTE, Opcode::FlatLoadSbyte}, + {Decoder::Opcode::FLAT_LOAD_SSHORT, Opcode::FlatLoadSshort}, + {Decoder::Opcode::FLAT_STORE_BYTE, Opcode::FlatStoreByte}, + {Decoder::Opcode::FLAT_STORE_SHORT, Opcode::FlatStoreShort}, + {Decoder::Opcode::FLAT_STORE_DWORD, Opcode::FlatStoreDword}, + {Decoder::Opcode::DS_ADD_U32, Opcode::AtomicAddU32}, + {Decoder::Opcode::DS_ADD_RTN_U32, Opcode::AtomicAddU32}, + {Decoder::Opcode::DS_SUB_U32, Opcode::AtomicSubU32}, + {Decoder::Opcode::DS_SUB_RTN_U32, Opcode::AtomicSubU32}, + {Decoder::Opcode::DS_MIN_I32, Opcode::AtomicSMinI32}, + {Decoder::Opcode::DS_MIN_RTN_I32, Opcode::AtomicSMinI32}, + {Decoder::Opcode::DS_MAX_I32, Opcode::AtomicSMaxI32}, + {Decoder::Opcode::DS_MAX_RTN_I32, Opcode::AtomicSMaxI32}, + {Decoder::Opcode::DS_MIN_U32, Opcode::AtomicUMinU32}, + {Decoder::Opcode::DS_MIN_RTN_U32, Opcode::AtomicUMinU32}, + {Decoder::Opcode::DS_MAX_U32, Opcode::AtomicUMaxU32}, + {Decoder::Opcode::DS_MAX_RTN_U32, Opcode::AtomicUMaxU32}, + {Decoder::Opcode::DS_AND_B32, Opcode::AtomicAndU32}, + {Decoder::Opcode::DS_AND_RTN_B32, Opcode::AtomicAndU32}, + {Decoder::Opcode::DS_OR_B32, Opcode::AtomicOrU32}, + {Decoder::Opcode::DS_OR_RTN_B32, Opcode::AtomicOrU32}, + {Decoder::Opcode::DS_XOR_B32, Opcode::AtomicXorU32}, + {Decoder::Opcode::DS_XOR_RTN_B32, Opcode::AtomicXorU32}, + {Decoder::Opcode::DS_WRXCHG_RTN_B32, Opcode::AtomicSwapU32}, + {Decoder::Opcode::DS_READ_I8, Opcode::DsReadSbyte}, + {Decoder::Opcode::DS_READ_U8, Opcode::DsReadUbyte}, + {Decoder::Opcode::DS_READ_I16, Opcode::DsReadSshort}, + {Decoder::Opcode::DS_READ_U16, Opcode::DsReadUshort}, + {Decoder::Opcode::DS_READ2_B32, Opcode::DsReadB32}, + {Decoder::Opcode::DS_READ_B32, Opcode::DsReadB32}, + {Decoder::Opcode::DS_READ_B64, Opcode::DsReadB32}, + {Decoder::Opcode::DS_READ2_B64, Opcode::DsReadB32}, + {Decoder::Opcode::DS_READ2ST64_B64, Opcode::DsReadB32}, + {Decoder::Opcode::DS_READ_B96, Opcode::DsReadB32}, + {Decoder::Opcode::DS_READ_B128, Opcode::DsReadB32}, + {Decoder::Opcode::DS_WRITE_B8, Opcode::DsWriteByte}, + {Decoder::Opcode::DS_WRITE_B16, Opcode::DsWriteShort}, + {Decoder::Opcode::DS_WRITE2_B32, Opcode::DsWriteB32}, + {Decoder::Opcode::DS_WRITE2ST64_B32, Opcode::DsWriteB32}, + {Decoder::Opcode::DS_WRITE2_B64, Opcode::DsWriteB32}, + {Decoder::Opcode::DS_WRITE2ST64_B64, Opcode::DsWriteB32}, + {Decoder::Opcode::DS_WRITE_B32, Opcode::DsWriteB32}, + {Decoder::Opcode::DS_WRITE_B64, Opcode::DsWriteB32}, + {Decoder::Opcode::DS_WRITE_B96, Opcode::DsWriteB32}, + {Decoder::Opcode::DS_WRITE_B128, Opcode::DsWriteB32}, + {Decoder::Opcode::DS_MIN_F32, Opcode::DsMinF32}, + {Decoder::Opcode::DS_MAX_F32, Opcode::DsMaxF32}, + {Decoder::Opcode::DS_CONSUME, Opcode::DsConsume}, + {Decoder::Opcode::DS_APPEND, Opcode::DsAppend}, + {Decoder::Opcode::DS_WRITE_ADDTID_B32, Opcode::DsWriteAddtidB32}, + {Decoder::Opcode::DS_READ_ADDTID_B32, Opcode::DsReadAddtidB32}, + {Decoder::Opcode::IMAGE_GET_RESINFO, Opcode::ImageGetResinfo}, + {Decoder::Opcode::IMAGE_GET_LOD, Opcode::ImageGetLod}, + {Decoder::Opcode::IMAGE_LOAD, Opcode::ImageLoad}, + {Decoder::Opcode::IMAGE_LOAD_MIP, Opcode::ImageLoad}, + {Decoder::Opcode::IMAGE_STORE, Opcode::ImageStore}, + {Decoder::Opcode::IMAGE_STORE_MIP, Opcode::ImageStore}, + {Decoder::Opcode::IMAGE_ATOMIC_ADD, Opcode::AtomicAddU32}, + {Decoder::Opcode::IMAGE_ATOMIC_UMIN, Opcode::AtomicUMinU32}, + {Decoder::Opcode::IMAGE_ATOMIC_UMAX, Opcode::AtomicUMaxU32}, + {Decoder::Opcode::IMAGE_ATOMIC_AND, Opcode::AtomicAndU32}, + {Decoder::Opcode::IMAGE_ATOMIC_OR, Opcode::AtomicOrU32}, + {Decoder::Opcode::IMAGE_ATOMIC_XOR, Opcode::AtomicXorU32}, + {Decoder::Opcode::IMAGE_SAMPLE, Opcode::ImageSample}, + {Decoder::Opcode::IMAGE_GATHER4_LZ, Opcode::ImageGather4}, + {Decoder::Opcode::IMAGE_GATHER4_C, Opcode::ImageGather4}, + {Decoder::Opcode::IMAGE_GATHER4_C_LZ, Opcode::ImageGather4}, + {Decoder::Opcode::IMAGE_GATHER4_LZ_O, Opcode::ImageGather4}, + {Decoder::Opcode::IMAGE_GATHER4_C_O, Opcode::ImageGather4}, + {Decoder::Opcode::IMAGE_GATHER4_C_LZ_O, Opcode::ImageGather4}, + {Decoder::Opcode::IMAGE_GATHER4H, Opcode::ImageGather4}, }; } // namespace @@ -456,80 +456,80 @@ std::optional LookupIrOpcode(Decoder::Opcode opcode) { bool IsReversedBinary(Decoder::Opcode opcode) { switch (opcode) { - case Decoder::Opcode::VSubrevF32: - case Decoder::Opcode::VSubrevF16: - case Decoder::Opcode::VSubrevNcU32: - case Decoder::Opcode::VLshlrevB32: - case Decoder::Opcode::VLshrrevB32: - case Decoder::Opcode::VAshrrevI32: - case Decoder::Opcode::VLshlrevB16: - case Decoder::Opcode::VLshrrevB16: - case Decoder::Opcode::VAshrrevI16: - case Decoder::Opcode::VSubrevI32: return true; + case Decoder::Opcode::V_SUBREV_F32: + case Decoder::Opcode::V_SUBREV_F16: + case Decoder::Opcode::V_SUBREV_NC_U32: + case Decoder::Opcode::V_LSHLREV_B32: + case Decoder::Opcode::V_LSHRREV_B32: + case Decoder::Opcode::V_ASHRREV_I32: + case Decoder::Opcode::V_LSHLREV_B16: + case Decoder::Opcode::V_LSHRREV_B16: + case Decoder::Opcode::V_ASHRREV_I16: + case Decoder::Opcode::V_SUBREV_I32: return true; default: return false; } } bool IsVectorCarryOutOpcode(Decoder::Opcode opcode) { switch (opcode) { - case Decoder::Opcode::VAddI32: - case Decoder::Opcode::VSubI32: - case Decoder::Opcode::VSubrevI32: return true; + case Decoder::Opcode::V_ADD_I32: + case Decoder::Opcode::V_SUB_I32: + case Decoder::Opcode::V_SUBREV_I32: return true; default: return false; } } bool ScalarResultWritesSccNonZero(Decoder::Opcode opcode) { switch (opcode) { - case Decoder::Opcode::SAbsI32: - case Decoder::Opcode::SBcnt1I32B32: - case Decoder::Opcode::SBcnt1I32B64: - case Decoder::Opcode::SAndB32: - case Decoder::Opcode::SAndn2B32: - case Decoder::Opcode::SOrB32: - case Decoder::Opcode::SOrn2B32: - case Decoder::Opcode::SXorB32: - case Decoder::Opcode::SNandB32: - case Decoder::Opcode::SNorB32: - case Decoder::Opcode::SXnorB32: - case Decoder::Opcode::SNotB32: - case Decoder::Opcode::SLshlB32: - case Decoder::Opcode::SLshrB32: - case Decoder::Opcode::SAshrI32: - case Decoder::Opcode::SBfeU32: - case Decoder::Opcode::SBfeI32: - case Decoder::Opcode::SAndB64: - case Decoder::Opcode::SAndn2B64: - case Decoder::Opcode::SNotB64: - case Decoder::Opcode::SOrB64: - case Decoder::Opcode::SOrn2B64: - case Decoder::Opcode::SXorB64: - case Decoder::Opcode::SNandB64: - case Decoder::Opcode::SNorB64: - case Decoder::Opcode::SXnorB64: - case Decoder::Opcode::SLshlB64: - case Decoder::Opcode::SLshrB64: - case Decoder::Opcode::SBfeU64: - case Decoder::Opcode::SWqmB64: return true; + case Decoder::Opcode::S_ABS_I32: + case Decoder::Opcode::S_BCNT1_I32_B32: + case Decoder::Opcode::S_BCNT1_I32_B64: + case Decoder::Opcode::S_AND_B32: + case Decoder::Opcode::S_ANDN2_B32: + case Decoder::Opcode::S_OR_B32: + case Decoder::Opcode::S_ORN2_B32: + case Decoder::Opcode::S_XOR_B32: + case Decoder::Opcode::S_NAND_B32: + case Decoder::Opcode::S_NOR_B32: + case Decoder::Opcode::S_XNOR_B32: + case Decoder::Opcode::S_NOT_B32: + case Decoder::Opcode::S_LSHL_B32: + case Decoder::Opcode::S_LSHR_B32: + case Decoder::Opcode::S_ASHR_I32: + case Decoder::Opcode::S_BFE_U32: + case Decoder::Opcode::S_BFE_I32: + case Decoder::Opcode::S_AND_B64: + case Decoder::Opcode::S_ANDN2_B64: + case Decoder::Opcode::S_NOT_B64: + case Decoder::Opcode::S_OR_B64: + case Decoder::Opcode::S_ORN2_B64: + case Decoder::Opcode::S_XOR_B64: + case Decoder::Opcode::S_NAND_B64: + case Decoder::Opcode::S_NOR_B64: + case Decoder::Opcode::S_XNOR_B64: + case Decoder::Opcode::S_LSHL_B64: + case Decoder::Opcode::S_LSHR_B64: + case Decoder::Opcode::S_BFE_U64: + case Decoder::Opcode::S_WQM_B64: return true; default: return false; } } bool ScalarResultIs64Bit(Decoder::Opcode opcode) { switch (opcode) { - case Decoder::Opcode::SAndB64: - case Decoder::Opcode::SAndn2B64: - case Decoder::Opcode::SNotB64: - case Decoder::Opcode::SOrB64: - case Decoder::Opcode::SOrn2B64: - case Decoder::Opcode::SXorB64: - case Decoder::Opcode::SNandB64: - case Decoder::Opcode::SNorB64: - case Decoder::Opcode::SXnorB64: - case Decoder::Opcode::SLshlB64: - case Decoder::Opcode::SLshrB64: - case Decoder::Opcode::SBfeU64: - case Decoder::Opcode::SWqmB64: return true; + case Decoder::Opcode::S_AND_B64: + case Decoder::Opcode::S_ANDN2_B64: + case Decoder::Opcode::S_NOT_B64: + case Decoder::Opcode::S_OR_B64: + case Decoder::Opcode::S_ORN2_B64: + case Decoder::Opcode::S_XOR_B64: + case Decoder::Opcode::S_NAND_B64: + case Decoder::Opcode::S_NOR_B64: + case Decoder::Opcode::S_XNOR_B64: + case Decoder::Opcode::S_LSHL_B64: + case Decoder::Opcode::S_LSHR_B64: + case Decoder::Opcode::S_BFE_U64: + case Decoder::Opcode::S_WQM_B64: return true; default: return false; } } diff --git a/tests/ShaderRecompilerComputeTests.cpp b/tests/ShaderRecompilerComputeTests.cpp index c8761ce3d..9c27ce65f 100644 --- a/tests/ShaderRecompilerComputeTests.cpp +++ b/tests/ShaderRecompilerComputeTests.cpp @@ -1050,8 +1050,8 @@ CompiledShader CompileCase(const TestCase &test) { MakeNativeUserData(test.has_user_data ? &test.user_data : nullptr); const auto uses_image = std::any_of(test.opcodes.begin(), test.opcodes.end(), [](auto op) { - return op >= ShaderOpcode::ImageGetResinfo && - op <= ShaderOpcode::ImageGather4H; + return op >= ShaderOpcode::IMAGE_GET_RESINFO && + op <= ShaderOpcode::IMAGE_GATHER4H; }); if (uses_image && ((user_data[3] >> 28u) & 0xfu) == 0) { user_data[3] = static_cast(Prospero::ImageType::kColor2D) << 28u; @@ -10586,273 +10586,273 @@ CoverageClass ClassifyOpcode(ShaderOpcode opcode, } switch (opcode) { - case Opcode::SGetpcB64: - case Opcode::SSetpcB64: - case Opcode::SNop: - case Opcode::SWaitcnt: - case Opcode::SBarrier: - case Opcode::SBranch: - case Opcode::SCbranchScc0: - case Opcode::SCbranchScc1: - case Opcode::SCbranchVccz: - case Opcode::SCbranchVccnz: - case Opcode::SCbranchExecz: - case Opcode::SCbranchExecnz: - case Opcode::SSendmsg: - case Opcode::SSetregB32: - case Opcode::SSleep: - case Opcode::STtraceData: - case Opcode::SInstPrefetch: - case Opcode::SEndpgm: + case Opcode::S_GETPC_B64: + case Opcode::S_SETPC_B64: + case Opcode::S_NOP: + case Opcode::S_WAITCNT: + case Opcode::S_BARRIER: + case Opcode::S_BRANCH: + case Opcode::S_CBRANCH_SCC0: + case Opcode::S_CBRANCH_SCC1: + case Opcode::S_CBRANCH_VCCZ: + case Opcode::S_CBRANCH_VCCNZ: + case Opcode::S_CBRANCH_EXECZ: + case Opcode::S_CBRANCH_EXECNZ: + case Opcode::S_SENDMSG: + case Opcode::S_SETREG_B32: + case Opcode::S_SLEEP: + case Opcode::S_TTRACEDATA: + case Opcode::S_INST_PREFETCH: + case Opcode::S_ENDPGM: return CoverageClass::ControlOrMarker; - case Opcode::VAddF32: - case Opcode::VSubF32: - case Opcode::VSubrevF32: - case Opcode::VMulF32: - case Opcode::VMacF32: - case Opcode::VMadmkF32: - case Opcode::VMadakF32: - case Opcode::VMinF32: - case Opcode::VMaxF32: - case Opcode::VMadF32: - case Opcode::VFmaF32: - case Opcode::VMin3F32: - case Opcode::VMax3F32: - case Opcode::VMed3F32: - case Opcode::VDot2cF32F16: - case Opcode::VCvtF32I32: - case Opcode::VCvtF32U32: - case Opcode::VCvtU32F32: - case Opcode::VCvtI32F32: - case Opcode::VCvtF16F32: - case Opcode::VCvtF32F16: - case Opcode::VCvtU16F16: - case Opcode::VCvtRpiI32F32: - case Opcode::VCvtFlrI32F32: - case Opcode::VCvtOffF32I4: - case Opcode::VCvtF32Ubyte0: - case Opcode::VCvtF32Ubyte1: - case Opcode::VCvtF32Ubyte2: - case Opcode::VCvtF32Ubyte3: - case Opcode::VRcpF32: - case Opcode::VFractF32: - case Opcode::VTruncF32: - case Opcode::VCeilF32: - case Opcode::VRndneF32: - case Opcode::VFloorF32: - case Opcode::VExpF32: - case Opcode::VLogF32: - case Opcode::VRsqF32: - case Opcode::VSqrtF32: - case Opcode::VSinF32: - case Opcode::VCosF32: - case Opcode::VCubeidF32: - case Opcode::VCubescF32: - case Opcode::VCubetcF32: - case Opcode::VCubemaF32: - case Opcode::VLdexpF32: - case Opcode::VCvtPkU8F32: - case Opcode::VCvtPknormI16F32: - case Opcode::VCvtPknormU16F32: - case Opcode::VCvtPkrtzF16F32: - case Opcode::VPkAddF16: - case Opcode::VPkMulF16: - case Opcode::VPkMinF16: - case Opcode::VPkMaxF16: - case Opcode::VPkFmaF16: - case Opcode::VAddF16: - case Opcode::VSubF16: - case Opcode::VSubrevF16: - case Opcode::VMulF16: - case Opcode::VMaxF16: - case Opcode::VMinF16: - case Opcode::VMin3F16: - case Opcode::VMax3F16: - case Opcode::VMed3F16: - case Opcode::VRcpF16: - case Opcode::VRsqF16: - case Opcode::VLogF16: - case Opcode::VExpF16: - case Opcode::VMadMixloF16: - case Opcode::VMadMixhiF16: - case Opcode::DsMinF32: - case Opcode::DsMaxF32: - case Opcode::VCmpFF32: - case Opcode::VCmpLtF32: - case Opcode::VCmpEqF32: - case Opcode::VCmpLeF32: - case Opcode::VCmpGtF32: - case Opcode::VCmpLgF32: - case Opcode::VCmpGeF32: - case Opcode::VCmpOF32: - case Opcode::VCmpUF32: - case Opcode::VCmpNgeF32: - case Opcode::VCmpNlgF32: - case Opcode::VCmpNgtF32: - case Opcode::VCmpNleF32: - case Opcode::VCmpNeqF32: - case Opcode::VCmpNltF32: - case Opcode::VCmpTruF32: - case Opcode::VCmpxLtF32: - case Opcode::VCmpxEqF32: - case Opcode::VCmpxLeF32: - case Opcode::VCmpxGtF32: - case Opcode::VCmpxLgF32: - case Opcode::VCmpxGeF32: - case Opcode::VCmpxNgeF32: - case Opcode::VCmpxNlgF32: - case Opcode::VCmpxNgtF32: - case Opcode::VCmpxNleF32: - case Opcode::VCmpxNeqF32: - case Opcode::VCmpxNltF32: - case Opcode::VCmpClassF32: - case Opcode::VCmpLtF16: - case Opcode::VCmpEqF16: - case Opcode::VCmpLeF16: - case Opcode::VCmpGtF16: - case Opcode::VCmpLgF16: - case Opcode::VCmpGeF16: - case Opcode::VCmpNeqF16: - case Opcode::VCmpxLtF16: - case Opcode::VCmpxEqF16: - case Opcode::VCmpxLeF16: - case Opcode::VCmpxGtF16: - case Opcode::VCmpxGeF16: - case Opcode::VCmpxNeqF16: - case Opcode::VCmpxNltF16: + case Opcode::V_ADD_F32: + case Opcode::V_SUB_F32: + case Opcode::V_SUBREV_F32: + case Opcode::V_MUL_F32: + case Opcode::V_MAC_F32: + case Opcode::V_MADMK_F32: + case Opcode::V_MADAK_F32: + case Opcode::V_MIN_F32: + case Opcode::V_MAX_F32: + case Opcode::V_MAD_F32: + case Opcode::V_FMA_F32: + case Opcode::V_MIN3_F32: + case Opcode::V_MAX3_F32: + case Opcode::V_MED3_F32: + case Opcode::V_DOT2C_F32_F16: + case Opcode::V_CVT_F32_I32: + case Opcode::V_CVT_F32_U32: + case Opcode::V_CVT_U32_F32: + case Opcode::V_CVT_I32_F32: + case Opcode::V_CVT_F16_F32: + case Opcode::V_CVT_F32_F16: + case Opcode::V_CVT_U16_F16: + case Opcode::V_CVT_RPI_I32_F32: + case Opcode::V_CVT_FLR_I32_F32: + case Opcode::V_CVT_OFF_F32_I4: + case Opcode::V_CVT_F32_UBYTE0: + case Opcode::V_CVT_F32_UBYTE1: + case Opcode::V_CVT_F32_UBYTE2: + case Opcode::V_CVT_F32_UBYTE3: + case Opcode::V_RCP_F32: + case Opcode::V_FRACT_F32: + case Opcode::V_TRUNC_F32: + case Opcode::V_CEIL_F32: + case Opcode::V_RNDNE_F32: + case Opcode::V_FLOOR_F32: + case Opcode::V_EXP_F32: + case Opcode::V_LOG_F32: + case Opcode::V_RSQ_F32: + case Opcode::V_SQRT_F32: + case Opcode::V_SIN_F32: + case Opcode::V_COS_F32: + case Opcode::V_CUBEID_F32: + case Opcode::V_CUBESC_F32: + case Opcode::V_CUBETC_F32: + case Opcode::V_CUBEMA_F32: + case Opcode::V_LDEXP_F32: + case Opcode::V_CVT_PK_U8_F32: + case Opcode::V_CVT_PKNORM_I16_F32: + case Opcode::V_CVT_PKNORM_U16_F32: + case Opcode::V_CVT_PKRTZ_F16_F32: + case Opcode::V_PK_ADD_F16: + case Opcode::V_PK_MUL_F16: + case Opcode::V_PK_MIN_F16: + case Opcode::V_PK_MAX_F16: + case Opcode::V_PK_FMA_F16: + case Opcode::V_ADD_F16: + case Opcode::V_SUB_F16: + case Opcode::V_SUBREV_F16: + case Opcode::V_MUL_F16: + case Opcode::V_MAX_F16: + case Opcode::V_MIN_F16: + case Opcode::V_MIN3_F16: + case Opcode::V_MAX3_F16: + case Opcode::V_MED3_F16: + case Opcode::V_RCP_F16: + case Opcode::V_RSQ_F16: + case Opcode::V_LOG_F16: + case Opcode::V_EXP_F16: + case Opcode::V_MAD_MIXLO_F16: + case Opcode::V_MAD_MIXHI_F16: + case Opcode::DS_MIN_F32: + case Opcode::DS_MAX_F32: + case Opcode::V_CMP_F_F32: + case Opcode::V_CMP_LT_F32: + case Opcode::V_CMP_EQ_F32: + case Opcode::V_CMP_LE_F32: + case Opcode::V_CMP_GT_F32: + case Opcode::V_CMP_LG_F32: + case Opcode::V_CMP_GE_F32: + case Opcode::V_CMP_O_F32: + case Opcode::V_CMP_U_F32: + case Opcode::V_CMP_NGE_F32: + case Opcode::V_CMP_NLG_F32: + case Opcode::V_CMP_NGT_F32: + case Opcode::V_CMP_NLE_F32: + case Opcode::V_CMP_NEQ_F32: + case Opcode::V_CMP_NLT_F32: + case Opcode::V_CMP_TRU_F32: + case Opcode::V_CMPX_LT_F32: + case Opcode::V_CMPX_EQ_F32: + case Opcode::V_CMPX_LE_F32: + case Opcode::V_CMPX_GT_F32: + case Opcode::V_CMPX_LG_F32: + case Opcode::V_CMPX_GE_F32: + case Opcode::V_CMPX_NGE_F32: + case Opcode::V_CMPX_NLG_F32: + case Opcode::V_CMPX_NGT_F32: + case Opcode::V_CMPX_NLE_F32: + case Opcode::V_CMPX_NEQ_F32: + case Opcode::V_CMPX_NLT_F32: + case Opcode::V_CMP_CLASS_F32: + case Opcode::V_CMP_LT_F16: + case Opcode::V_CMP_EQ_F16: + case Opcode::V_CMP_LE_F16: + case Opcode::V_CMP_GT_F16: + case Opcode::V_CMP_LG_F16: + case Opcode::V_CMP_GE_F16: + case Opcode::V_CMP_NEQ_F16: + case Opcode::V_CMPX_LT_F16: + case Opcode::V_CMPX_EQ_F16: + case Opcode::V_CMPX_LE_F16: + case Opcode::V_CMPX_GT_F16: + case Opcode::V_CMPX_GE_F16: + case Opcode::V_CMPX_NEQ_F16: + case Opcode::V_CMPX_NLT_F16: return CoverageClass::NeedsFloatCase; - case Opcode::SLoadDword: - case Opcode::SLoadDwordx2: - case Opcode::SLoadDwordx4: - case Opcode::SLoadDwordx8: - case Opcode::SLoadDwordx16: - case Opcode::SBufferLoadDword: - case Opcode::SBufferLoadDwordx2: - case Opcode::SBufferLoadDwordx4: - case Opcode::SBufferLoadDwordx8: - case Opcode::SBufferLoadDwordx16: - case Opcode::BufferLoadFormatX: - case Opcode::BufferLoadFormatXy: - case Opcode::BufferLoadFormatXyz: - case Opcode::BufferLoadFormatXyzw: - case Opcode::BufferStoreFormatX: - case Opcode::BufferStoreFormatXy: - case Opcode::BufferStoreFormatXyz: - case Opcode::BufferStoreFormatXyzw: - case Opcode::BufferLoadUbyte: - case Opcode::BufferLoadSbyte: - case Opcode::BufferLoadUshort: - case Opcode::BufferLoadSshort: - case Opcode::BufferLoadDwordx2: - case Opcode::BufferLoadDwordx3: - case Opcode::BufferLoadDwordx4: - case Opcode::BufferStoreByte: - case Opcode::BufferStoreShort: - case Opcode::BufferStoreDwordx2: - case Opcode::BufferStoreDwordx3: - case Opcode::BufferStoreDwordx4: - case Opcode::TBufferLoadFormatX: - case Opcode::TBufferLoadFormatXy: - case Opcode::TBufferLoadFormatXyz: - case Opcode::TBufferLoadFormatXyzw: - case Opcode::TBufferStoreFormatX: - case Opcode::TBufferStoreFormatXy: - case Opcode::TBufferStoreFormatXyz: - case Opcode::TBufferStoreFormatXyzw: - case Opcode::BufferAtomicSwap: - case Opcode::BufferAtomicAdd: - case Opcode::BufferAtomicSub: - case Opcode::BufferAtomicSMin: - case Opcode::BufferAtomicUMin: - case Opcode::BufferAtomicSMax: - case Opcode::BufferAtomicUMax: - case Opcode::BufferAtomicAnd: - case Opcode::BufferAtomicOr: - case Opcode::BufferAtomicXor: - case Opcode::BufferAtomicFMin: - case Opcode::BufferAtomicFMax: - case Opcode::FlatLoadUbyte: - case Opcode::FlatLoadSbyte: - case Opcode::FlatLoadUshort: - case Opcode::FlatLoadSshort: - case Opcode::FlatLoadDword: - case Opcode::FlatLoadDwordx2: - case Opcode::FlatLoadDwordx3: - case Opcode::FlatLoadDwordx4: - case Opcode::FlatStoreByte: - case Opcode::FlatStoreShort: - case Opcode::FlatStoreDword: - case Opcode::FlatStoreDwordx2: - case Opcode::FlatStoreDwordx3: - case Opcode::FlatStoreDwordx4: - case Opcode::DsAddU32: - case Opcode::DsAddRtnU32: - case Opcode::DsSubU32: - case Opcode::DsSubRtnU32: - case Opcode::DsMinI32: - case Opcode::DsMinRtnI32: - case Opcode::DsMaxI32: - case Opcode::DsMaxRtnI32: - case Opcode::DsMinU32: - case Opcode::DsMinRtnU32: - case Opcode::DsMaxU32: - case Opcode::DsMaxRtnU32: - case Opcode::DsAndB32: - case Opcode::DsAndRtnB32: - case Opcode::DsOrB32: - case Opcode::DsOrRtnB32: - case Opcode::DsXorB32: - case Opcode::DsXorRtnB32: - case Opcode::DsWrxchgRtnB32: - case Opcode::DsSwizzleB32: - case Opcode::DsReadSbyte: - case Opcode::DsReadUbyte: - case Opcode::DsReadSshort: - case Opcode::DsReadUshort: - case Opcode::DsRead2B32: - case Opcode::DsReadB32: - case Opcode::DsReadB64: - case Opcode::DsRead2B64: - case Opcode::DsReadB96: - case Opcode::DsReadB128: - case Opcode::DsWriteByte: - case Opcode::DsWriteShort: - case Opcode::DsWrite2B32: - case Opcode::DsWrite2St64B32: - case Opcode::DsWriteB32: - case Opcode::DsWriteB64: - case Opcode::DsWriteB96: - case Opcode::DsWriteB128: - case Opcode::DsWriteAddtidB32: - case Opcode::DsReadAddtidB32: + case Opcode::S_LOAD_DWORD: + case Opcode::S_LOAD_DWORDX2: + case Opcode::S_LOAD_DWORDX4: + case Opcode::S_LOAD_DWORDX8: + case Opcode::S_LOAD_DWORDX16: + case Opcode::S_BUFFER_LOAD_DWORD: + case Opcode::S_BUFFER_LOAD_DWORDX2: + case Opcode::S_BUFFER_LOAD_DWORDX4: + case Opcode::S_BUFFER_LOAD_DWORDX8: + case Opcode::S_BUFFER_LOAD_DWORDX16: + case Opcode::BUFFER_LOAD_FORMAT_X: + case Opcode::BUFFER_LOAD_FORMAT_XY: + case Opcode::BUFFER_LOAD_FORMAT_XYZ: + case Opcode::BUFFER_LOAD_FORMAT_XYZW: + case Opcode::BUFFER_STORE_FORMAT_X: + case Opcode::BUFFER_STORE_FORMAT_XY: + case Opcode::BUFFER_STORE_FORMAT_XYZ: + case Opcode::BUFFER_STORE_FORMAT_XYZW: + case Opcode::BUFFER_LOAD_UBYTE: + case Opcode::BUFFER_LOAD_SBYTE: + case Opcode::BUFFER_LOAD_USHORT: + case Opcode::BUFFER_LOAD_SSHORT: + case Opcode::BUFFER_LOAD_DWORDX2: + case Opcode::BUFFER_LOAD_DWORDX3: + case Opcode::BUFFER_LOAD_DWORDX4: + case Opcode::BUFFER_STORE_BYTE: + case Opcode::BUFFER_STORE_SHORT: + case Opcode::BUFFER_STORE_DWORDX2: + case Opcode::BUFFER_STORE_DWORDX3: + case Opcode::BUFFER_STORE_DWORDX4: + case Opcode::TBUFFER_LOAD_FORMAT_X: + case Opcode::TBUFFER_LOAD_FORMAT_XY: + case Opcode::TBUFFER_LOAD_FORMAT_XYZ: + case Opcode::TBUFFER_LOAD_FORMAT_XYZW: + case Opcode::TBUFFER_STORE_FORMAT_X: + case Opcode::TBUFFER_STORE_FORMAT_XY: + case Opcode::TBUFFER_STORE_FORMAT_XYZ: + case Opcode::TBUFFER_STORE_FORMAT_XYZW: + case Opcode::BUFFER_ATOMIC_SWAP: + case Opcode::BUFFER_ATOMIC_ADD: + case Opcode::BUFFER_ATOMIC_SUB: + case Opcode::BUFFER_ATOMIC_SMIN: + case Opcode::BUFFER_ATOMIC_UMIN: + case Opcode::BUFFER_ATOMIC_SMAX: + case Opcode::BUFFER_ATOMIC_UMAX: + case Opcode::BUFFER_ATOMIC_AND: + case Opcode::BUFFER_ATOMIC_OR: + case Opcode::BUFFER_ATOMIC_XOR: + case Opcode::BUFFER_ATOMIC_FMIN: + case Opcode::BUFFER_ATOMIC_FMAX: + case Opcode::FLAT_LOAD_UBYTE: + case Opcode::FLAT_LOAD_SBYTE: + case Opcode::FLAT_LOAD_USHORT: + case Opcode::FLAT_LOAD_SSHORT: + case Opcode::FLAT_LOAD_DWORD: + case Opcode::FLAT_LOAD_DWORDX2: + case Opcode::FLAT_LOAD_DWORDX3: + case Opcode::FLAT_LOAD_DWORDX4: + case Opcode::FLAT_STORE_BYTE: + case Opcode::FLAT_STORE_SHORT: + case Opcode::FLAT_STORE_DWORD: + case Opcode::FLAT_STORE_DWORDX2: + case Opcode::FLAT_STORE_DWORDX3: + case Opcode::FLAT_STORE_DWORDX4: + case Opcode::DS_ADD_U32: + case Opcode::DS_ADD_RTN_U32: + case Opcode::DS_SUB_U32: + case Opcode::DS_SUB_RTN_U32: + case Opcode::DS_MIN_I32: + case Opcode::DS_MIN_RTN_I32: + case Opcode::DS_MAX_I32: + case Opcode::DS_MAX_RTN_I32: + case Opcode::DS_MIN_U32: + case Opcode::DS_MIN_RTN_U32: + case Opcode::DS_MAX_U32: + case Opcode::DS_MAX_RTN_U32: + case Opcode::DS_AND_B32: + case Opcode::DS_AND_RTN_B32: + case Opcode::DS_OR_B32: + case Opcode::DS_OR_RTN_B32: + case Opcode::DS_XOR_B32: + case Opcode::DS_XOR_RTN_B32: + case Opcode::DS_WRXCHG_RTN_B32: + case Opcode::DS_SWIZZLE_B32: + case Opcode::DS_READ_I8: + case Opcode::DS_READ_U8: + case Opcode::DS_READ_I16: + case Opcode::DS_READ_U16: + case Opcode::DS_READ2_B32: + case Opcode::DS_READ_B32: + case Opcode::DS_READ_B64: + case Opcode::DS_READ2_B64: + case Opcode::DS_READ_B96: + case Opcode::DS_READ_B128: + case Opcode::DS_WRITE_B8: + case Opcode::DS_WRITE_B16: + case Opcode::DS_WRITE2_B32: + case Opcode::DS_WRITE2ST64_B32: + case Opcode::DS_WRITE_B32: + case Opcode::DS_WRITE_B64: + case Opcode::DS_WRITE_B96: + case Opcode::DS_WRITE_B128: + case Opcode::DS_WRITE_ADDTID_B32: + case Opcode::DS_READ_ADDTID_B32: return CoverageClass::NeedsMemoryCase; - case Opcode::ImageGetResinfo: - case Opcode::ImageGetLod: - case Opcode::ImageLoad: - case Opcode::ImageLoadMip: - case Opcode::ImageStore: - case Opcode::ImageStoreMip: - case Opcode::ImageAtomicAdd: - case Opcode::ImageAtomicUMin: - case Opcode::ImageAtomicAnd: - case Opcode::ImageAtomicOr: - case Opcode::ImageAtomicXor: - case Opcode::ImageSample: - case Opcode::ImageGather4Lz: - case Opcode::ImageGather4C: - case Opcode::ImageGather4CLz: - case Opcode::ImageGather4LzO: - case Opcode::ImageGather4CO: - case Opcode::ImageGather4CLzO: + case Opcode::IMAGE_GET_RESINFO: + case Opcode::IMAGE_GET_LOD: + case Opcode::IMAGE_LOAD: + case Opcode::IMAGE_LOAD_MIP: + case Opcode::IMAGE_STORE: + case Opcode::IMAGE_STORE_MIP: + case Opcode::IMAGE_ATOMIC_ADD: + case Opcode::IMAGE_ATOMIC_UMIN: + case Opcode::IMAGE_ATOMIC_AND: + case Opcode::IMAGE_ATOMIC_OR: + case Opcode::IMAGE_ATOMIC_XOR: + case Opcode::IMAGE_SAMPLE: + case Opcode::IMAGE_GATHER4_LZ: + case Opcode::IMAGE_GATHER4_C: + case Opcode::IMAGE_GATHER4_C_LZ: + case Opcode::IMAGE_GATHER4_LZ_O: + case Opcode::IMAGE_GATHER4_C_O: + case Opcode::IMAGE_GATHER4_C_LZ_O: return CoverageClass::NeedsImageCase; - case Opcode::VInterpP1F32: - case Opcode::VInterpP2F32: - case Opcode::VInterpMovF32: - case Opcode::Exp: + case Opcode::V_INTERP_P1_F32: + case Opcode::V_INTERP_P2_F32: + case Opcode::V_INTERP_MOV_F32: + case Opcode::EXP: return CoverageClass::NeedsGraphicsStageCase; default: @@ -10889,8 +10889,8 @@ void PrintPendingOpcodes(CoverageClass status, std::printf("[coverage] pending_%s:", CoverageClassName(status)); for (auto opcode : opcodes) { - const auto name = ShaderRecompiler::Decoder::OpcodeToString(opcode); - std::printf(" %s", name.c_str()); + const auto name = magic_enum::enum_name(opcode); + std::printf(" %.*s", static_cast(name.size()), name.data()); } std::printf("\n"); } @@ -10913,8 +10913,8 @@ void CheckOpcodeCoverage(const std::vector &tests, uint32_t counts[7] = {}; std::vector pending[7]; - for (auto value = static_cast(Opcode::SMovB32); - value <= static_cast(Opcode::Exp); value++) { + for (auto value = static_cast(Opcode::S_MOV_B32); + value < static_cast(Opcode::COUNT); value++) { const auto opcode = static_cast(value); const auto status = ClassifyOpcode(opcode, covered); counts[static_cast(status)]++; @@ -10969,8 +10969,8 @@ TestCase IntegerAddSubMul() { code, {}, {18}, - {O::SMovB32, O::SAddU32, O::SSubU32, O::SMulI32, O::VMovB32, - O::BufferStoreDword, O::SEndpgm}}; + {O::S_MOV_B32, O::S_ADD_U32, O::S_SUB_U32, O::S_MUL_I32, O::V_MOV_B32, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase BitwiseOps() { @@ -10987,8 +10987,8 @@ TestCase BitwiseOps() { code, {}, {~0x33u}, - {O::SMovB32, O::SAndB32, O::SOrB32, O::SXorB32, O::VNotB32, - O::BufferStoreDword, O::SEndpgm}}; + {O::S_MOV_B32, O::S_AND_B32, O::S_OR_B32, O::S_XOR_B32, O::V_NOT_B32, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase Shifts() { @@ -11006,8 +11006,8 @@ TestCase Shifts() { code, {}, {6}, - {O::SMovB32, O::SLshlB32, O::SLshrB32, O::VMovB32, - O::BufferStoreDword, O::SEndpgm}}; + {O::S_MOV_B32, O::S_LSHL_B32, O::S_LSHR_B32, O::V_MOV_B32, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase ExactPushConstantExtent() { @@ -11027,7 +11027,7 @@ TestCase ExactPushConstantExtent() { test.code = std::move(code); test.initial.resize(values.size()); test.expected.assign(values.begin(), values.end()); - test.opcodes = {O::VMovB32, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.user_data = MakeStructuredStorageBufferData(0, values.size() * sizeof(u32)); std::copy(values.begin(), values.end(), test.user_data.begin() + 4); @@ -11059,8 +11059,8 @@ TestCase ScalarShiftCountsMaskLowBits() { code, {}, {1, 2, 0x80000000u, 0x40000000u, 0x80000000u, 0xc0000000u}, - {O::SMovB32, O::SLshlB32, O::SLshrB32, O::SAshrI32, O::VMovB32, - O::BufferStoreDword, O::SEndpgm}}; + {O::S_MOV_B32, O::S_LSHL_B32, O::S_LSHR_B32, O::S_ASHR_I32, O::V_MOV_B32, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase Rdna2ScalarOpcodes() { @@ -11084,8 +11084,8 @@ TestCase Rdna2ScalarOpcodes() { code, {}, {0x11u, 0x11u, 7u, 7u}, - {O::SMovB32, O::SBitset1B32, O::SSetregB32, O::SAddI32, O::SSleep, - O::VMovB32, O::BufferStoreDword, O::SEndpgm}}; + {O::S_MOV_B32, O::S_BITSET1_B32, O::S_SETREG_B32, O::S_ADD_I32, O::S_SLEEP, + O::V_MOV_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase ScalarTrapDisabledFallsThroughExactRaw() { @@ -11102,8 +11102,8 @@ TestCase ScalarTrapDisabledFallsThroughExactRaw() { test.name = "ScalarTrapDisabledFallsThroughExactRaw"; test.code = code; test.expected = {42}; - test.opcodes = {O::VMovB32, O::STrap, O::BufferStoreDword, O::SEndpgm}; - test.decoded_counts = {{"s_trap 0x00000001", 1}}; + test.opcodes = {O::V_MOV_B32, O::S_TRAP, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; + test.decoded_counts = {{"S_TRAP 0x00000001", 1}}; test.compute_info.threads_num[0] = 1; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -11129,9 +11129,9 @@ TestCase ScalarWaitcntDepctrCapturedVmVsrc() { test.code = std::move(code); test.initial = {0, 0}; test.expected = {7, 42}; - test.opcodes = {O::VMovB32, O::BufferStoreDword, O::SWaitcntDepctr, - O::SEndpgm}; - test.decoded_counts = {{"0x00000010: s_waitcnt_depctr 0x0000ffe3\n", 1}}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_STORE_DWORD, O::S_WAITCNT_DEPCTR, + O::S_ENDPGM}; + test.decoded_counts = {{"0x00000010: S_WAITCNT_DEPCTR 0x0000ffe3\n", 1}}; test.native_ir_counts = {{"0x00000010: Waitcnt null, 0x0000ffe3", 1}}; test.forbidden_spirv = {"OpControlBarrier", "OpMemoryBarrier"}; return test; @@ -11172,10 +11172,10 @@ TestCase ScalarExtendedArithmetic() { code, {}, {0, 12, 15, 0xfffffffeu, 0xfffffffbu, 3, 3, 0xfffffffeu, 5, 33}, - {O::SMovB32, O::SAddU32, O::SAddcU32, O::SAddI32, O::SSubI32, - O::SMinI32, O::SMaxI32, O::SMinU32, O::SMaxU32, O::SAbsI32, - O::SMovkI32, O::SMulkI32, O::VMovB32, O::BufferStoreDword, - O::SEndpgm}}; + {O::S_MOV_B32, O::S_ADD_U32, O::S_ADDC_U32, O::S_ADD_I32, O::S_SUB_I32, + O::S_MIN_I32, O::S_MAX_I32, O::S_MIN_U32, O::S_MAX_U32, O::S_ABS_I32, + O::S_MOVK_I32, O::S_MULK_I32, O::V_MOV_B32, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}}; } TestCase ScalarArithmeticSccCarryBorrowOverflow() { @@ -11237,8 +11237,8 @@ TestCase ScalarArithmeticSccCarryBorrowOverflow() { code, {}, {1, 0, 1, 0, 1, 0, 1, 0}, - {O::SMovB32, O::SSubU32, O::SAddI32, O::SSubI32, O::SCmpEqU32, - O::SCselectB32, O::VMovB32, O::BufferStoreDword, O::SEndpgm}}; + {O::S_MOV_B32, O::S_SUB_U32, O::S_ADD_I32, O::S_SUB_I32, O::S_CMP_EQ_U32, + O::S_CSELECT_B32, O::V_MOV_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase ScalarMinMaxSccComparisonEdges() { @@ -11280,9 +11280,9 @@ TestCase ScalarMinMaxSccComparisonEdges() { code, {}, {1, 0, 1, 0, 1, 0, 1, 0}, - {O::SMovB32, O::SMinI32, O::SMaxI32, O::SMinU32, O::SMaxU32, - O::SCmpEqU32, O::SCselectB32, O::VMovB32, O::BufferStoreDword, - O::SEndpgm}}; + {O::S_MOV_B32, O::S_MIN_I32, O::S_MAX_I32, O::S_MIN_U32, O::S_MAX_U32, + O::S_CMP_EQ_U32, O::S_CSELECT_B32, O::V_MOV_B32, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}}; } TestCase ScalarAbsI32UpdatesScc() { @@ -11316,8 +11316,8 @@ TestCase ScalarAbsI32UpdatesScc() { code, {}, {0, 0, 5, 1}, - {O::SMovB32, O::SCmpEqU32, O::SAbsI32, O::SCselectB32, O::VMovB32, - O::BufferStoreDword, O::SEndpgm}}; + {O::S_MOV_B32, O::S_CMP_EQ_U32, O::S_ABS_I32, O::S_CSELECT_B32, O::V_MOV_B32, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase ScalarShiftLeftAddSccCarryEdges() { @@ -11360,9 +11360,9 @@ TestCase ScalarShiftLeftAddSccCarryEdges() { code, {}, {1, 0, 1, 0, 1, 0, 1, 0}, - {O::SMovB32, O::SLshl1AddU32, O::SLshl2AddU32, O::SLshl3AddU32, - O::SLshl4AddU32, O::SCmpEqU32, O::SCselectB32, O::VMovB32, - O::BufferStoreDword, O::SEndpgm}}; + {O::S_MOV_B32, O::S_LSHL1_ADD_U32, O::S_LSHL2_ADD_U32, O::S_LSHL3_ADD_U32, + O::S_LSHL4_ADD_U32, O::S_CMP_EQ_U32, O::S_CSELECT_B32, O::V_MOV_B32, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase ScalarCompareOps() { @@ -11412,10 +11412,10 @@ TestCase ScalarCompareOps() { code, {}, {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1}, - {O::SMovB32, O::SCmpEqI32, O::SCmpLgI32, O::SCmpGtI32, O::SCmpGeI32, - O::SCmpLtI32, O::SCmpLeI32, O::SCmpLgU32, O::SCmpGtU32, O::SCmpGeU32, - O::SCmpLeU32, O::SCmpEqU64, O::SCmpLgU64, O::SCselectB32, O::VMovB32, - O::BufferStoreDword, O::SEndpgm}}; + {O::S_MOV_B32, O::S_CMP_EQ_I32, O::S_CMP_LG_I32, O::S_CMP_GT_I32, O::S_CMP_GE_I32, + O::S_CMP_LT_I32, O::S_CMP_LE_I32, O::S_CMP_LG_U32, O::S_CMP_GT_U32, O::S_CMP_GE_U32, + O::S_CMP_LE_U32, O::S_CMP_EQ_U64, O::S_CMP_LG_U64, O::S_CSELECT_B32, O::V_MOV_B32, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase ScalarShiftAddAndMaskOps() { @@ -11453,9 +11453,9 @@ TestCase ScalarShiftAddAndMaskOps() { {}, {7, 11, 19, 35, 0xfffffffeu, 1, 0xf0f0f0f0u, 0xff00ff00u, 0x0f0f0f0fu, 0x00ff00ffu}, - {O::SMovB32, O::SLshl1AddU32, O::SLshl2AddU32, O::SLshl3AddU32, - O::SLshl4AddU32, O::SAshrI32, O::SMulHiU32, O::SNotB64, O::SWqmB64, - O::VMovB32, O::BufferStoreDword, O::SEndpgm}}; + {O::S_MOV_B32, O::S_LSHL1_ADD_U32, O::S_LSHL2_ADD_U32, O::S_LSHL3_ADD_U32, + O::S_LSHL4_ADD_U32, O::S_ASHR_I32, O::S_MUL_HI_U32, O::S_NOT_B64, O::S_WQM_B64, + O::V_MOV_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase ScalarNotB64UpdatesScc() { @@ -11491,8 +11491,8 @@ TestCase ScalarNotB64UpdatesScc() { code, {}, {0, 1, 0, 0, 1, 0}, - {O::SMovB32, O::SCmpEqU32, O::SNotB64, O::SCselectB32, O::VMovB32, - O::BufferStoreDword, O::SEndpgm}}; + {O::S_MOV_B32, O::S_CMP_EQ_U32, O::S_NOT_B64, O::S_CSELECT_B32, O::V_MOV_B32, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase ScalarFlbitI32B64Gpu() { @@ -11525,8 +11525,8 @@ TestCase ScalarFlbitI32B64Gpu() { code, {}, {0, 48, 0xffffffffu, 60}, - {O::SMovB32, O::SFlbitI32B64, O::VMovB32, O::BufferStoreDword, - O::SEndpgm}}; + {O::S_MOV_B32, O::S_FLBIT_I32_B64, O::V_MOV_B32, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}}; } TestCase ScalarSaveExecOps() { @@ -11565,9 +11565,9 @@ TestCase ScalarSaveExecOps() { {0xffffffffu, 0xffffffffu, 0xffffffffu, 0xffffffffu, 0xffffffffu, 0xffffffffu, 0xffffffffu, 0x00000003u, 0xffffffffu, 0x00000003u, 0x00000002u, 0xffffffffu, 1}, - {O::SMovB32, O::SAndSaveexecB64, O::SOrn2SaveexecB64, - O::SAndn1SaveexecB64, O::SAndSaveexecB32, O::SAndn1SaveexecB32, - O::SMovB64, O::VMovB32, O::BufferStoreDword, O::SEndpgm}}; + {O::S_MOV_B32, O::S_AND_SAVEEXEC_B64, O::S_ORN2_SAVEEXEC_B64, + O::S_ANDN1_SAVEEXEC_B64, O::S_AND_SAVEEXEC_B32, O::S_ANDN1_SAVEEXEC_B32, + O::S_MOV_B64, O::V_MOV_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase ScalarOrn2SaveexecUsesSourceOrNotExec() { @@ -11591,8 +11591,8 @@ TestCase ScalarOrn2SaveexecUsesSourceOrNotExec() { code, {}, {0x0000000cu, 0x80000000u, 0xfffffff3u, 0x7fffffffu, 1}, - {O::SMovB32, O::SOrn2SaveexecB64, O::SMovB64, O::VMovB32, - O::BufferStoreDword, O::SEndpgm}}; + {O::S_MOV_B32, O::S_ORN2_SAVEEXEC_B64, O::S_MOV_B64, O::V_MOV_B32, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase ScalarGetpcWritesNextInstructionPc() { @@ -11607,7 +11607,7 @@ TestCase ScalarGetpcWritesNextInstructionPc() { code, {}, {4, 0}, - {O::SGetpcB64, O::VMovB32, O::BufferStoreDword, O::SEndpgm}}; + {O::S_GETPC_B64, O::V_MOV_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase ScalarBitfieldPack() { @@ -11681,11 +11681,11 @@ TestCase ScalarBitfieldPack() { 0, 0x0000000fu, 0, 0x00000f00u, 0x0000000fu, 0xddddbbbbu, 0xccccbbbbu, 0xccccaaaau, 1, 1, 40, 5, 0xffffffffu, 0, 1}, - {O::SMovB32, O::SBrevB32, O::SBcnt1I32B32, O::SBcnt1I32B64, - O::SFf1I32B64, O::SBitreplicateB64B32, O::SBfmB32, O::SBfeU32, - O::SPackLlB32B16, O::SPackLhB32B16, O::SPackHhB32B16, O::SBitcmp0B32, - O::SBitcmp1B32, O::SCselectB32, O::VMovB32, O::BufferStoreDword, - O::SEndpgm}}; + {O::S_MOV_B32, O::S_BREV_B32, O::S_BCNT1_I32_B32, O::S_BCNT1_I32_B64, + O::S_FF1_I32_B64, O::S_BITREPLICATE_B64_B32, O::S_BFM_B32, O::S_BFE_U32, + O::S_PACK_LL_B32_B16, O::S_PACK_LH_B32_B16, O::S_PACK_HH_B32_B16, O::S_BITCMP0_B32, + O::S_BITCMP1_B32, O::S_CSELECT_B32, O::V_MOV_B32, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}}; } TestCase ScalarBrevB32PreservesScc() { @@ -11719,8 +11719,8 @@ TestCase ScalarBrevB32PreservesScc() { code, {}, {0x80000000u, 0, 0, 1}, - {O::SMovB32, O::SCmpEqU32, O::SBrevB32, O::SCselectB32, O::VMovB32, - O::BufferStoreDword, O::SEndpgm}}; + {O::S_MOV_B32, O::S_CMP_EQ_U32, O::S_BREV_B32, O::S_CSELECT_B32, O::V_MOV_B32, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase ScalarBfeI32CapturedRawSignExtends() { @@ -11746,9 +11746,9 @@ TestCase ScalarBfeI32CapturedRawSignExtends() { test.code = std::move(code); test.initial = {0xf0000000u, 0, 0, 0, 0}; test.expected = {0xf0000000u, 0xffffffffu, 1, 0, 0}; - test.opcodes = {O::BufferLoadDword, O::VReadfirstlaneB32, O::SBfeI32, - O::SCselectB32, O::VMovB32, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::BUFFER_LOAD_DWORD, O::V_READFIRSTLANE_B32, O::S_BFE_I32, + O::S_CSELECT_B32, O::V_MOV_B32, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; test.required_spirv = {"OpBitFieldSExtract"}; return test; } @@ -11776,8 +11776,8 @@ TestCase BitfieldExtractWidthPastEndEdges() { code, {}, {0x00000f00u, 1, 0x0000000fu}, - {O::SMovB32, O::SBfeU32, O::VMovB32, O::VBfeU32, O::BufferStoreDword, - O::SEndpgm}}; + {O::S_MOV_B32, O::S_BFE_U32, O::V_MOV_B32, O::V_BFE_U32, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}}; } TestCase Scalar64BitOps() { @@ -11824,10 +11824,10 @@ TestCase Scalar64BitOps() { 0xf00ff00fu, 0x0f0f0f0fu, 0x00ff00ffu, 0xf0f0f0f0u, 0x0ff00ff0u, 0xff0f0f0fu, 0x0000ff00u, 0xfffffff0u, 0x000000ffu, 0xffffffffu, 0x7fffffffu, 0x000000f0u, 0, 0x0f0f0f0fu, 0x00ff00ffu}, - {O::SMovB32, O::SMovB64, O::SAndB64, O::SAndn2B64, O::SOrB64, - O::SOrn2B64, O::SXorB64, O::SNandB64, O::SNorB64, O::SXnorB64, - O::SLshlB64, O::SLshrB64, O::SBfmB64, O::SBfeU64, O::SCmpEqU32, - O::SCselectB64, O::VMovB32, O::BufferStoreDword, O::SEndpgm}}; + {O::S_MOV_B32, O::S_MOV_B64, O::S_AND_B64, O::S_ANDN2_B64, O::S_OR_B64, + O::S_ORN2_B64, O::S_XOR_B64, O::S_NAND_B64, O::S_NOR_B64, O::S_XNOR_B64, + O::S_LSHL_B64, O::S_LSHR_B64, O::S_BFM_B64, O::S_BFE_U64, O::S_CMP_EQ_U32, + O::S_CSELECT_B64, O::V_MOV_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase ScalarAndn2B64SccBranch() { @@ -11850,8 +11850,8 @@ TestCase ScalarAndn2B64SccBranch() { code, {}, {7}, - {O::SMovB32, O::SAndn2B64, O::VMovB32, O::SCbranchScc0, - O::BufferStoreDword, O::SEndpgm}}; + {O::S_MOV_B32, O::S_ANDN2_B64, O::V_MOV_B32, O::S_CBRANCH_SCC0, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase ScalarLiteral() { @@ -11866,7 +11866,7 @@ TestCase ScalarLiteral() { code, {}, {0x12345678u}, - {O::SMovB32, O::VMovB32, O::BufferStoreDword, O::SEndpgm}}; + {O::S_MOV_B32, O::V_MOV_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase VectorMoves() { @@ -11883,7 +11883,7 @@ TestCase VectorMoves() { code, {}, {5}, - {O::VNop, O::VMovB32, O::BufferStoreDword, O::SEndpgm}}; + {O::V_NOP, O::V_MOV_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase VectorVop3MoveAppliesFloatSourceModifiers() { @@ -11899,7 +11899,7 @@ TestCase VectorVop3MoveAppliesFloatSourceModifiers() { test.name = "VectorVop3MoveAppliesFloatSourceModifiers"; test.code = code; test.expected = {0xc0000000u}; - test.opcodes = {O::SMovB32, O::VMovB32, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::S_MOV_B32, O::V_MOV_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.required_spirv = {"OpFNegate"}; return test; } @@ -11967,13 +11967,13 @@ TestCase VectorIntegerOps() { 32, 32, 0x0fffffffu, 0x0fffffffu, 0xffffffffu, 0xffffffffu, 0xf0f0f0f0u, 0xf0000000u, 1, 30, 7, 0xfffffff8u}, - {O::VMovB32, O::VMinI32, O::VMaxI32, O::VMinU32, - O::VMaxU32, O::VAddNcU32, O::VSubNcU32, O::VSubrevNcU32, - O::VMulU32U24, O::VMulI32I24, O::VAndB32, O::VOrB32, - O::VXorB32, O::VXnorB32, O::VLshlB32, O::VLshlrevB32, - O::VLshrB32, O::VLshrrevB32, O::VAshrI32, O::VAshrrevI32, - O::VNotB32, O::VBfrevB32, O::VFfblB32, O::VFfbhU32, - O::VCmpEqU32, O::VCndmaskB32, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::V_MIN_I32, O::V_MAX_I32, O::V_MIN_U32, + O::V_MAX_U32, O::V_ADD_NC_U32, O::V_SUB_NC_U32, O::V_SUBREV_NC_U32, + O::V_MUL_U32_U24, O::V_MUL_I32_I24, O::V_AND_B32, O::V_OR_B32, + O::V_XOR_B32, O::V_XNOR_B32, O::V_LSHL_B32, O::V_LSHLREV_B32, + O::V_LSHR_B32, O::V_LSHRREV_B32, O::V_ASHR_I32, O::V_ASHRREV_I32, + O::V_NOT_B32, O::V_BFREV_B32, O::V_FFBL_B32, O::V_FFBH_U32, + O::V_CMP_EQ_U32, O::V_CNDMASK_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase Vop2SdwaSubNcExactByte2Destination() { @@ -11990,7 +11990,7 @@ TestCase Vop2SdwaSubNcExactByte2Destination() { test.name = "Vop2SdwaSubNcExactByte2Destination"; test.code = code; test.expected = {0x000b0002u}; - test.opcodes = {O::VMovB32, O::VSubNcU32, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::V_SUB_NC_U32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.required_spirv = {"OpISub", "OpShiftLeftLogical"}; return test; } @@ -12013,8 +12013,8 @@ TestCase Vop2SdwaAddNcCapturedHighWordDestination() { test.code = std::move(code); test.initial = {0x00010002u, 0}; test.expected = {0x00010002u, 0x0006c3d4u}; - test.opcodes = {O::BufferLoadDword, O::VReadfirstlaneB32, O::VMovB32, - O::VAddNcU32, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::BUFFER_LOAD_DWORD, O::V_READFIRSTLANE_B32, O::V_MOV_B32, + O::V_ADD_NC_U32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.required_spirv = {"OpIAdd", "OpShiftLeftLogical", "OpBitwiseOr"}; return test; } @@ -12035,10 +12035,9 @@ TestCase Vop2SdwaAshrrevCapturedWord0SignExtends() { test.code = std::move(code); test.initial = {0xabcd8000u, 0}; test.expected = {0xabcd8000u, 0xfffffe00u}; - test.opcodes = {O::BufferLoadDword, O::VAshrrevI32, O::VMovB32, - O::BufferStoreDword, O::SEndpgm}; - test.decoded_counts = { - {"v_ashrrev_i32 v25, 6, v1.sdwa(sel=4,sext=1)", 1}}; + test.opcodes = {O::BUFFER_LOAD_DWORD, O::V_ASHRREV_I32, O::V_MOV_B32, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}; + test.decoded_counts = {{"V_ASHRREV_I32 v25, 6, v1.sdwa(sel=4,sext=1)", 1}}; test.ir_counts = {{" = BitFieldSExtract ", 1}, {" = ShiftRightArithmetic32 ", 1}}; test.required_spirv = {"OpBitFieldSExtract", "OpShiftRightArithmetic"}; @@ -12066,7 +12065,7 @@ TestCase Vop2SdwaSubNcPreservesByteAndWordDestinations() { {}, {0xa1b2c311u, 0xa1b211d4u, 0xa111c3d4u, 0x11b2c3d4u, 0xa1b20011u, 0x0011c3d4u}, - {O::VMovB32, O::VSubNcU32, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::V_SUB_NC_U32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase Vop3CvtPkI16I32Captured() { @@ -12086,10 +12085,9 @@ TestCase Vop3CvtPkI16I32Captured() { test.code = std::move(code); test.initial = {0x00018001u, 0xfffe7ffeu, 0}; test.expected = {0x00018001u, 0xfffe7ffeu, 0x7ffe8001u}; - test.opcodes = {O::BufferLoadDword, O::VMovB32, O::VCvtPkI16I32, - O::BufferStoreDword, O::SEndpgm}; - test.decoded_counts = { - {"0x00000014: v_cvt_pk_i16_i32 v5, v7, v16\n", 1}}; + test.opcodes = {O::BUFFER_LOAD_DWORD, O::V_MOV_B32, O::V_CVT_PK_I16_I32, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}; + test.decoded_counts = {{"0x00000014: V_CVT_PK_I16_I32 v5, v7, v16\n", 1}}; test.ir_counts = {{" = BitwiseAnd32 ", 2}, {" = ShiftLeftLogical32 ", 1}, {" = BitwiseOr32 ", 1}}; @@ -12114,9 +12112,9 @@ TestCase Vop3Med3I16Captured() { test.name = "Vop3Med3I16Captured"; test.code = std::move(code); test.expected = {0xfc18cafeu}; - test.opcodes = {O::VMovB32, O::SMovB32, O::VMed3I16, O::BufferStoreDword, - O::SEndpgm}; - test.decoded_counts = {{"0x00000020: v_med3_i16 v3.sdwa(sel=5,sext=0), " + test.opcodes = {O::V_MOV_B32, O::S_MOV_B32, O::V_MED3_I16, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; + test.decoded_counts = {{"0x00000020: V_MED3_I16 v3.sdwa(sel=5,sext=0), " "v5.opsel(lo=1,hi=0,neghi=0), s25, s27\n", 1}}; test.native_ir_counts = {{"IMed3I16", 1}}; @@ -12144,7 +12142,7 @@ TestCase Vop2SdwaMinU32PreservesWordDestination() { test.name = "Vop2SdwaMinU32PreservesWordDestination"; test.code = code; test.expected = {0xa1b20007u, 0xa1b2001fu}; - test.opcodes = {O::VMovB32, O::VMinU32, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::V_MIN_U32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.required_spirv = {"OpULessThan", "OpSelect"}; return test; } @@ -12173,8 +12171,8 @@ TestCase VectorShiftCountsMaskLowBits() { code, {}, {1, 2, 0x80000000u, 0x40000000u, 0x80000000u, 0xc0000000u}, - {O::VMovB32, O::VLshlB32, O::VLshlrevB32, O::VLshrB32, O::VLshrrevB32, - O::VAshrI32, O::VAshrrevI32, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::V_LSHL_B32, O::V_LSHLREV_B32, O::V_LSHR_B32, O::V_LSHRREV_B32, + O::V_ASHR_I32, O::V_ASHRREV_I32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase VectorVop3IntegerOps() { @@ -12266,14 +12264,14 @@ TestCase VectorVop3IntegerOps() { 5, 0xffffffffu, 1}, - {O::VMovB32, O::VAdd3U32, O::VMin3I32, O::VMax3I32, - O::VMed3I32, O::VMin3U32, O::VMax3U32, O::VMed3U32, - O::VSadU32, O::VLshlAddU32, O::VAddLshlU32, O::VXadU32, - O::VLshlOrB32, O::VAndOrB32, O::VOr3B32, O::VXor3B32, - O::VBfeU32, O::VBfeI32, O::VBfiB32, O::VAlignbitB32, - O::VBfmB32, O::VMulLoU32, O::VMulHiU32, O::VMulLoI32, - O::VMulHiI32, O::VMadI32I24, O::VMadU32U24, O::VAddI32, - O::VSubI32, O::VSubrevI32, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::V_ADD3_U32, O::V_MIN3_I32, O::V_MAX3_I32, + O::V_MED3_I32, O::V_MIN3_U32, O::V_MAX3_U32, O::V_MED3_U32, + O::V_SAD_U32, O::V_LSHL_ADD_U32, O::V_ADD_LSHL_U32, O::V_XAD_U32, + O::V_LSHL_OR_B32, O::V_AND_OR_B32, O::V_OR3_B32, O::V_XOR3_B32, + O::V_BFE_U32, O::V_BFE_I32, O::V_BFI_B32, O::V_ALIGNBIT_B32, + O::V_BFM_B32, O::V_MUL_LO_U32, O::V_MUL_HI_U32, O::V_MUL_LO_I32, + O::V_MUL_HI_I32, O::V_MAD_I32_I24, O::V_MAD_U32_U24, O::V_ADD_I32, + O::V_SUB_I32, O::V_SUBREV_I32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase VectorBfeI32SignExtendsField() { @@ -12295,8 +12293,8 @@ TestCase VectorBfeI32SignExtendsField() { test.code = std::move(code); test.initial = {0x80000000u, 0xfffffff8u, 31, 1, 3, 4}; test.expected = {0xffffffffu, 0xffffffffu}; - test.opcodes = {O::VMovB32, O::BufferLoadDword, O::VBfeI32, - O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_LOAD_DWORD, O::V_BFE_I32, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.required_spirv = {"OpBitFieldSExtract"}; return test; } @@ -12320,7 +12318,7 @@ TestCase VectorAlignByteUsesFiveBitByteOffset() { {}, {0x55667788u, 0x44556677u, 0x22334455u, 0x11223344u, 0x00112233u, 0x00000011u, 0u, 0u}, - {O::VMovB32, O::VAlignbyteB32, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::V_ALIGNBYTE_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase VectorCarryAndBitCountOps() { @@ -12350,9 +12348,9 @@ TestCase VectorCarryAndBitCountOps() { code, {}, {0, 1, 13, 5, 5}, - {O::VMovB32, O::VCmpTU32, O::VAddcU32, O::VBcntU32B32, - O::VMbcntLoU32B32, O::VMbcntHiU32B32, O::BufferStoreDword, - O::SEndpgm}}; + {O::V_MOV_B32, O::V_CMP_T_U32, O::V_ADDC_U32, O::V_BCNT_U32_B32, + O::V_MBCNT_LO_U32_B32, O::V_MBCNT_HI_U32_B32, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}}; } TestCase VectorMbcntUsesThreadMask() { @@ -12375,9 +12373,9 @@ TestCase VectorMbcntUsesThreadMask() { test.name = "VectorMbcntUsesThreadMask"; test.code = code; test.expected = {0, 1, 2, 3, 0, 1, 2, 3}; - test.opcodes = {O::VMovB32, O::VLshlrevB32, O::VAddNcU32, - O::VMbcntLoU32B32, O::VMbcntHiU32B32, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::V_LSHLREV_B32, O::V_ADD_NC_U32, + O::V_MBCNT_LO_U32_B32, O::V_MBCNT_HI_U32_B32, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; test.compute_info.threads_num[0] = 4; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -12408,8 +12406,8 @@ TestCase VectorAddcUsesPerLaneCarryIn() { test.name = "VectorAddcUsesPerLaneCarryIn"; test.code = code; test.expected = std::vector(8, 1); - test.opcodes = {O::VMovB32, O::VLshlrevB32, O::VAddNcU32, O::VCmpTU32, - O::VAddcU32, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::V_LSHLREV_B32, O::V_ADD_NC_U32, O::V_CMP_T_U32, + O::V_ADDC_U32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.compute_info.threads_num[0] = 4; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -12442,8 +12440,8 @@ TestCase VectorAddcWritesPerLaneCarryOut() { test.name = "VectorAddcWritesPerLaneCarryOut"; test.code = code; test.expected = std::vector(8, 0x0fu); - test.opcodes = {O::VMovB32, O::VLshlrevB32, O::VAddNcU32, O::VCmpFU32, - O::VAddcU32, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::V_LSHLREV_B32, O::V_ADD_NC_U32, O::V_CMP_F_U32, + O::V_ADDC_U32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.compute_info.threads_num[0] = 4; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -12482,10 +12480,10 @@ TestCase VectorSubrevCoCiU32ExactRawOnGpu() { test.name = "VectorSubrevCoCiU32ExactRawOnGpu"; test.code = code; test.expected = {0xdeadbeefu, 0, 2, 3, 0, 0, 0, 0}; - test.opcodes = {O::VMovB32, O::VLshlrevB32, O::VAddNcU32, - O::VCmpLtU32, O::SMovB64, O::VCmpNeU32, - O::VSubrevCoCiU32, O::VCndmaskB32, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::V_LSHLREV_B32, O::V_ADD_NC_U32, + O::V_CMP_LT_U32, O::S_MOV_B64, O::V_CMP_NE_U32, + O::V_SUBREV_CO_CI_U32, O::V_CNDMASK_B32, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; test.required_spirv = {"OpISub", "OpUGreaterThan"}; test.compute_info.threads_num[0] = 4; test.compute_info.threads_num[1] = 1; @@ -12522,10 +12520,10 @@ TestCase VectorVop3BSubrevCoCiUsesEncodedMasks() { test.name = "VectorVop3BSubrevCoCiUsesEncodedMasks"; test.code = code; test.expected = {0xfffffffeu, 0xfffffffeu, 0, 1, 1, 1, 0, 0}; - test.opcodes = {O::VMovB32, O::VLshlrevB32, O::VAddNcU32, - O::VCmpEqU32, O::SMovB64, O::SMovB32, - O::VSubrevCoCiU32, O::VCndmaskB32, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::V_LSHLREV_B32, O::V_ADD_NC_U32, + O::V_CMP_EQ_U32, O::S_MOV_B64, O::S_MOV_B32, + O::V_SUBREV_CO_CI_U32, O::V_CNDMASK_B32, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; test.compute_info.threads_num[0] = 4; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -12557,8 +12555,8 @@ TestCase VectorVop3BCarryOutWritesSgprMask() { test.name = "VectorVop3BCarryOutWritesSgprMask"; test.code = code; test.expected = std::vector(12, 0x0fu); - test.opcodes = {O::VMovB32, O::VAddI32, O::VSubI32, - O::VSubrevI32, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::V_ADD_I32, O::V_SUB_I32, + O::V_SUBREV_I32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.compute_info.threads_num[0] = 4; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -12589,8 +12587,8 @@ TestCase VectorVop3BCarryOutUsesEncodedSdst() { test.name = "VectorVop3BCarryOutUsesEncodedSdst"; test.code = code; test.expected = std::vector(12, 0x0fu); - test.opcodes = {O::VMovB32, O::VAddI32, O::VSubI32, - O::VSubrevI32, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::V_ADD_I32, O::V_SUB_I32, + O::V_SUBREV_I32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.compute_info.threads_num[0] = 4; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -12628,8 +12626,8 @@ TestCase VectorVop3BSubCoU32UsesRdna2Opcode310() { test.name = "VectorVop3BSubCoU32UsesRdna2Opcode310"; test.code = code; test.expected = {0xffffffffu, 0, 0xfffffffeu, 0x80000001u, 9, 9, 9, 9}; - test.opcodes = {O::VMovB32, O::VCmpEqU32, O::VCndmaskB32, - O::VSubI32, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::V_CMP_EQ_U32, O::V_CNDMASK_B32, + O::V_SUB_I32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.compute_info.threads_num[0] = 4; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -12658,7 +12656,7 @@ TestCase VectorMadU64U32UnsignedCarryOut() { code, {}, {0x00000000u, 0x00000001u, 0x00000001u, 0x00000000u}, - {O::VMovB32, O::VMadU64U32, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::V_MAD_U64_U32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase VectorLaneAndPackedOps() { @@ -12702,10 +12700,10 @@ TestCase VectorLaneAndPackedOps() { {0x12345678u, 0x12345678u, 0x12345678u, 0x12345678u, 0x40003c00u, 0x46004400u, 0x48004200u, 0x40003c00u, 0x44004200u, 0x48804400u, 0x40000000u, 0xef015678u}, - {O::VMovB32, O::VReadfirstlaneB32, O::VReadlaneB32, O::VWritelaneB32, - O::VPermlane16B32, O::VCvtPkrtzF16F32, O::VPkAddF16, O::VPkMulF16, - O::VPkMinF16, O::VPkMaxF16, O::VPkFmaF16, O::VLdexpF32, - O::VCvtPkU16U32, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::V_READFIRSTLANE_B32, O::V_READLANE_B32, O::V_WRITELANE_B32, + O::V_PERMLANE16_B32, O::V_CVT_PKRTZ_F16_F32, O::V_PK_ADD_F16, O::V_PK_MUL_F16, + O::V_PK_MIN_F16, O::V_PK_MAX_F16, O::V_PK_FMA_F16, O::V_LDEXP_F32, + O::V_CVT_PK_U16_U32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase Vop3pOpselHiUsesArchitecturalSourceBits() { @@ -12730,7 +12728,7 @@ TestCase Vop3pOpselHiUsesArchitecturalSourceBits() { code, {}, {0x4f004d00u, 0x4e004d00u, 0x50804d00u}, - {O::VMovB32, O::VPkFmaF16, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::V_PK_FMA_F16, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase CvtPkU8F32PacksSelectedByte() { @@ -12757,7 +12755,7 @@ TestCase CvtPkU8F32PacksSelectedByte() { code, {}, {0x1122330cu, 0x1122ff44u, 0x11003344u, 0x00223344u}, - {O::VMovB32, O::VCvtPkU8F32, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::V_CVT_PK_U8_F32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase CvtPkrtzF16F32SubnormalRoundsTowardZero() { @@ -12774,7 +12772,7 @@ TestCase CvtPkrtzF16F32SubnormalRoundsTowardZero() { code, {}, {0x80010001u}, - {O::VMovB32, O::VCvtPkrtzF16F32, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::V_CVT_PKRTZ_F16_F32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase PackedMinMaxF16NanAndSignedZeroEdges() { @@ -12802,8 +12800,8 @@ TestCase PackedMinMaxF16NanAndSignedZeroEdges() { code, {}, {0x80004000u, 0x00004000u, 0x7f017f01u, 0x7f017f01u}, - {O::VMovB32, O::VPkMinF16, O::VPkMaxF16, O::BufferStoreDword, - O::SEndpgm}}; + {O::V_MOV_B32, O::V_PK_MIN_F16, O::V_PK_MAX_F16, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}}; } TestCase VectorMinMaxF16Ops() { @@ -12845,8 +12843,8 @@ TestCase VectorMinMaxF16Ops() { {}, {0x66664200u, 0x77773c00u, 0x8888bc00u, 0xaaaa0000u, 0x55554000u, 0x12344000u, 0x87653c00u, 0x99994000u}, - {O::VMovB32, O::VAddF16, O::VSubF16, O::VSubrevF16, O::VMulF16, - O::VMaxF16, O::VMinF16, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::V_ADD_F16, O::V_SUB_F16, O::V_SUBREV_F16, O::V_MUL_F16, + O::V_MAX_F16, O::V_MIN_F16, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase VectorCvtU16F16Sdwa() { @@ -12880,7 +12878,7 @@ TestCase VectorCvtU16F16Sdwa() { code, {}, {0x12340003u, 0x00054321u, 0xabcdffffu, 0x77770000u, 0x55550000u}, - {O::VMovB32, O::VCvtU16F16, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::V_CVT_U16_F16, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase VectorMinMaxMed3F16Ops() { @@ -12910,8 +12908,8 @@ TestCase VectorMinMaxMed3F16Ops() { code, {}, {0xaaaa3c00u, 0x48005678u, 0x77773c00u}, - {O::VMovB32, O::VMin3F16, O::VMax3F16, O::VMed3F16, - O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::V_MIN3_F16, O::V_MAX3_F16, O::V_MED3_F16, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase VectorSpecialF16Ops() { @@ -12942,8 +12940,8 @@ TestCase VectorSpecialF16Ops() { {}, {0x00008000u, 0xb8005678u, 0x00003800u, 0x00000000u, 0x0000fe00u, 0x00000000u}, - {O::VMovB32, O::VRcpF16, O::VRsqF16, O::VLogF16, O::VExpF16, - O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::V_RCP_F16, O::V_RSQ_F16, O::V_LOG_F16, O::V_EXP_F16, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase VectorWritelaneIgnoresExecMask() { @@ -12965,8 +12963,8 @@ TestCase VectorWritelaneIgnoresExecMask() { test.name = "VectorWritelaneIgnoresExecMask"; test.code = code; test.expected = {0xaaaaaaaau, 0x12345678u, 0xaaaaaaaau, 0xaaaaaaaau}; - test.opcodes = {O::VMovB32, O::SMovB32, O::VWritelaneB32, - O::VLshlrevB32, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::S_MOV_B32, O::V_WRITELANE_B32, + O::V_LSHLREV_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.compute_info.threads_num[0] = 4; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -12990,8 +12988,8 @@ TestCase VectorReadlaneFromInactiveWrittenLane() { test.name = "VectorReadlaneInactiveWrittenLane"; test.code = code; test.expected = {0x12345678u}; - test.opcodes = {O::SMovB32, O::VWritelaneB32, O::VReadlaneB32, - O::VMovB32, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::S_MOV_B32, O::V_WRITELANE_B32, O::V_READLANE_B32, + O::V_MOV_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.forbidden_spirv = {"OpGroupNonUniformShuffle"}; test.compute_info.threads_num[0] = 4; test.compute_info.threads_num[1] = 1; @@ -13017,9 +13015,9 @@ TestCase VectorLaneWave32RuntimeSelectorWraps() { test.name = "VectorLaneWave32RuntimeSelectorWraps"; test.code = code; test.expected = {0x12345678u}; - test.opcodes = {O::SAddU32, O::SMovB32, O::VWritelaneB32, - O::VReadlaneB32, O::VMovB32, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::S_ADD_U32, O::S_MOV_B32, O::V_WRITELANE_B32, + O::V_READLANE_B32, O::V_MOV_B32, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; test.required_spirv = {"OpGroupNonUniformShuffle"}; test.compute_info.threads_num[0] = 4; test.compute_info.threads_num[1] = 1; @@ -13048,8 +13046,8 @@ TestCase VectorPermlanex16() { test.name = "VectorPermlanex16"; test.code = code; test.expected = std::vector(32, 0xfeedbabeu); - test.opcodes = {O::VMovB32, O::VPermlanex16B32, O::VLshlrevB32, - O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::V_PERMLANEX16_B32, O::V_LSHLREV_B32, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.compute_info.threads_num[0] = 32; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -13074,8 +13072,8 @@ TestCase VectorPermlane16FetchInactiveZero() { test.name = "VectorPermlane16FetchInactiveZero"; test.code = code; test.expected = {0}; - test.opcodes = {O::VMovB32, O::VAddNcU32, O::SMovB32, - O::VPermlane16B32, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::V_ADD_NC_U32, O::S_MOV_B32, + O::V_PERMLANE16_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.compute_info.threads_num[0] = 4; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -13100,8 +13098,8 @@ TestCase VectorPermlane16FetchInactiveFi() { test.name = "VectorPermlane16FetchInactiveFi"; test.code = code; test.expected = {11}; - test.opcodes = {O::VMovB32, O::VAddNcU32, O::SMovB32, - O::VPermlane16B32, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::V_ADD_NC_U32, O::S_MOV_B32, + O::V_PERMLANE16_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.compute_info.threads_num[0] = 4; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -13125,8 +13123,8 @@ TestCase VectorDppQuadPermuteReverse() { test.name = "VectorDppQuadPermuteReverse"; test.code = code; test.expected = {103, 102, 101, 100, 107, 106, 105, 104}; - test.opcodes = {O::VMovB32, O::VAddNcU32, O::VLshlrevB32, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::V_ADD_NC_U32, O::V_LSHLREV_B32, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; test.compute_info.threads_num[0] = 8; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -13152,8 +13150,8 @@ TestCase VectorDppBankMaskPreservesDestination() { test.code = code; test.expected = {0xaaaaaaaau, 0xaaaaaaaau, 0xaaaaaaaau, 0xaaaaaaaau, 104, 105, 106, 107}; - test.opcodes = {O::VMovB32, O::VAddNcU32, O::VLshlrevB32, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::V_ADD_NC_U32, O::V_LSHLREV_B32, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; test.compute_info.threads_num[0] = 8; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -13178,8 +13176,8 @@ TestCase VectorDppBoundsControlZeroPreservesDestination() { test.name = "VectorDppBoundsControlZeroPreservesDestination"; test.code = code; test.expected = {0xaaaaaaaau, 100, 101, 102, 103, 104, 105, 106}; - test.opcodes = {O::VMovB32, O::VAddNcU32, O::VLshlrevB32, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::V_ADD_NC_U32, O::V_LSHLREV_B32, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; test.compute_info.threads_num[0] = 8; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -13202,7 +13200,7 @@ TestCase Vop3LdexpSourceModifier() { code, {}, {0x3ec00000u}, - {O::VMovB32, O::VLdexpF32, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::V_LDEXP_F32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase Vop1MoveRelSource() { @@ -13221,8 +13219,8 @@ TestCase Vop1MoveRelSource() { code, {}, {0x33333333u}, - {O::VMovB32, O::SMovB32, O::VMovrelsB32, O::BufferStoreDword, - O::SEndpgm}}; + {O::V_MOV_B32, O::S_MOV_B32, O::V_MOVRELS_B32, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}}; } TestCase Vop1MoveRelDestination() { @@ -13247,8 +13245,8 @@ TestCase Vop1MoveRelDestination() { test.name = "Vop1MoveRelDestination"; test.code = code; test.expected = {0x12345678u, 0xccccccccu, 0xccccccccu, 0xccccccccu}; - test.opcodes = {O::VMovB32, O::SMovB32, O::VMovreldB32, - O::VLshlrevB32, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::S_MOV_B32, O::V_MOVRELD_B32, + O::V_LSHLREV_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.compute_info.threads_num[0] = 4; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -13295,10 +13293,10 @@ TestCase VectorFloatSpecialOps() { {}, {0x41400000u, 0x80017fffu, 0x8000ffffu, 0xaaaa4700u, 0x4700bbbbu, 0x40800000u, 0x3f800000u, 0xc0000000u, 0x40c00000u}, - {O::VMovB32, O::VDot2cF32F16, O::VCvtPknormI16F32, - O::VCvtPknormU16F32, O::VMadMixloF16, O::VMadMixhiF16, O::VCubeidF32, - O::VCubescF32, O::VCubetcF32, O::VCubemaF32, O::BufferStoreDword, - O::SEndpgm}}; + {O::V_MOV_B32, O::V_DOT2C_F32_F16, O::V_CVT_PKNORM_I16_F32, + O::V_CVT_PKNORM_U16_F32, O::V_MAD_MIXLO_F16, O::V_MAD_MIXHI_F16, O::V_CUBEID_F32, + O::V_CUBESC_F32, O::V_CUBETC_F32, O::V_CUBEMA_F32, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}}; } TestCase MadMixF16LiteralHalfSourceUsesOpsel() { @@ -13322,8 +13320,8 @@ TestCase MadMixF16LiteralHalfSourceUsesOpsel() { code, {}, {0xaaaa4200u, 0x40002222u}, - {O::VMovB32, O::VMadMixloF16, O::VMadMixhiF16, O::BufferStoreDword, - O::SEndpgm}}; + {O::V_MOV_B32, O::V_MAD_MIXLO_F16, O::V_MAD_MIXHI_F16, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}}; } TestCase MadMixF16NegHiIsAbsAndNegIsIndependent() { @@ -13347,8 +13345,8 @@ TestCase MadMixF16NegHiIsAbsAndNegIsIndependent() { code, {}, {0xaaaa4200u, 0xbc002222u}, - {O::VMovB32, O::VMadMixloF16, O::VMadMixhiF16, O::BufferStoreDword, - O::SEndpgm}}; + {O::V_MOV_B32, O::V_MAD_MIXLO_F16, O::V_MAD_MIXHI_F16, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}}; } TestCase VectorVop3FmaF16UsesRdna2Opcode34b() { @@ -13372,7 +13370,7 @@ TestCase VectorVop3FmaF16UsesRdna2Opcode34b() { code, {}, {0xaaaa4400u, 0x48805555u}, - {O::VMovB32, O::VFmaF16, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::V_FMA_F16, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase VectorFloatControlContractPreservesInfNan() { @@ -13393,8 +13391,8 @@ TestCase VectorFloatControlContractPreservesInfNan() { test.name = "VectorFloatControlContractPreservesInfNan"; test.code = std::move(code); test.expected = {1u}; - test.opcodes = {O::SBfmB32, O::VMovB32, O::VMulF32, O::VCmpClassF32, - O::VCndmaskB32, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::S_BFM_B32, O::V_MOV_B32, O::V_MUL_F32, O::V_CMP_CLASS_F32, + O::V_CNDMASK_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.required_spirv = {"SPV_KHR_float_controls", "SignedZeroInfNanPreserve 32"}; return test; @@ -13471,10 +13469,10 @@ TestCase VectorFloatArithmeticOps() { 0x40a00000u, 0x40800000u, 0x40c00000u, 0x41000000u, 0x40400000u, 0x40400000u, 0xbf800000u, 0x3f800000u, 0x3f800000u, 0x40800000u, 0xbf800000u, 0x40c00000u, 0x40000000u, 0x40400000u}, - {O::SMovB32, O::VMovB32, O::VAddF32, O::VSubF32, O::VSubrevF32, - O::VMulF32, O::VMinF32, O::VMaxF32, O::VMacF32, O::VMadF32, - O::VFmaF32, O::VMin3F32, O::VMax3F32, O::VMed3F32, O::VMadmkF32, - O::VMadakF32, O::BufferStoreDword, O::SEndpgm}}; + {O::S_MOV_B32, O::V_MOV_B32, O::V_ADD_F32, O::V_SUB_F32, O::V_SUBREV_F32, + O::V_MUL_F32, O::V_MIN_F32, O::V_MAX_F32, O::V_MAC_F32, O::V_MAD_F32, + O::V_FMA_F32, O::V_MIN3_F32, O::V_MAX3_F32, O::V_MED3_F32, O::V_MADMK_F32, + O::V_MADAK_F32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase VectorMinMaxF32NanAndSignedZeroEdges() { @@ -13508,8 +13506,8 @@ TestCase VectorMinMaxF32NanAndSignedZeroEdges() { {}, {0x40000000u, 0x40000000u, 0x80000000u, 0x00000000u, 0x7fe00001u, 0x7fe00001u, 0x40000000u, 0x40000000u}, - {O::VMovB32, O::VMinF32, O::VMaxF32, O::VMin3F32, O::VMax3F32, - O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::V_MIN_F32, O::V_MAX_F32, O::V_MIN3_F32, O::V_MAX3_F32, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase VectorMed3F32NanUsesMin3Path() { @@ -13534,7 +13532,7 @@ TestCase VectorMed3F32NanUsesMin3Path() { code, {}, {0x7fe00001u, 0x40000000u, 0x40400000u}, - {O::VMovB32, O::VMed3F32, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::V_MED3_F32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase VectorFloatConversionOps() { @@ -13605,16 +13603,16 @@ TestCase VectorFloatConversionOps() { 0x40400000u, 0x40000000u, 0x40000000u, 0x40000000u, 0x40000000u, 0x3f000000u, 0x40000000u, 0, 0x3f800000u, 0xbd800000u, 0x3f800000u, 0x3f800000u, 0x40000000u}, - {O::VMovB32, O::VCvtF32I32, O::VCvtF32U32, - O::VCvtU32F32, O::VCvtI32F32, O::VCvtF16F32, - O::VCvtF32F16, O::VCvtRpiI32F32, O::VCvtFlrI32F32, - O::VCvtOffF32I4, O::VCvtF32Ubyte0, O::VCvtF32Ubyte1, - O::VCvtF32Ubyte2, O::VCvtF32Ubyte3, O::VRcpF32, - O::VFractF32, O::VTruncF32, O::VCeilF32, - O::VRndneF32, O::VFloorF32, O::VExpF32, - O::VLogF32, O::VRsqF32, O::VSqrtF32, - O::VSinF32, O::VCosF32, O::BufferStoreDword, - O::SEndpgm}}; + {O::V_MOV_B32, O::V_CVT_F32_I32, O::V_CVT_F32_U32, + O::V_CVT_U32_F32, O::V_CVT_I32_F32, O::V_CVT_F16_F32, + O::V_CVT_F32_F16, O::V_CVT_RPI_I32_F32, O::V_CVT_FLR_I32_F32, + O::V_CVT_OFF_F32_I4, O::V_CVT_F32_UBYTE0, O::V_CVT_F32_UBYTE1, + O::V_CVT_F32_UBYTE2, O::V_CVT_F32_UBYTE3, O::V_RCP_F32, + O::V_FRACT_F32, O::V_TRUNC_F32, O::V_CEIL_F32, + O::V_RNDNE_F32, O::V_FLOOR_F32, O::V_EXP_F32, + O::V_LOG_F32, O::V_RSQ_F32, O::V_SQRT_F32, + O::V_SIN_F32, O::V_COS_F32, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}}; } TestCase VectorFrexpF32Edges() { @@ -13663,10 +13661,10 @@ TestCase VectorFrexpF32Edges() { 0x3f7ffffeu, 0x3f000000u, 0x7f800000u, 0x7fc00000u, 0xff800000u, 0x7fa00001u, }; - test.opcodes = {O::VMovB32, O::BufferLoadDword, O::VFrexpExpI32F32, - O::VFrexpMantF32, O::BufferStoreDword, O::SEndpgm}; - test.decoded_counts = {{"v_frexp_exp_i32_f32", inputs.size()}, - {"v_frexp_mant_f32", inputs.size()}}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_LOAD_DWORD, O::V_FREXP_EXP_I32_F32, + O::V_FREXP_MANT_F32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; + test.decoded_counts = {{"V_FREXP_EXP_I32_F32", inputs.size()}, + {"V_FREXP_MANT_F32", inputs.size()}}; test.required_spirv = {"FindUMsb", "OpBitFieldUExtract", "OpShiftLeftLogical"}; return test; @@ -13702,8 +13700,8 @@ TestCase CvtF32ToIntSaturatesNaNAndOutOfRange() { {}, {0, 0, 0xffffffffu, 0xffffffffu, 0, 0x7fffffffu, 0x80000000u, 0x7fffffffu}, - {O::VMovB32, O::VCvtU32F32, O::VCvtI32F32, O::BufferStoreDword, - O::SEndpgm}}; + {O::V_MOV_B32, O::V_CVT_U32_F32, O::V_CVT_I32_F32, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}}; } TestCase VectorSpecialF32FlushesDenormalInputs() { @@ -13725,8 +13723,8 @@ TestCase VectorSpecialF32FlushesDenormalInputs() { code, {}, {0xff800000u, 0x7f800000u, 0x7f800000u, 0x00000000u}, - {O::VMovB32, O::VLogF32, O::VRcpF32, O::VRsqF32, O::VSqrtF32, - O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::V_LOG_F32, O::V_RCP_F32, O::V_RSQ_F32, O::V_SQRT_F32, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase VectorRcpIflagF32IntegerReciprocal() { @@ -13754,9 +13752,9 @@ TestCase VectorRcpIflagF32IntegerReciprocal() { test.code = std::move(code); test.expected = {0x7f800000u, 0x3f800000u, 0x3f000000u, 0x2f800000u, 0x3f800000u}; - test.opcodes = {O::VMovB32, O::VCvtF32U32, O::VRcpIflagF32, - O::BufferStoreDword, O::SEndpgm}; - test.decoded_counts = {{"v_rcp_iflag_f32", 5}}; + test.opcodes = {O::V_MOV_B32, O::V_CVT_F32_U32, O::V_RCP_IFLAG_F32, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}; + test.decoded_counts = {{"V_RCP_IFLAG_F32", 5}}; test.ir_counts = {{"FPRecipIFlag32", 5}}; test.required_spirv = {"OpConvertUToF", "OpFDiv"}; test.forbidden_spirv = {"8388608"}; @@ -13779,7 +13777,7 @@ TestCase VectorSinCosMaxFiniteSpecialCases() { code, {}, {0x00000000u, 0x3f800000u}, - {O::VMovB32, O::VSinF32, O::VCosF32, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::V_SIN_F32, O::V_COS_F32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase VectorCompareOps() { @@ -13868,15 +13866,15 @@ TestCase VectorCompareOps() { code, {}, expected, - {O::VMovB32, O::VCndmaskB32, O::VCmpFF32, O::VCmpLtF32, - O::VCmpEqF32, O::VCmpLeF32, O::VCmpGtF32, O::VCmpLgF32, - O::VCmpGeF32, O::VCmpOF32, O::VCmpUF32, O::VCmpNgeF32, - O::VCmpNlgF32, O::VCmpNgtF32, O::VCmpNleF32, O::VCmpNeqF32, - O::VCmpNltF32, O::VCmpTruF32, O::VCmpFI32, O::VCmpLtI32, - O::VCmpEqI32, O::VCmpLeI32, O::VCmpGtI32, O::VCmpNeI32, - O::VCmpGeI32, O::VCmpTI32, O::VCmpFU32, O::VCmpLtU32, - O::VCmpEqU32, O::VCmpLeU32, O::VCmpGtU32, O::VCmpNeU32, - O::VCmpGeU32, O::VCmpTU32, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::V_CNDMASK_B32, O::V_CMP_F_F32, O::V_CMP_LT_F32, + O::V_CMP_EQ_F32, O::V_CMP_LE_F32, O::V_CMP_GT_F32, O::V_CMP_LG_F32, + O::V_CMP_GE_F32, O::V_CMP_O_F32, O::V_CMP_U_F32, O::V_CMP_NGE_F32, + O::V_CMP_NLG_F32, O::V_CMP_NGT_F32, O::V_CMP_NLE_F32, O::V_CMP_NEQ_F32, + O::V_CMP_NLT_F32, O::V_CMP_TRU_F32, O::V_CMP_F_I32, O::V_CMP_LT_I32, + O::V_CMP_EQ_I32, O::V_CMP_LE_I32, O::V_CMP_GT_I32, O::V_CMP_NE_I32, + O::V_CMP_GE_I32, O::V_CMP_T_I32, O::V_CMP_F_U32, O::V_CMP_LT_U32, + O::V_CMP_EQ_U32, O::V_CMP_LE_U32, O::V_CMP_GT_U32, O::V_CMP_NE_U32, + O::V_CMP_GE_U32, O::V_CMP_T_U32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase VectorVop3CompareNeU64OnGpu() { @@ -13903,8 +13901,8 @@ TestCase VectorVop3CompareNeU64OnGpu() { code, {}, {0, 1}, - {O::VMovB32, O::SMovB64, O::VCmpNeU64, O::VCndmaskB32, O::SMovB32, - O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::S_MOV_B64, O::V_CMP_NE_U64, O::V_CNDMASK_B32, O::S_MOV_B32, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase VectorVop3CompareGtU64OnGpu() { @@ -13937,8 +13935,8 @@ TestCase VectorVop3CompareGtU64OnGpu() { code, {}, {1, 1, 0}, - {O::VMovB32, O::SMovB32, O::VCmpGtU64, O::VCndmaskB32, - O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::S_MOV_B32, O::V_CMP_GT_U64, O::V_CNDMASK_B32, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; test.required_spirv = {"OpUGreaterThan"}; test.compute_info.threads_num[0] = 64; test.compute_info.threads_num[1] = 1; @@ -13972,8 +13970,8 @@ TestCase VectorVop3CompareEqI64OnGpu() { code, {}, {1, 0}, - {O::VMovB32, O::SMovB64, O::VCmpEqI64, O::VCndmaskB32, O::SMovB32, - O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::S_MOV_B64, O::V_CMP_EQ_I64, O::V_CNDMASK_B32, O::S_MOV_B32, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase VectorCompareClassF32() { @@ -14014,8 +14012,8 @@ TestCase VectorCompareClassF32() { code, {}, expected, - {O::VMovB32, O::VCmpClassF32, O::VCndmaskB32, O::BufferStoreDword, - O::SEndpgm}}; + {O::V_MOV_B32, O::V_CMP_CLASS_F32, O::V_CNDMASK_B32, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}}; } TestCase VectorCompareF16Ops() { @@ -14066,11 +14064,11 @@ TestCase VectorCompareF16Ops() { code, {}, expected, - {O::VMovB32, O::SMovB32, O::VCmpLtF16, O::VCmpEqF16, O::VCmpLeF16, - O::VCmpGtF16, O::VCmpLgF16, O::VCmpGeF16, O::VCmpNeqF16, - O::VCmpxLtF16, O::VCmpxEqF16, O::VCmpxLeF16, O::VCmpxGtF16, - O::VCmpxGeF16, O::VCmpxNeqF16, O::VCmpxNltF16, O::VCndmaskB32, - O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::S_MOV_B32, O::V_CMP_LT_F16, O::V_CMP_EQ_F16, O::V_CMP_LE_F16, + O::V_CMP_GT_F16, O::V_CMP_LG_F16, O::V_CMP_GE_F16, O::V_CMP_NEQ_F16, + O::V_CMPX_LT_F16, O::V_CMPX_EQ_F16, O::V_CMPX_LE_F16, O::V_CMPX_GT_F16, + O::V_CMPX_GE_F16, O::V_CMPX_NEQ_F16, O::V_CMPX_NLT_F16, O::V_CNDMASK_B32, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase Vop2SdwaCndmaskSourceModifier() { @@ -14090,8 +14088,8 @@ TestCase Vop2SdwaCndmaskSourceModifier() { code, {}, {0xbf800000u}, - {O::VMovB32, O::VCmpTU32, O::VCndmaskB32, O::BufferStoreDword, - O::SEndpgm}}; + {O::V_MOV_B32, O::V_CMP_T_U32, O::V_CNDMASK_B32, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}}; } TestCase Vop2SdwaCndmaskFullDestinationWithSubDwordSource() { @@ -14114,8 +14112,8 @@ TestCase Vop2SdwaCndmaskFullDestinationWithSubDwordSource() { test.name = "Vop2SdwaCndmaskFullDestinationWithSubDwordSource"; test.code = code; test.expected = {0x00001234u, 0x55667788u}; - test.opcodes = {O::VMovB32, O::VCmpFU32, O::VCmpTU32, - O::VCndmaskB32, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::V_CMP_F_U32, O::V_CMP_T_U32, + O::V_CNDMASK_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.required_spirv = {"OpSelect"}; return test; } @@ -14140,8 +14138,8 @@ TestCase Vop3CndmaskUsesSgprMaskLaneBits() { test.name = "Vop3CndmaskUsesSgprMaskLaneBits"; test.code = code; test.expected = {20, 10, 10, 10, 20, 10, 10, 10}; - test.opcodes = {O::VMovB32, O::VLshlrevB32, O::VAddNcU32, O::VCmpFU32, - O::SMovB32, O::VCndmaskB32, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::V_LSHLREV_B32, O::V_ADD_NC_U32, O::V_CMP_F_U32, + O::S_MOV_B32, O::V_CNDMASK_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.compute_info.threads_num[0] = 4; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -14169,8 +14167,8 @@ TestCase Vop3CndmaskAllowsDataSourceModifier() { code, {}, {0xbf800000u}, - {O::VMovB32, O::SMovB32, O::VCndmaskB32, O::BufferStoreDword, - O::SEndpgm}}; + {O::V_MOV_B32, O::S_MOV_B32, O::V_CNDMASK_B32, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}}; } TestCase VectorCompareExecOps() { @@ -14220,13 +14218,13 @@ TestCase VectorCompareExecOps() { code, {}, std::vector(out, 1), - {O::SMovB32, O::VMovB32, O::VCmpxLtF32, O::VCmpxEqF32, - O::VCmpxLeF32, O::VCmpxGtF32, O::VCmpxLgF32, O::VCmpxGeF32, - O::VCmpxNgeF32, O::VCmpxNlgF32, O::VCmpxNgtF32, O::VCmpxNleF32, - O::VCmpxNeqF32, O::VCmpxNltF32, O::VCmpxLtI32, O::VCmpxEqI32, - O::VCmpxLeI32, O::VCmpxGtI32, O::VCmpxNeI32, O::VCmpxGeI32, - O::VCmpxLtU32, O::VCmpxEqU32, O::VCmpxLeU32, O::VCmpxGtU32, - O::VCmpxNeU32, O::VCmpxGeU32, O::BufferStoreDword, O::SEndpgm}}; + {O::S_MOV_B32, O::V_MOV_B32, O::V_CMPX_LT_F32, O::V_CMPX_EQ_F32, + O::V_CMPX_LE_F32, O::V_CMPX_GT_F32, O::V_CMPX_LG_F32, O::V_CMPX_GE_F32, + O::V_CMPX_NGE_F32, O::V_CMPX_NLG_F32, O::V_CMPX_NGT_F32, O::V_CMPX_NLE_F32, + O::V_CMPX_NEQ_F32, O::V_CMPX_NLT_F32, O::V_CMPX_LT_I32, O::V_CMPX_EQ_I32, + O::V_CMPX_LE_I32, O::V_CMPX_GT_I32, O::V_CMPX_NE_I32, O::V_CMPX_GE_I32, + O::V_CMPX_LT_U32, O::V_CMPX_EQ_U32, O::V_CMPX_LE_U32, O::V_CMPX_GT_U32, + O::V_CMPX_NE_U32, O::V_CMPX_GE_U32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase VectorVop3FloatCompareNegSourceModifier() { @@ -14244,7 +14242,7 @@ TestCase VectorVop3FloatCompareNegSourceModifier() { code, {}, {1, 0}, - {O::VMovB32, O::VCmpLtF32, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::V_CMP_LT_F32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase VectorVop3CmpxWritesExecMask() { @@ -14264,7 +14262,7 @@ TestCase VectorVop3CmpxWritesExecMask() { code, {0}, {0}, - {O::VMovB32, O::VCmpxLtU32, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::V_CMPX_LT_U32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase VectorVopcSdwaCmpxWritesExecMask() { @@ -14285,7 +14283,7 @@ TestCase VectorVopcSdwaCmpxWritesExecMask() { code, {0}, {0}, - {O::VMovB32, O::VCmpxLtU32, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::V_CMPX_LT_U32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase VectorCompareInvertedMaskSelect() { @@ -14303,8 +14301,8 @@ TestCase VectorCompareInvertedMaskSelect() { code, {}, {0x12345678u}, - {O::VMovB32, O::VCmpTU32, O::SNotB64, O::VCndmaskB32, - O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::V_CMP_T_U32, O::S_NOT_B64, O::V_CNDMASK_B32, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase BranchSelect() { @@ -14326,8 +14324,8 @@ TestCase BranchSelect() { code, {}, {7}, - {O::SMovB32, O::SCmpEqU32, O::SCbranchScc1, O::SBranch, - O::SCselectB32, O::VMovB32, O::BufferStoreDword, O::SEndpgm}}; + {O::S_MOV_B32, O::S_CMP_EQ_U32, O::S_CBRANCH_SCC1, O::S_BRANCH, + O::S_CSELECT_B32, O::V_MOV_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase SimpleLoop() { @@ -14347,8 +14345,8 @@ TestCase SimpleLoop() { code, {}, {4}, - {O::SMovB32, O::SCmpLtU32, O::SCbranchScc0, O::SAddU32, O::SBranch, - O::VMovB32, O::BufferStoreDword, O::SEndpgm}}; + {O::S_MOV_B32, O::S_CMP_LT_U32, O::S_CBRANCH_SCC0, O::S_ADD_U32, O::S_BRANCH, + O::V_MOV_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase BranchVccnzUsesWholeMask() { @@ -14372,9 +14370,9 @@ TestCase BranchVccnzUsesWholeMask() { test.name = "BranchVccnzUsesWholeMask"; test.code = code; test.expected = std::vector(8, 42); - test.opcodes = {O::VMovB32, O::VLshlrevB32, O::VAddNcU32, - O::VCmpEqU32, O::SCbranchVccnz, O::SBranch, - O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::V_LSHLREV_B32, O::V_ADD_NC_U32, + O::V_CMP_EQ_U32, O::S_CBRANCH_VCCNZ, O::S_BRANCH, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.compute_info.threads_num[0] = 4; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -14438,11 +14436,11 @@ TestCase ScalarMemoryLoadVariants() { code, initial, expected, - {O::SMovB32, O::SLoadDword, O::SLoadDwordx2, O::SLoadDwordx4, - O::SLoadDwordx8, O::SLoadDwordx16, O::SBufferLoadDword, - O::SBufferLoadDwordx2, O::SBufferLoadDwordx4, O::SBufferLoadDwordx8, - O::SBufferLoadDwordx16, O::VMovB32, O::BufferStoreDword, - O::SEndpgm}}; + {O::S_MOV_B32, O::S_LOAD_DWORD, O::S_LOAD_DWORDX2, O::S_LOAD_DWORDX4, + O::S_LOAD_DWORDX8, O::S_LOAD_DWORDX16, O::S_BUFFER_LOAD_DWORD, + O::S_BUFFER_LOAD_DWORDX2, O::S_BUFFER_LOAD_DWORDX4, O::S_BUFFER_LOAD_DWORDX8, + O::S_BUFFER_LOAD_DWORDX16, O::V_MOV_B32, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}}; } TestCase ScalarLoadSignedImmediateOffsetAddsSoffset() { @@ -14461,7 +14459,7 @@ TestCase ScalarLoadSignedImmediateOffsetAddsSoffset() { code, {0x11111111u, 0x22222222u}, {0x22222222u, 0x22222222u}, - {O::SMovB32, O::SLoadDword, O::BufferStoreDword, O::SEndpgm}}; + {O::S_MOV_B32, O::S_LOAD_DWORD, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase BufferLoadStore() { @@ -14476,7 +14474,7 @@ TestCase BufferLoadStore() { code, {0x11223344u, 0}, {0x11223344u, 0x11223344u}, - {O::BufferLoadDword, O::VMovB32, O::BufferStoreDword, O::SEndpgm}}; + {O::BUFFER_LOAD_DWORD, O::V_MOV_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase BufferLoadDwordOffenIdxenUsesVaddrPlusOneOffset() { @@ -14494,7 +14492,7 @@ TestCase BufferLoadDwordOffenIdxenUsesVaddrPlusOneOffset() { code, {0x11111111u, 0x22222222u, 0x33333333u}, {0x33333333u, 0x22222222u, 0x33333333u}, - {O::VMovB32, O::BufferLoadDword, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::BUFFER_LOAD_DWORD, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase BufferStoreDwordOffenIdxenUsesVaddrPlusOneOffset() { @@ -14512,7 +14510,7 @@ TestCase BufferStoreDwordOffenIdxenUsesVaddrPlusOneOffset() { code, {0x11111111u, 0x22222222u, 0x33333333u, 0x44444444u}, {0x11111111u, 0x22222222u, 0x33333333u, 0xabcdef01u}, - {O::VMovB32, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase BufferLoadDwordNoAddressFlagsIgnoresVaddr() { @@ -14529,7 +14527,7 @@ TestCase BufferLoadDwordNoAddressFlagsIgnoresVaddr() { code, {0x11111111u, 0x22222222u, 0x33333333u, 0}, {0x11111111u, 0x22222222u, 0x33333333u, 0x11111111u}, - {O::VMovB32, O::BufferLoadDword, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::BUFFER_LOAD_DWORD, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase BufferLoadDwordIdxenUsesDescriptorStride() { @@ -14551,8 +14549,8 @@ TestCase BufferLoadDwordIdxenUsesDescriptorStride() { test.expected = {0x99aabbccu, 0x22222222u, 0x33333333u, 0x44444444u, 0x55555555u, 0x66666666u, 0x77777777u, 0x88888888u, 0x99aabbccu}; - test.opcodes = {O::VMovB32, O::BufferLoadDword, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_LOAD_DWORD, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; test.user_data = MakeStructuredStorageBufferData(16, 3); test.has_user_data = true; return test; @@ -14577,7 +14575,7 @@ TestCase BufferStoreDwordIdxenUsesDescriptorStride() { test.expected = {0x11111111u, 0x22222222u, 0x33333333u, 0x44444444u, 0x55555555u, 0x66666666u, 0x77777777u, 0x88888888u, 0xabcdef01u}; - test.opcodes = {O::VMovB32, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.user_data = MakeStructuredStorageBufferData(16, 3); test.has_user_data = true; return test; @@ -14599,7 +14597,7 @@ TestCase BufferStoreDwordAppliesHostOffset() { test.expected = {0x11111111u, 0x22222222u, 0x33333333u, 0xabcdef01u}; test.storage_buffer_range_dwords = 1; test.storage_buffer_offsets = {12}; - test.opcodes = {O::VMovB32, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.user_data = MakeStructuredStorageBufferData(4, 1); test.has_user_data = true; return test; @@ -14631,7 +14629,7 @@ TestCase BufferOffsetsUsePackedLaneAndStorageFallback() { test.storage_buffer_range_dwords = 1; test.storage_buffer_offsets = {0, 12}; test.force_shader_data_storage = true; - test.opcodes = {O::SMovB32, O::VMovB32, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::S_MOV_B32, O::V_MOV_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; return test; } @@ -14664,9 +14662,9 @@ TestCase BufferLoadVariants() { {0x01u, 0xffffffffu, 0x7f01u, 0xffff80ffu, 0x11223344u, 0x55667788u, 0x11223344u, 0x55667788u, 0x99aabbccu, 0x11223344u, 0x55667788u, 0x99aabbccu, 0xddeeff00u}, - {O::BufferLoadUbyte, O::BufferLoadSbyte, O::BufferLoadUshort, - O::BufferLoadSshort, O::BufferLoadDwordx2, O::BufferLoadDwordx3, - O::BufferLoadDwordx4, O::VMovB32, O::BufferStoreDword, O::SEndpgm}}; + {O::BUFFER_LOAD_UBYTE, O::BUFFER_LOAD_SBYTE, O::BUFFER_LOAD_USHORT, + O::BUFFER_LOAD_SSHORT, O::BUFFER_LOAD_DWORDX2, O::BUFFER_LOAD_DWORDX3, + O::BUFFER_LOAD_DWORDX4, O::V_MOV_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase BufferLoadDwordx4SnapshotsOverlappingAddress() { @@ -14689,8 +14687,8 @@ TestCase BufferLoadDwordx4SnapshotsOverlappingAddress() { 0, 0, 0, 0}; test.expected = {0x11111111u, 0x22222222u, 0x33333333u, 0x44444444u, 0x11111111u, 0x22222222u, 0x33333333u, 0x44444444u}; - test.opcodes = {O::VMovB32, O::BufferLoadDwordx4, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_LOAD_DWORDX4, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; test.user_data = MakeStructuredStorageBufferData(16, 2); test.has_user_data = true; return test; @@ -14714,8 +14712,8 @@ TestCase BufferLoadDwordx2SnapshotsOverlappingAddress() { test.code = std::move(code); test.initial = {0x11111111u, 0x22222222u, 0, 0}; test.expected = {0x11111111u, 0x22222222u, 0x11111111u, 0x22222222u}; - test.opcodes = {O::VMovB32, O::BufferLoadDwordx2, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_LOAD_DWORDX2, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; test.user_data = MakeStructuredStorageBufferData(8, 2); test.has_user_data = true; return test; @@ -14740,8 +14738,8 @@ TestCase BufferLoadDwordx3SnapshotsOverlappingAddress() { test.initial = {0x11111111u, 0x22222222u, 0x33333333u, 0, 0, 0}; test.expected = {0x11111111u, 0x22222222u, 0x33333333u, 0x11111111u, 0x22222222u, 0x33333333u}; - test.opcodes = {O::VMovB32, O::BufferLoadDwordx3, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_LOAD_DWORDX3, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; test.user_data = MakeStructuredStorageBufferData(12, 2); test.has_user_data = true; return test; @@ -14779,9 +14777,9 @@ TestCase BufferStoreVariants() { std::vector(10, 0), {0xbbccaa00u, 0x11111111u, 0x22222222u, 0x33333333u, 0x44444444u, 0x55555555u, 0x66666666u, 0x77777777u, 0x88888888u, 0x99999999u}, - {O::VMovB32, O::BufferStoreByte, O::BufferStoreShort, - O::BufferStoreDwordx2, O::BufferStoreDwordx3, O::BufferStoreDwordx4, - O::SEndpgm}}; + {O::V_MOV_B32, O::BUFFER_STORE_BYTE, O::BUFFER_STORE_SHORT, + O::BUFFER_STORE_DWORDX2, O::BUFFER_STORE_DWORDX3, O::BUFFER_STORE_DWORDX4, + O::S_ENDPGM}}; } TestCase BufferFormatVariants() { @@ -14805,13 +14803,13 @@ TestCase BufferFormatVariants() { load.expected = {0x01020304u, 0x01020304u, 0x11121314u, 0x01020304u, 0x11121314u, 0x21222324u, 0x01020304u, 0x11121314u, 0x21222324u, 0x31323334u}; - load.opcodes = {O::BufferLoadFormatX, - O::BufferLoadFormatXy, - O::BufferLoadFormatXyz, - O::BufferLoadFormatXyzw, - O::VMovB32, - O::BufferStoreDword, - O::SEndpgm}; + load.opcodes = {O::BUFFER_LOAD_FORMAT_X, + O::BUFFER_LOAD_FORMAT_XY, + O::BUFFER_LOAD_FORMAT_XYZ, + O::BUFFER_LOAD_FORMAT_XYZW, + O::V_MOV_B32, + O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; return load; } @@ -14835,8 +14833,8 @@ TestCase BufferLoadFormatXyzwSnapshotsOverlappingAddress() { 0, 0, 0, 0}; test.expected = {0x3f800000u, 0x40000000u, 0x40400000u, 0x40800000u, 0x3f800000u, 0x40000000u, 0x40400000u, 0x40800000u}; - test.opcodes = {O::VMovB32, O::BufferLoadFormatXyzw, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_LOAD_FORMAT_XYZW, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; test.user_data = MakeStructuredStorageBufferData( 16, 2, false, BufferFormat(Prospero::BufferFormat::k32_32_32_32Float)); test.has_user_data = true; @@ -14859,8 +14857,8 @@ TestCase BufferLoadFormatXyzwResource32_32FloatAppliesXy01() { test.code = std::move(code); test.initial = {0x3f800000u, 0x40000000u, 0, 0}; test.expected = {0x3f800000u, 0x40000000u, 0, 0x3f800000u}; - test.opcodes = {O::VMovB32, O::BufferLoadFormatXyzw, - O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_LOAD_FORMAT_XYZW, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.user_data = MakeStructuredStorageBufferData( 16, 1, false, BufferFormat(Prospero::BufferFormat::k32_32Float)); test.user_data[3] = (test.user_data[3] & ~0xfffu) | DstSel(4, 5, 0, 1); @@ -14884,8 +14882,8 @@ TestCase BufferLoadFormatXyzwResource8_8_8_8UintAppliesWzy1() { test.code = std::move(code); test.initial = {0x11223344u, 0x55667788u, 0x99aabbccu, 0xddeeff00u}; test.expected = {0x11u, 0x22u, 0x33u, 1u}; - test.opcodes = {O::VMovB32, O::BufferLoadFormatXyzw, - O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_LOAD_FORMAT_XYZW, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.user_data = MakeStructuredStorageBufferData( 16, 1, false, BufferFormat(Prospero::BufferFormat::k8_8_8_8UInt)); test.user_data[3] = (test.user_data[3] & ~0xfffu) | DstSel(7, 6, 5, 1); @@ -14917,8 +14915,8 @@ TestCase BufferLoadFormatXyzwInactiveExecPreservesOverlappingAddress() { test.initial = {0xaaaaaaaa, 0xbbbbbbbb, 0xcccccccc, 0xdddddddd, 0, 0, 0, 0}; test.expected = {0xaaaaaaaau, 0xbbbbbbbbu, 0xccccccccu, 0xddddddddu, 0x11111111u, 0x22222222u, 0x33333333u, 0x44444444u}; - test.opcodes = {O::VMovB32, O::SMovB64, O::BufferLoadFormatXyzw, - O::SMovB32, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::S_MOV_B64, O::BUFFER_LOAD_FORMAT_XYZW, + O::S_MOV_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.user_data = MakeStructuredStorageBufferData( 16, 2, false, BufferFormat(Prospero::BufferFormat::k32_32_32_32Float)); test.has_user_data = true; @@ -14954,8 +14952,8 @@ TestCase BufferFormatStoreVariants() { std::vector(10, 0), {0x01020304u, 0x11121314u, 0x21222324u, 0x31323334u, 0x41424344u, 0x51525354u, 0x61626364u, 0x71727374u, 0x81828384u, 0x91929394u}, - {O::VMovB32, O::BufferStoreFormatX, O::BufferStoreFormatXy, - O::BufferStoreFormatXyz, O::BufferStoreFormatXyzw, O::SEndpgm}}; + {O::V_MOV_B32, O::BUFFER_STORE_FORMAT_X, O::BUFFER_STORE_FORMAT_XY, + O::BUFFER_STORE_FORMAT_XYZ, O::BUFFER_STORE_FORMAT_XYZW, O::S_ENDPGM}}; } TestCase BufferLoadFormatXResource8UintZeroExtendsByte() { @@ -14973,8 +14971,8 @@ TestCase BufferLoadFormatXResource8UintZeroExtendsByte() { test.code = code; test.initial = {0x11223344u, 0}; test.expected = {0x11223344u, 0x00000044u}; - test.opcodes = {O::VMovB32, O::BufferLoadFormatX, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_LOAD_FORMAT_X, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; test.user_data = MakeStructuredStorageBufferData(0, 8, false, 5); test.has_user_data = true; return test; @@ -14995,7 +14993,7 @@ TestCase BufferStoreFormatXResource16UintWritesHalfword() { test.code = code; test.initial = {0x11223344u}; test.expected = {0x1122aaaau}; - test.opcodes = {O::VMovB32, O::BufferStoreFormatX, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_STORE_FORMAT_X, O::S_ENDPGM}; test.user_data = MakeStructuredStorageBufferData(0, 4, false, 11); test.has_user_data = true; return test; @@ -15017,8 +15015,8 @@ TestCase BufferLoadFormatXyResource88UintExtractsBytes() { test.code = code; test.initial = {0x0000807fu, 0x55667788u, 0, 0}; test.expected = {0x0000807fu, 0x55667788u, 0x0000007fu, 0x00000080u}; - test.opcodes = {O::VMovB32, O::BufferLoadFormatXy, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_LOAD_FORMAT_XY, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; test.user_data = MakeStructuredStorageBufferData(0, 8, false, 18); test.has_user_data = true; return test; @@ -15041,8 +15039,8 @@ TestCase BufferLoadFormatXyResource8888UnormConvertsFirstTwoComponents() { test.code = code; test.initial = {0x44332211u, 0xdeadbeefu}; test.expected = {0x3d888889u, 0x3e088889u}; - test.opcodes = {O::VMovB32, O::BufferLoadFormatXy, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_LOAD_FORMAT_XY, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; test.user_data = MakeStructuredStorageBufferData(0, 8, false, 56); test.has_user_data = true; return test; @@ -15064,7 +15062,7 @@ TestCase BufferStoreFormatXyResource88UintWritesBytes() { test.code = code; test.initial = {0x11223344u, 0x55667788u}; test.expected = {0x1122bbaau, 0x55667788u}; - test.opcodes = {O::VMovB32, O::BufferStoreFormatXy, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_STORE_FORMAT_XY, O::S_ENDPGM}; test.user_data = MakeStructuredStorageBufferData(0, 8, false, 18); test.has_user_data = true; return test; @@ -15086,7 +15084,7 @@ TestCase BufferStoreFormatXyResource32UintWritesOneDword() { test.code = code; test.initial = {0x11111111u, 0x22222222u}; test.expected = {0xabcdef01u, 0x22222222u}; - test.opcodes = {O::VMovB32, O::BufferStoreFormatXy, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_STORE_FORMAT_XY, O::S_ENDPGM}; test.user_data = MakeStructuredStorageBufferData(0, 8, false, 20); test.has_user_data = true; return test; @@ -15109,7 +15107,7 @@ TestCase BufferStoreFormatXyzResource3232UintWritesTwoDwords() { test.code = code; test.initial = {0x11111111u, 0x22222222u, 0x33333333u}; test.expected = {0xabcdef01u, 0x12345678u, 0x33333333u}; - test.opcodes = {O::VMovB32, O::BufferStoreFormatXyz, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_STORE_FORMAT_XYZ, O::S_ENDPGM}; test.user_data = MakeStructuredStorageBufferData(0, 8, false, 62); test.has_user_data = true; return test; @@ -15133,7 +15131,7 @@ TestCase BufferStoreFormatXyzwResource323232UintWritesThreeDwords() { test.code = code; test.initial = {0x11111111u, 0x22222222u, 0x33333333u, 0x44444444u}; test.expected = {0xabcdef01u, 0x12345678u, 0x0badc0deu, 0x44444444u}; - test.opcodes = {O::VMovB32, O::BufferStoreFormatXyzw, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_STORE_FORMAT_XYZW, O::S_ENDPGM}; test.user_data = MakeStructuredStorageBufferData(0, 8, false, 72); test.has_user_data = true; return test; @@ -15156,7 +15154,7 @@ TestCase BufferStoreFormatXyzResource8UintWritesOneByte() { test.code = code; test.initial = {0x11223344u, 0x55667788u, 0x99aabbccu}; test.expected = {0x112233aau, 0x55667788u, 0x99aabbccu}; - test.opcodes = {O::VMovB32, O::BufferStoreFormatXyz, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_STORE_FORMAT_XYZ, O::S_ENDPGM}; test.user_data = MakeStructuredStorageBufferData(0, 8, false, 5); test.has_user_data = true; return test; @@ -15176,7 +15174,7 @@ TestCase BufferStoreFormatXAddTidUsesLaneIndex() { test.code = code; test.initial = std::vector(4, 0); test.expected = std::vector(4, 0x12345678u); - test.opcodes = {O::VMovB32, O::BufferStoreFormatX, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_STORE_FORMAT_X, O::S_ENDPGM}; test.compute_info.threads_num[0] = 4; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -15203,7 +15201,7 @@ TestCase BufferStoreFormatXDropsOutOfRangeRecord() { test.initial = {0x11111111u, 0x22222222u}; test.expected = {0x11111111u, 0x22222222u}; test.storage_buffer_range_dwords = 1; - test.opcodes = {O::VMovB32, O::BufferStoreFormatX, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_STORE_FORMAT_X, O::S_ENDPGM}; test.user_data = MakeStructuredStorageBufferData(4, 1, false, 20); test.has_user_data = true; return test; @@ -15228,9 +15226,9 @@ TestCase TBufferLoadVariants() { {0x01020304u, 0x11121314u, 0x21222324u, 0x31323334u}, {0x01020304u, 0x01020304u, 0x11121314u, 0x01020304u, 0x11121314u, 0x21222324u, 0x01020304u, 0x11121314u, 0x21222324u, 0x31323334u}, - {O::TBufferLoadFormatX, O::TBufferLoadFormatXy, - O::TBufferLoadFormatXyz, O::TBufferLoadFormatXyzw, O::VMovB32, - O::BufferStoreDword, O::SEndpgm}}; + {O::TBUFFER_LOAD_FORMAT_X, O::TBUFFER_LOAD_FORMAT_XY, + O::TBUFFER_LOAD_FORMAT_XYZ, O::TBUFFER_LOAD_FORMAT_XYZW, O::V_MOV_B32, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase TBufferLoadFormatXyzwSnapshotsOverlappingAddress() { @@ -15256,8 +15254,8 @@ TestCase TBufferLoadFormatXyzwSnapshotsOverlappingAddress() { 0, 0, 0, 0}; test.expected = {0x3f800000u, 0x40000000u, 0x40400000u, 0x40800000u, 0x3f800000u, 0x40000000u, 0x40400000u, 0x40800000u}; - test.opcodes = {O::VMovB32, O::TBufferLoadFormatXyzw, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::TBUFFER_LOAD_FORMAT_XYZW, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; test.user_data = MakeStructuredStorageBufferData(16, 2); test.has_user_data = true; return test; @@ -15283,8 +15281,8 @@ TestCase TBufferLoadFormatXyzwPackedSnapshotsOverlappingAddress() { test.code = std::move(code); test.initial = {0x44332211u, 0, 0, 0, 0, 0, 0, 0}; test.expected = {0x44332211u, 0, 0, 0, 0x11u, 0x22u, 0x33u, 0x44u}; - test.opcodes = {O::VMovB32, O::TBufferLoadFormatXyzw, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::TBUFFER_LOAD_FORMAT_XYZW, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; test.user_data = MakeStructuredStorageBufferData(4, 8); test.has_user_data = true; return test; @@ -15304,7 +15302,7 @@ TestCase TBufferStoreFormatX8UintWritesOneByte() { code, {0x11223344u}, {0x112233aau}, - {O::VMovB32, O::TBufferStoreFormatX, O::SEndpgm}}; + {O::V_MOV_B32, O::TBUFFER_STORE_FORMAT_X, O::S_ENDPGM}}; } TestCase TBufferLoadFormatX8UintZeroExtendsByte() { @@ -15321,7 +15319,7 @@ TestCase TBufferLoadFormatX8UintZeroExtendsByte() { code, {0x11223344u, 0}, {0x00000044u, 0}, - {O::VMovB32, O::TBufferLoadFormatX, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::TBUFFER_LOAD_FORMAT_X, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase TBufferLoadFormatX8888UintExtractsFirstByte() { @@ -15338,7 +15336,7 @@ TestCase TBufferLoadFormatX8888UintExtractsFirstByte() { code, {0x44332211u, 0}, {0x00000011u, 0}, - {O::VMovB32, O::TBufferLoadFormatX, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::TBUFFER_LOAD_FORMAT_X, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase TBufferLoadFormatXIdxenUsesDescriptorStride() { @@ -15356,8 +15354,8 @@ TestCase TBufferLoadFormatXIdxenUsesDescriptorStride() { test.code = code; test.initial = {0x01020304u, 0, 0, 0, 0, 0, 0, 0, 0x0000007eu}; test.expected = {0x0000007eu, 0, 0, 0, 0, 0, 0, 0, 0x0000007eu}; - test.opcodes = {O::VMovB32, O::TBufferLoadFormatX, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::TBUFFER_LOAD_FORMAT_X, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; test.user_data = MakeStructuredStorageBufferData(16, 3); test.has_user_data = true; return test; @@ -15377,7 +15375,7 @@ TestCase TBufferLoadFormatX16FloatConvertsToFloat() { code, {0x00003c00u, 0}, {0x3f800000u, 0}, - {O::VMovB32, O::TBufferLoadFormatX, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::TBUFFER_LOAD_FORMAT_X, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase TBufferLoadFormatXSintSignExtendsSubDword() { @@ -15398,7 +15396,7 @@ TestCase TBufferLoadFormatXSintSignExtendsSubDword() { code, {0x00000080u, 0x00008001u}, {0xffffff80u, 0xffff8001u}, - {O::VMovB32, O::TBufferLoadFormatX, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::TBUFFER_LOAD_FORMAT_X, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase TBufferStoreFormatXSintWritesSubDword() { @@ -15419,7 +15417,7 @@ TestCase TBufferStoreFormatXSintWritesSubDword() { code, {0x11223344u, 0x55667788u}, {0x11223380u, 0x55668001u}, - {O::VMovB32, O::TBufferStoreFormatX, O::SEndpgm}}; + {O::V_MOV_B32, O::TBUFFER_STORE_FORMAT_X, O::S_ENDPGM}}; } TestCase TBufferLoadFormatXy88IntegerComponents() { @@ -15442,7 +15440,7 @@ TestCase TBufferLoadFormatXy88IntegerComponents() { code, {0x0000807fu, 0x00007f80u, 0, 0}, {0x0000007fu, 0x00000080u, 0xffffff80u, 0x0000007fu}, - {O::VMovB32, O::TBufferLoadFormatXy, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::TBUFFER_LOAD_FORMAT_XY, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase TBufferStoreFormatXy88IntegerComponents() { @@ -15465,7 +15463,7 @@ TestCase TBufferStoreFormatXy88IntegerComponents() { code, {0x11223344u, 0x55667788u}, {0x1122bbaau, 0x55667f80u}, - {O::VMovB32, O::TBufferStoreFormatXy, O::SEndpgm}}; + {O::V_MOV_B32, O::TBUFFER_STORE_FORMAT_XY, O::S_ENDPGM}}; } TestCase TBufferLoadFormatXy1616IntegerComponents() { @@ -15488,7 +15486,7 @@ TestCase TBufferLoadFormatXy1616IntegerComponents() { code, {0x80017fffu, 0x7fff8000u, 0, 0}, {0x00007fffu, 0x00008001u, 0xffff8000u, 0x00007fffu}, - {O::VMovB32, O::TBufferLoadFormatXy, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::TBUFFER_LOAD_FORMAT_XY, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase TBufferStoreFormatXy1616IntegerComponents() { @@ -15511,7 +15509,7 @@ TestCase TBufferStoreFormatXy1616IntegerComponents() { code, {0x11223344u, 0x55667788u}, {0xbbbbaaaau, 0x7fff8000u}, - {O::VMovB32, O::TBufferStoreFormatXy, O::SEndpgm}}; + {O::V_MOV_B32, O::TBUFFER_STORE_FORMAT_XY, O::S_ENDPGM}}; } TestCase TBufferLoadFormatXyz16161616UintLoadsHalfwords() { @@ -15531,7 +15529,7 @@ TestCase TBufferLoadFormatXyz16161616UintLoadsHalfwords() { code, {0x22221111u, 0x44443333u, 0}, {0x00001111u, 0x00002222u, 0x00003333u}, - {O::VMovB32, O::TBufferLoadFormatXyz, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::TBUFFER_LOAD_FORMAT_XYZ, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase TBufferLoadFormatXy88UnormConvertsToFloat() { @@ -15550,7 +15548,7 @@ TestCase TBufferLoadFormatXy88UnormConvertsToFloat() { code, {0x0000ff80u, 0}, {0x3f008081u, 0x3f800000u}, - {O::VMovB32, O::TBufferLoadFormatXy, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::TBUFFER_LOAD_FORMAT_XY, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase TBufferLoadFormatXy88SnormConvertsToFloat() { @@ -15569,7 +15567,7 @@ TestCase TBufferLoadFormatXy88SnormConvertsToFloat() { code, {0x00007f80u, 0}, {0xbf800000u, 0x3f800000u}, - {O::VMovB32, O::TBufferLoadFormatXy, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::TBUFFER_LOAD_FORMAT_XY, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase TBufferLoadFormatXy1616UnormConvertsToFloat() { @@ -15588,7 +15586,7 @@ TestCase TBufferLoadFormatXy1616UnormConvertsToFloat() { code, {0xffff8000u, 0}, {0x3f000080u, 0x3f800000u}, - {O::VMovB32, O::TBufferLoadFormatXy, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::TBUFFER_LOAD_FORMAT_XY, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase TBufferLoadFormatXy8888UnormConvertsFirstTwoComponents() { @@ -15607,7 +15605,7 @@ TestCase TBufferLoadFormatXy8888UnormConvertsFirstTwoComponents() { code, {0x44332211u, 0xdeadbeefu}, {0x3d888889u, 0x3e088889u}, - {O::VMovB32, O::TBufferLoadFormatXy, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::TBUFFER_LOAD_FORMAT_XY, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase TBufferLoadFormatXyzw8888UintExtractsBytes() { @@ -15627,7 +15625,7 @@ TestCase TBufferLoadFormatXyzw8888UintExtractsBytes() { code, {0x44332211u, 0xaaaaaaaau, 0xbbbbbbbbu, 0xccccccccu}, {0x00000011u, 0x00000022u, 0x00000033u, 0x00000044u}, - {O::VMovB32, O::TBufferLoadFormatXyzw, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::TBUFFER_LOAD_FORMAT_XYZW, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase TBufferLoadFormatXyzw1010102SnormConvertsToFloat() { @@ -15647,7 +15645,7 @@ TestCase TBufferLoadFormatXyzw1010102SnormConvertsToFloat() { code, {0x800801ffu, 0, 0, 0}, {0x3f800000u, 0xbf800000u, 0, 0xbf800000u}, - {O::VMovB32, O::TBufferLoadFormatXyzw, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::TBUFFER_LOAD_FORMAT_XYZW, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase TBufferLoadFormatXyz111110FloatUnpacks() { @@ -15667,7 +15665,7 @@ TestCase TBufferLoadFormatXyz111110FloatUnpacks() { code, {0x781e03c0u, 0, 0}, {0x3f800000u, 0x3f800000u, 0x3f800000u}, - {O::VMovB32, O::TBufferLoadFormatXyz, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::TBUFFER_LOAD_FORMAT_XYZ, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase TBufferLoadFormatXyzw3232FloatZerosMissingComponents() { @@ -15687,7 +15685,7 @@ TestCase TBufferLoadFormatXyzw3232FloatZerosMissingComponents() { code, {0x11111111u, 0x22222222u, 0x33333333u, 0x44444444u}, {0x11111111u, 0x22222222u, 0, 0}, - {O::VMovB32, O::TBufferLoadFormatXyzw, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::TBUFFER_LOAD_FORMAT_XYZW, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase TBufferStoreFormatXyzw3232FloatWritesOnlyPresentComponents() { @@ -15707,7 +15705,7 @@ TestCase TBufferStoreFormatXyzw3232FloatWritesOnlyPresentComponents() { code, {0xaaaaaaaau, 0xbbbbbbbbu, 0xccccccccu, 0xddddddddu}, {0x3f800000u, 0x40000000u, 0xccccccccu, 0xddddddddu}, - {O::VMovB32, O::TBufferStoreFormatXyzw, O::SEndpgm}}; + {O::V_MOV_B32, O::TBUFFER_STORE_FORMAT_XYZW, O::S_ENDPGM}}; } TestCase TBufferStoreVariants() { @@ -15739,8 +15737,8 @@ TestCase TBufferStoreVariants() { std::vector(10, 0), {0x01020304u, 0x11121314u, 0x21222324u, 0x31323334u, 0x41424344u, 0x51525354u, 0x61626364u, 0x71727374u, 0x81828384u, 0x91929394u}, - {O::VMovB32, O::TBufferStoreFormatX, O::TBufferStoreFormatXy, - O::TBufferStoreFormatXyz, O::TBufferStoreFormatXyzw, O::SEndpgm}}; + {O::V_MOV_B32, O::TBUFFER_STORE_FORMAT_X, O::TBUFFER_STORE_FORMAT_XY, + O::TBUFFER_STORE_FORMAT_XYZ, O::TBUFFER_STORE_FORMAT_XYZW, O::S_ENDPGM}}; } TestCase FlatLoadVariants() { @@ -15779,10 +15777,10 @@ TestCase FlatLoadVariants() { 0x55667788u, 0x11223344u, 0x55667788u, 0x99aabbccu, 0x11223344u, 0x55667788u, 0x99aabbccu, 0xddeeff00u, 0x11223344u}, - {O::VMovB32, O::FlatLoadUbyte, O::FlatLoadSbyte, - O::FlatLoadUshort, O::FlatLoadSshort, O::FlatLoadDword, - O::FlatLoadDwordx2, O::FlatLoadDwordx3, O::FlatLoadDwordx4, - O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::FLAT_LOAD_UBYTE, O::FLAT_LOAD_SBYTE, + O::FLAT_LOAD_USHORT, O::FLAT_LOAD_SSHORT, O::FLAT_LOAD_DWORD, + O::FLAT_LOAD_DWORDX2, O::FLAT_LOAD_DWORDX3, O::FLAT_LOAD_DWORDX4, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; test.flat_memory_base = 0; return test; } @@ -15808,9 +15806,9 @@ TestCase BranchVccnzUsesCarryProducedWholeMask() { test.name = "BranchVccnzUsesCarryProducedWholeMask"; test.code = code; test.expected = std::vector(8, 42); - test.opcodes = {O::VMovB32, O::VLshlrevB32, O::VAddNcU32, - O::VCmpFU32, O::VAddcU32, O::SCbranchVccnz, - O::SBranch, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::V_LSHLREV_B32, O::V_ADD_NC_U32, + O::V_CMP_F_U32, O::V_ADDC_U32, O::S_CBRANCH_VCCNZ, + O::S_BRANCH, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.compute_info.threads_num[0] = 4; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -15838,7 +15836,7 @@ TestCase ScalarLoadAlignsComponentsAndMasksAddress() { code, {0x11111111u, 0x22222222u}, {0x11111111u, 0x22222222u}, - {O::SMovB32, O::SLoadDword, O::BufferStoreDword, O::SEndpgm}}; + {O::S_MOV_B32, O::S_LOAD_DWORD, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase FlatVirtualAddressRebasesGuestAllocation() { @@ -15866,8 +15864,8 @@ TestCase FlatVirtualAddressRebasesGuestAllocation() { test.initial = {0, 0x12345678u}; test.expected = {0x12345678u, 0x12345678u, 0}; test.flat_memory_base = GuestBase; - test.opcodes = {O::VMovB32, O::FlatLoadDword, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::FLAT_LOAD_DWORD, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; return test; } @@ -15888,8 +15886,8 @@ TestCase GlobalSignedImmediateRebasesBeforeSaddr() { code, {0x11111111u, 0x22222222u, 0x12345678u}, {0x12345678u}, - {O::SMovB32, O::VMovB32, O::FlatLoadDword, O::BufferStoreDword, - O::SEndpgm}}; + {O::S_MOV_B32, O::V_MOV_B32, O::FLAT_LOAD_DWORD, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}}; } TestCase FlatSegmentIgnoresSaddrAndMasksOffsetMsb() { @@ -15918,8 +15916,8 @@ TestCase FlatSegmentIgnoresSaddrAndMasksOffsetMsb() { test.code = code; test.initial = initial; test.expected = {0x11111111u, 0x11111111u}; - test.opcodes = {O::SMovB32, O::VMovB32, O::FlatLoadDword, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::S_MOV_B32, O::V_MOV_B32, O::FLAT_LOAD_DWORD, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; test.flat_memory_base = 0; return test; } @@ -15966,9 +15964,9 @@ TestCase FlatStoreVariants() { {0xbbccaa00u, 0x11111111u, 0x22222222u, 0x33333333u, 0x44444444u, 0x55555555u, 0x66666666u, 0x77777777u, 0x88888888u, 0x99999999u, 0x11111111u, 0}, - {O::VMovB32, O::FlatStoreByte, O::FlatStoreShort, - O::FlatStoreDword, O::FlatStoreDwordx2, O::FlatStoreDwordx3, - O::FlatStoreDwordx4, O::SEndpgm}}; + {O::V_MOV_B32, O::FLAT_STORE_BYTE, O::FLAT_STORE_SHORT, + O::FLAT_STORE_DWORD, O::FLAT_STORE_DWORDX2, O::FLAT_STORE_DWORDX3, + O::FLAT_STORE_DWORDX4, O::S_ENDPGM}}; test.flat_memory_base = 0; return test; } @@ -16031,11 +16029,11 @@ TestCase DsReadWriteVariants() { {0x11223344u, 0xaau, 0xffffffaau, 0x80ffu, 0xffff80ffu, 0x10101010u, 0x11111111u, 0x20202020u, 0x21212121u, 0x22222222u, 0x30303030u, 0x31313131u, 0x32323232u, 0x33333333u}, - {O::VMovB32, O::DsWriteB32, O::DsReadB32, O::DsWriteByte, - O::DsReadUbyte, O::DsReadSbyte, O::DsWriteShort, O::DsReadUshort, - O::DsReadSshort, O::DsWriteB64, O::DsReadB64, O::DsWriteB96, - O::DsReadB96, O::DsWriteB128, O::DsReadB128, O::BufferStoreDword, - O::SEndpgm}}; + {O::V_MOV_B32, O::DS_WRITE_B32, O::DS_READ_B32, O::DS_WRITE_B8, + O::DS_READ_U8, O::DS_READ_I8, O::DS_WRITE_B16, O::DS_READ_U16, + O::DS_READ_I16, O::DS_WRITE_B64, O::DS_READ_B64, O::DS_WRITE_B96, + O::DS_READ_B96, O::DS_WRITE_B128, O::DS_READ_B128, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}}; } TestCase DsReadWrite2Variants() { @@ -16096,10 +16094,10 @@ TestCase DsReadWrite2Variants() { 0x66666666u, 0x99999999u, 0xaaaaaaaau, 0xbbbbbbbbu, 0xccccccccu, 0x77777777u, 0x88888888u, 0xddddddddu, 0xeeeeeeeeu, 0xf0f0f0f0u, 0x12345678u}, - {O::VMovB32, O::DsWrite2B32, O::DsRead2B32, O::DsWriteB64, - O::DsRead2B64, O::DsWrite2B64, O::DsWrite2St64B32, - O::DsWrite2St64B64, O::DsRead2St64B64, O::BufferStoreDword, - O::SEndpgm}}; + {O::V_MOV_B32, O::DS_WRITE2_B32, O::DS_READ2_B32, O::DS_WRITE_B64, + O::DS_READ2_B64, O::DS_WRITE2_B64, O::DS_WRITE2ST64_B32, + O::DS_WRITE2ST64_B64, O::DS_READ2ST64_B64, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}}; } TestCase DsAtomicNoReturnVariants() { @@ -16130,9 +16128,9 @@ TestCase DsAtomicNoReturnVariants() { code, std::vector(9, 0), {15, 7, 0xfffffff0u, 5, 5, 20, 0x00f0u, 0xff00u, 0xf0f0u}, - {O::VMovB32, O::DsWriteB32, O::DsAddU32, O::DsSubU32, O::DsMinI32, - O::DsMaxI32, O::DsMinU32, O::DsMaxU32, O::DsAndB32, O::DsOrB32, - O::DsXorB32, O::DsReadB32, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::DS_WRITE_B32, O::DS_ADD_U32, O::DS_SUB_U32, O::DS_MIN_I32, + O::DS_MAX_I32, O::DS_MIN_U32, O::DS_MAX_U32, O::DS_AND_B32, O::DS_OR_B32, + O::DS_XOR_B32, O::DS_READ_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase DsAtomicReturnVariants() { @@ -16169,10 +16167,10 @@ TestCase DsAtomicReturnVariants() { std::vector(20, 0), {10, 10, 0xfffffff0u, 0xfffffff0u, 10, 10, 0xf0f0u, 0xf000u, 0xf00fu, 10, 15, 7, 0xfffffff0u, 5, 5, 20, 0x00f0u, 0xff00u, 0xf0f0u, 99}, - {O::VMovB32, O::DsWriteB32, O::DsAddRtnU32, O::DsSubRtnU32, - O::DsMinRtnI32, O::DsMaxRtnI32, O::DsMinRtnU32, O::DsMaxRtnU32, - O::DsAndRtnB32, O::DsOrRtnB32, O::DsXorRtnB32, O::DsWrxchgRtnB32, - O::DsReadB32, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::DS_WRITE_B32, O::DS_ADD_RTN_U32, O::DS_SUB_RTN_U32, + O::DS_MIN_RTN_I32, O::DS_MAX_RTN_I32, O::DS_MIN_RTN_U32, O::DS_MAX_RTN_U32, + O::DS_AND_RTN_B32, O::DS_OR_RTN_B32, O::DS_XOR_RTN_B32, O::DS_WRXCHG_RTN_B32, + O::DS_READ_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase DsMiscVariants() { @@ -16218,10 +16216,10 @@ TestCase DsMiscVariants() { test.code = code; test.initial = std::vector(4, 0); test.expected = {0x40000000u, 0x40400000u, 0x12345678u, 0xabcdef01u}; - test.opcodes = {O::VMovB32, O::SMovB32, O::DsWriteB32, - O::DsMinF32, O::DsMaxF32, O::DsReadB32, - O::DsSwizzleB32, O::DsWriteAddtidB32, O::DsReadAddtidB32, - O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::S_MOV_B32, O::DS_WRITE_B32, + O::DS_MIN_F32, O::DS_MAX_F32, O::DS_READ_B32, + O::DS_SWIZZLE_B32, O::DS_WRITE_ADDTID_B32, O::DS_READ_ADDTID_B32, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.compute_info.threads_num[0] = 1; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -16261,8 +16259,8 @@ TestCase DsFloatMinMaxUsesSeparateCompareOperand() { test.code = code; test.initial = std::vector(2, 0); test.expected = {0x41100000u, 0x3f800000u}; - test.opcodes = {O::VMovB32, O::DsWriteB32, O::DsMinF32, O::DsMaxF32, - O::DsReadB32, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::DS_WRITE_B32, O::DS_MIN_F32, O::DS_MAX_F32, + O::DS_READ_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.compute_info.threads_num[0] = 1; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -16285,8 +16283,8 @@ TestCase DsSwizzleInvalidSourceLaneZero() { test.name = "DsSwizzleInvalidSourceLaneZero"; test.code = code; test.expected = {0, 0, 0, 0}; - test.opcodes = {O::VMovB32, O::DsSwizzleB32, O::VLshlrevB32, - O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::DS_SWIZZLE_B32, O::V_LSHLREV_B32, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.compute_info.threads_num[0] = 4; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -16320,10 +16318,10 @@ TestCase BufferAtomicVariants() { {100, 15, 7, 0xfffffff0u, 5, 5, 20, 0x00f0u, 0xff00u, 0xf0f0u, 10, 10, 10, 0xfffffff0u, 10, 0xfffffff0u, 10, 0xf0f0u, 0xf000u, 0xf00fu}, - {O::VMovB32, O::BufferAtomicSwap, O::BufferAtomicAdd, O::BufferAtomicSub, - O::BufferAtomicSMin, O::BufferAtomicUMin, O::BufferAtomicSMax, - O::BufferAtomicUMax, O::BufferAtomicAnd, O::BufferAtomicOr, - O::BufferAtomicXor, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::BUFFER_ATOMIC_SWAP, O::BUFFER_ATOMIC_ADD, O::BUFFER_ATOMIC_SUB, + O::BUFFER_ATOMIC_SMIN, O::BUFFER_ATOMIC_UMIN, O::BUFFER_ATOMIC_SMAX, + O::BUFFER_ATOMIC_UMAX, O::BUFFER_ATOMIC_AND, O::BUFFER_ATOMIC_OR, + O::BUFFER_ATOMIC_XOR, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase BufferAtomicGlc0DoesNotReturnOldValue() { @@ -16340,7 +16338,7 @@ TestCase BufferAtomicGlc0DoesNotReturnOldValue() { code, {10, 0}, {15, 5}, - {O::VMovB32, O::BufferAtomicAdd, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::BUFFER_ATOMIC_ADD, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase BufferAtomicFMinExactRawGlcModes() { @@ -16362,8 +16360,8 @@ TestCase BufferAtomicFMinExactRawGlcModes() { test.code = code; test.initial = {0x40800000u, 0, 0}; // 4.0 test.expected = {0x3f800000u, 0x40000000u, 0x40000000u}; - test.opcodes = {O::VMovB32, O::BufferAtomicFMin, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_ATOMIC_FMIN, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; const auto descriptor = MakeStructuredStorageBufferData( 0, static_cast(test.initial.size() * sizeof(u32))); std::copy_n(descriptor.begin(), 4, test.user_data.begin() + 4); @@ -16406,7 +16404,7 @@ TestCase BufferAtomicFMinSpecialValues() { 0x80000000u, 0x00000000u, 0x00000000u, 0x80000001u, 0x40800000u, 0xbf800000u, 0x7f800000u, 0x7fc00000u, 0x3f800000u, 0x80000000u, 0x00000000u, 0x00000001u, 0x00000000u}, - {O::VMovB32, O::BufferAtomicFMin, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::BUFFER_ATOMIC_FMIN, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase BufferAtomicFMinContendedWorkgroup() { @@ -16423,7 +16421,7 @@ TestCase BufferAtomicFMinContendedWorkgroup() { test.code = code; test.initial = {0x42c80000u}; // 100.0 test.expected = {0x00000000u}; // min(100.0, 0.0 .. 63.0) - test.opcodes = {O::VCvtF32U32, O::VMovB32, O::BufferAtomicFMin, O::SEndpgm}; + test.opcodes = {O::V_CVT_F32_U32, O::V_MOV_B32, O::BUFFER_ATOMIC_FMIN, O::S_ENDPGM}; test.compute_info.threads_num[0] = 64; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -16452,8 +16450,8 @@ TestCase BufferAtomicFMaxExactRawGlcModes() { test.code = code; test.initial = {0, 0, 0, 0x3f800000u, 0, 0}; // memory[3] = 1.0 test.expected = {0, 0, 0, 0x40800000u, 0x40000000u, 0x40000000u}; - test.opcodes = {O::VMovB32, O::BufferAtomicFMax, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_ATOMIC_FMAX, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; const auto descriptor = MakeStructuredStorageBufferData( 0, static_cast(test.initial.size() * sizeof(u32))); std::copy_n(descriptor.begin(), 4, test.user_data.begin() + 4); @@ -16511,7 +16509,7 @@ TestCase BufferAtomicFMaxSpecialValues() { 0x7f800000u, 0xff800000u, 0x7fc12345u, 0x3f800000u, 0x7fa54321u, 0x3f800000u, 0x80000000u, 0x00000000u, 0x80000001u, 0x80000000u, 0x00000000u, 0x00000001u}, - {O::VMovB32, O::BufferAtomicFMax, O::BufferStoreDword, O::SEndpgm}}; + {O::V_MOV_B32, O::BUFFER_ATOMIC_FMAX, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase BufferAtomicFMaxContendedWorkgroup() { @@ -16528,7 +16526,7 @@ TestCase BufferAtomicFMaxContendedWorkgroup() { test.code = code; test.initial = {0xc2c80000u}; // -100.0 test.expected = {0x427c0000u}; // max(-100.0, 0.0 .. 63.0) - test.opcodes = {O::VCvtF32U32, O::VMovB32, O::BufferAtomicFMax, O::SEndpgm}; + test.opcodes = {O::V_CVT_F32_U32, O::V_MOV_B32, O::BUFFER_ATOMIC_FMAX, O::S_ENDPGM}; test.compute_info.threads_num[0] = 64; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -16580,8 +16578,8 @@ TestCase ImageLoadVariants() { test.expected = {0x3f800000u, 0x40000000u, 0x40400000u, 0x40800000u, 0x3f800000u, 0x40000000u, 0x40400000u, 0x40800000u, 4}; - test.opcodes = {O::VMovB32, O::ImageLoad, O::ImageLoadMip, - O::ImageGetResinfo, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_LOAD, O::IMAGE_LOAD_MIP, + O::IMAGE_GET_RESINFO, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.sampled_image_rgba = image; return test; } @@ -16614,8 +16612,8 @@ TestCase DsAppendConsumeUsesEncodedLdsSelector() { code, {}, {10, 74, 0, 10}, - {O::SMovB32, O::VMovB32, O::DsWriteB32, O::DsReadB32, O::DsAppend, - O::DsConsume, O::BufferStoreDword, O::SEndpgm}}; + {O::S_MOV_B32, O::V_MOV_B32, O::DS_WRITE_B32, O::DS_READ_B32, O::DS_APPEND, + O::DS_CONSUME, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; } TestCase DsAppendUsesEncodedGdsSelector() { @@ -16649,7 +16647,7 @@ TestCase DsAppendUsesEncodedGdsSelector() { code, {}, {10, 74, 20, 84, 40, 104}, - {O::SMovB32, O::DsAppend, O::DsConsume, O::BufferStoreDword, O::SEndpgm}}; + {O::S_MOV_B32, O::DS_APPEND, O::DS_CONSUME, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; test.gds_initial = {10, 20, 30, 40}; test.expected_gds = {10, 20, 30, 40}; return test; @@ -16681,8 +16679,8 @@ TestCase DsGdsSubdwordAndAtomicWrites() { TestCase test; test.name = "DsGdsSubdwordAndAtomics"; test.code = code; - test.opcodes = {O::VMovB32, O::VAddNcU32, O::VLshlrevB32, O::DsWriteByte, - O::DsWriteShort, O::DsAddU32, O::DsMinF32, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::V_ADD_NC_U32, O::V_LSHLREV_B32, O::DS_WRITE_B8, + O::DS_WRITE_B16, O::DS_ADD_U32, O::DS_MIN_F32, O::S_ENDPGM}; test.compute_info.threads_num[0] = 4; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -16708,7 +16706,7 @@ TestCase ImageLoadR32UintUsesIntegerSampledImage() { test.name = "ImageLoadR32UintUsesIntegerSampledImage"; test.code = code; test.expected = {0xdeadbeefu}; - test.opcodes = {O::VMovB32, O::ImageLoad, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_LOAD, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.sampled_image_rgba.resize(16); test.sampled_image_rgba[6] = 0xdeadbeefu; test.sampled_image_format = vk::Format::eR32Uint; @@ -16734,7 +16732,7 @@ TestCase ImageLoad1DUsesScalarCoordinate() { test.name = "ImageLoad1DUsesScalarCoordinate"; test.code = code; test.expected = {0xdeadbeefu}; - test.opcodes = {O::VMovB32, O::ImageLoad, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_LOAD, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.image_width = 4; test.image_height = 1; test.sampled_image_rgba = {0, 0, 0xdeadbeefu, 0}; @@ -16765,7 +16763,7 @@ TestCase ImageLoad1DArrayUsesLayerCoordinate() { test.name = "ImageLoad1DArrayUsesLayerCoordinate"; test.code = code; test.expected = {0xcafebabeu}; - test.opcodes = {O::VMovB32, O::ImageLoad, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_LOAD, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.image_width = 4; test.image_height = 1; test.sampled_image_rgba = {0, 0, 0, 0, 0, 0, 0xcafebabeu, 0}; @@ -16796,7 +16794,7 @@ TestCase ImageLoad1DArrayDescriptorUsesSelectedLayer() { test.name = "ImageLoad1DArrayDescriptorUsesSelectedLayer"; test.code = code; test.expected = {0xcafebabeu}; - test.opcodes = {O::VMovB32, O::ImageLoad, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_LOAD, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.image_width = 4; test.image_height = 1; test.sampled_image_rgba = { @@ -16840,7 +16838,7 @@ TestCase ImageLoadMipUsesVaddr2Lod2D() { test.name = "ImageLoadMipUsesVaddr2Lod2D"; test.code = code; test.expected = {0x40000000u}; - test.opcodes = {O::VMovB32, O::ImageLoadMip, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_LOAD_MIP, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.sampled_image_rgba_mips = {base, mip1}; return test; } @@ -16869,7 +16867,7 @@ TestCase ImageLoadMipNsaUsesSelectedAddressVgprs() { test.name = "ImageLoadMipNsaUsesSelectedAddressVgprs"; test.code = code; test.expected = {0x40a00000u}; - test.opcodes = {O::VMovB32, O::ImageLoadMip, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_LOAD_MIP, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.sampled_image_rgba_mips = {base, mip1}; return test; } @@ -16895,7 +16893,7 @@ TestCase ImageLoadA16UintCoordsOnGpu() { test.name = "ImageLoadA16UintCoordsOnGpu"; test.code = code; test.expected = {0x3f800000u, 0x40000000u, 0x40400000u, 0x40800000u}; - test.opcodes = {O::VMovB32, O::ImageLoad, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_LOAD, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.sampled_image_rgba = image; test.required_spirv = {"OpShiftRightLogical", "OpBitwiseAnd"}; test.forbidden_spirv = {"UnpackHalf2x16"}; @@ -16917,8 +16915,8 @@ TestCase ImageGetResinfoDmaskWidthHeight() { test.name = "ImageGetResinfoDmaskWidthHeight"; test.code = code; test.expected = {4, 2}; - test.opcodes = {O::VMovB32, O::ImageGetResinfo, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_GET_RESINFO, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; test.image_width = 4; test.image_height = 2; test.sampled_image_rgba = MakeRgbaImage(test.image_width, test.image_height); @@ -16939,8 +16937,8 @@ TestCase ImageGetResinfoDmaskMipLevels() { test.name = "ImageGetResinfoDmaskMipLevels"; test.code = code; test.expected = {2}; - test.opcodes = {O::VMovB32, O::ImageGetResinfo, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_GET_RESINFO, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; auto base = MakeRgbaImage(4, 4); auto mip1 = MakeRgbaImage(2, 2); test.sampled_image_rgba_mips = {base, mip1}; @@ -16996,9 +16994,9 @@ TestCase ImageSampleAndGather() { 0x3f800000u, 0x3f800000u, 0}; - test.opcodes = {O::VMovB32, O::ImageSample, O::ImageGetLod, - O::ImageGather4Lz, O::ImageGather4LzO, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_SAMPLE, O::IMAGE_GET_LOD, + O::IMAGE_GATHER4_LZ, O::IMAGE_GATHER4_LZ_O, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; test.sampled_image_rgba = image; return test; } @@ -17024,7 +17022,7 @@ TestCase ImageSampleA16SamplerCoordsOnGpu() { test.name = "ImageSampleA16SamplerCoordsOnGpu"; test.code = code; test.expected = {0x3f800000u, 0x40000000u, 0x40400000u, 0x40800000u}; - test.opcodes = {O::VMovB32, O::ImageSample, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_SAMPLE, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.sampled_image_rgba = image; test.required_spirv = {"UnpackHalf2x16"}; return test; @@ -17044,7 +17042,7 @@ TestCase ImageSampleOpcodeAliasUsesNormalCoords() { TestCase test; test.name = "ImageSampleOpcodeAliasUsesNormalCoords"; test.code = code; - test.opcodes = {O::VMovB32, O::ImageSample, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_SAMPLE, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.required_spirv = {"OpImageSampleExplicitLod"}; test.forbidden_spirv = {"UnpackHalf2x16"}; test.compile_only = true; @@ -17074,7 +17072,7 @@ TestCase ImageSampleA16OffsetKeepsTexelOffset32BitOnGpu() { test.name = "ImageSampleA16OffsetKeepsTexelOffset32BitOnGpu"; test.code = code; test.expected = {0x3f800000u, 0x40000000u, 0x40400000u, 0x40800000u}; - test.opcodes = {O::VMovB32, O::ImageSample, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_SAMPLE, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.sampled_image_rgba = image; test.required_spirv = {"UnpackHalf2x16"}; test.forbidden_spirv = {"OpBitFieldSExtract"}; @@ -17096,7 +17094,7 @@ TestCase ImageSampleA16CompareBiasRdna2AddressOrder() { TestCase test; test.name = "ImageSampleA16CompareBiasRdna2AddressOrder"; test.code = code; - test.opcodes = {O::VMovB32, O::ImageSample, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_SAMPLE, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.required_spirv = {"OpImageSampleDrefExplicitLod", "UnpackHalf2x16"}; test.compile_only = true; return test; @@ -17137,9 +17135,9 @@ TestCase ImageGatherCompareOpcodes() { TestCase test; test.name = "ImageGatherCompareOpcodes"; test.code = code; - test.opcodes = {O::VMovB32, O::ImageGather4C, O::ImageGather4CLz, - O::ImageGather4CO, O::ImageGather4CLzO, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_GATHER4_C, O::IMAGE_GATHER4_C_LZ, + O::IMAGE_GATHER4_C_O, O::IMAGE_GATHER4_C_LZ_O, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; test.required_spirv = {"OpImageDrefGather", "OpBitFieldSExtract"}; test.compile_only = true; return test; @@ -17182,8 +17180,8 @@ TestCase ImageStoreVariants() { test.name = "ImageStoreVariants"; test.code = code; test.expected = {0x12345678u}; - test.opcodes = {O::VMovB32, O::ImageStore, O::ImageStoreMip, - O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_STORE, O::IMAGE_STORE_MIP, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.storage_image_rgba = MakeRgbaImage(4, 4); test.storage_image_r32ui = std::vector(16, 0); test.expected_storage_image_rgba = expected_image; @@ -17329,7 +17327,7 @@ TestCase ImageStoreMipSelectsPpsa01340Descriptor() { TestCase test; test.name = "ImageStoreMipSelectsPpsa01340Descriptor"; test.code = std::move(code); - test.opcodes = {O::VMovB32, O::ImageStoreMip, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_STORE_MIP, O::S_ENDPGM}; const std::array descriptor{ 0x0294dc00u, 0xc4700000u, 0x00b3c13fu, 0x91b31facu, 0x00000000u, 0x00700030u, 0xb07b0000u, 0x0002ac3cu}; @@ -17359,7 +17357,7 @@ TestCase ImageStoreRgbOneUsesInverseSwizzle() { TestCase test; test.name = "ImageStoreRgbOneUsesInverseSwizzle"; test.code = code; - test.opcodes = {O::VMovB32, O::ImageStore, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_STORE, O::S_ENDPGM}; test.has_user_data = true; test.user_data[0] = 0x1000u; test.user_data[1] = @@ -17399,7 +17397,7 @@ TestCase ImageStoreBgraUsesInverseSwizzle() { TestCase test; test.name = "ImageStoreBgraUsesInverseSwizzle"; test.code = code; - test.opcodes = {O::VMovB32, O::ImageStore, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_STORE, O::S_ENDPGM}; test.has_user_data = true; test.user_data[0] = 0x1000u; test.user_data[1] = @@ -17431,7 +17429,7 @@ TestCase ImageStoreYzwxUsesInverseSwizzle() { TestCase test; test.name = "ImageStoreYzwxUsesInverseSwizzle"; test.code = code; - test.opcodes = {O::VMovB32, O::ImageStore, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_STORE, O::S_ENDPGM}; test.user_data = MakeStorageTextureData(Prospero::BufferFormat::k32_32_32_32Float); test.has_user_data = true; @@ -17461,7 +17459,7 @@ TestCase ImageStoreR32FloatUsesFormatlessStorageImage() { TestCase test; test.name = "ImageStoreR32FloatUsesFormatlessStorageImage"; test.code = code; - test.opcodes = {O::VMovB32, O::ImageStore, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_STORE, O::S_ENDPGM}; test.storage_image_format = vk::Format::eR32Sfloat; test.storage_image_dwords_per_pixel = 1; test.storage_image_rgba = std::vector(16, 0); @@ -17490,7 +17488,7 @@ TestCase ImageStoreR32SintUsesRawUintView() { TestCase test; test.name = "ImageStoreR32SintUsesRawUintView"; test.code = code; - test.opcodes = {O::VMovB32, O::ImageStore, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_STORE, O::S_ENDPGM}; test.user_data = MakeStorageTextureData(Prospero::BufferFormat::k32SInt); test.has_user_data = true; test.storage_image_r32ui = std::vector(16, 0); @@ -17517,7 +17515,7 @@ TestCase ImageStoreR32UintUsesUintStorageImage() { TestCase test; test.name = "ImageStoreR32UintUsesUintStorageImage"; test.code = code; - test.opcodes = {O::VMovB32, O::ImageStore, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_STORE, O::S_ENDPGM}; test.user_data = MakeStorageTextureData(Prospero::BufferFormat::k32UInt); test.has_user_data = true; test.storage_image_rgba = MakeRgbaImage(4, 4); @@ -17537,7 +17535,7 @@ TestCase ComputeTgSizeSgprUsesWaveMetadata() { TestCase test; test.name = "ComputeTgSizeSgprUsesWaveMetadata"; test.code = code; - test.opcodes = {O::VMovB32, O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.compute_info.threads_num[0] = 4; test.compute_info.threads_num[1] = 4; test.compute_info.threads_num[2] = 16; @@ -17576,9 +17574,9 @@ TestCase ImageAtomicVariants() { test.name = "ImageAtomicVariants"; test.code = code; test.expected = {10, 10, 0xf0f0u, 0xf000u, 0xf00fu}; - test.opcodes = {O::VMovB32, O::ImageAtomicAdd, O::ImageAtomicUMin, - O::ImageAtomicAnd, O::ImageAtomicOr, O::ImageAtomicXor, - O::BufferStoreDword, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_ATOMIC_ADD, O::IMAGE_ATOMIC_UMIN, + O::IMAGE_ATOMIC_AND, O::IMAGE_ATOMIC_OR, O::IMAGE_ATOMIC_XOR, + O::BUFFER_STORE_DWORD, O::S_ENDPGM}; test.storage_image_rgba = MakeRgbaImage(4, 4); test.storage_image_r32ui = std::vector(16, 0); for (u32 i = 0; i < static_cast(std::size(initial)); i++) { @@ -17610,8 +17608,8 @@ TestCase ImageAtomicGlc0DoesNotReturnOldValue() { test.name = "ImageAtomicGlc0DoesNotReturnOldValue"; test.code = code; test.expected = {5}; - test.opcodes = {O::VMovB32, O::ImageAtomicAdd, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::IMAGE_ATOMIC_ADD, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; test.storage_image_rgba = MakeRgbaImage(4, 4); test.storage_image_r32ui = std::vector(16, 0); test.storage_image_r32ui[0] = 10; @@ -17636,8 +17634,8 @@ GraphicsCase GraphicsInterpolationExport() { return {"GraphicsInterpolationExport", code, {0x3e800000u, 0x3f000000u, 0x3f400000u, 0x3f800000u}, - {O::VInterpP1F32, O::VInterpP2F32, O::VInterpMovF32, O::VMovB32, - O::Exp, O::SEndpgm}}; + {O::V_INTERP_P1_F32, O::V_INTERP_P2_F32, O::V_INTERP_MOV_F32, O::V_MOV_B32, + O::EXP, O::S_ENDPGM}}; } GraphicsCase GraphicsFlatInterpolatorExport() { @@ -17656,7 +17654,7 @@ GraphicsCase GraphicsFlatInterpolatorExport() { test.name = "GraphicsFlatInterpolatorExport"; test.fragment_code = code; test.expected_pixel = {0x3e800000u, 0x00000000u, 0x00000000u, 0x3f800000u}; - test.opcodes = {O::VInterpMovF32, O::VMovB32, O::Exp, O::SEndpgm}; + test.opcodes = {O::V_INTERP_MOV_F32, O::V_MOV_B32, O::EXP, O::S_ENDPGM}; test.pixel_interpolator_settings = {0x00000400u}; test.vertices = { 0xbf800000u, 0xbf800000u, 0x3e800000u, 0x00000000u, 0x00000000u, @@ -17684,8 +17682,8 @@ GraphicsCase GraphicsDsAddtidScratchExport() { return {"GraphicsDsAddtidScratchExport", code, {0x3f000000u, 0x3f000000u, 0x3f000000u, 0x3f000000u}, - {O::SMovB32, O::VMovB32, O::DsWriteAddtidB32, O::DsReadAddtidB32, - O::Exp, O::SEndpgm}}; + {O::S_MOV_B32, O::V_MOV_B32, O::DS_WRITE_ADDTID_B32, O::DS_READ_ADDTID_B32, + O::EXP, O::S_ENDPGM}}; } GraphicsCase GraphicsDirectSgprPushConstantExport() { @@ -17707,7 +17705,7 @@ GraphicsCase GraphicsDirectSgprPushConstantExport() { test.name = "GraphicsDirectSgprPushConstantExport"; test.fragment_code = code; test.expected_pixel = values; - test.opcodes = {O::VMovB32, O::Exp, O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::EXP, O::S_ENDPGM}; for (size_t i = 0; i < values.size(); i++) { test.user_data[i] = values[i]; @@ -17734,7 +17732,7 @@ GraphicsCase GraphicsInlineSrtScalarPromotionExport() { test.name = "GraphicsInlineSrtScalarPromotionExport"; test.fragment_code = code; test.expected_pixel = values; - test.opcodes = {O::VCvtPkrtzF16F32, O::Exp, O::SEndpgm}; + test.opcodes = {O::V_CVT_PKRTZ_F16_F32, O::EXP, O::S_ENDPGM}; for (size_t i = 0; i < values.size(); i++) { test.user_data[i] = values[i]; @@ -17762,7 +17760,7 @@ GraphicsCase GraphicsNullVmExportDiscardsInactiveExec() { return {"GraphicsNullVmExportDiscardsInactiveExec", code, {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u}, - {O::VMovB32, O::Exp, O::SMovB64, O::SEndpgm}}; + {O::V_MOV_B32, O::EXP, O::S_MOV_B64, O::S_ENDPGM}}; } GraphicsCase GraphicsMrt0OffVmExportDiscardsInactiveExec() { @@ -17783,7 +17781,7 @@ GraphicsCase GraphicsMrt0OffVmExportDiscardsInactiveExec() { return {"GraphicsMrt0OffVmExportDiscardsInactiveExec", code, {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u}, - {O::VMovB32, O::Exp, O::SMovB64, O::SEndpgm}}; + {O::V_MOV_B32, O::EXP, O::S_MOV_B64, O::S_ENDPGM}}; } GraphicsCase GraphicsFinalVmExportSupersedesEarlierVmMask() { @@ -17810,7 +17808,7 @@ GraphicsCase GraphicsFinalVmExportSupersedesEarlierVmMask() { return {"GraphicsFinalVmExportSupersedesEarlierVmMask", code, {0x40400000u, 0x40800000u, 0x40a00000u, 0x40c00000u}, - {O::VMovB32, O::SMovB64, O::Exp, O::SMovB32, O::SEndpgm}}; + {O::V_MOV_B32, O::S_MOV_B64, O::EXP, O::S_MOV_B32, O::S_ENDPGM}}; } GraphicsCase GraphicsBranchPathFinalVmExportDiscardsInactiveExec() { @@ -17846,8 +17844,8 @@ GraphicsCase GraphicsBranchPathFinalVmExportDiscardsInactiveExec() { return {"GraphicsBranchPathFinalVmExportDiscardsInactiveExec", code, {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u}, - {O::VMovB32, O::Exp, O::SMovB64, O::SCmpEqU32, O::SCbranchScc1, - O::SMovB32, O::SEndpgm}}; + {O::V_MOV_B32, O::EXP, O::S_MOV_B64, O::S_CMP_EQ_U32, O::S_CBRANCH_SCC1, + O::S_MOV_B32, O::S_ENDPGM}}; } TestCase MultipleWorkitemsGlobalId() { @@ -17867,8 +17865,8 @@ TestCase MultipleWorkitemsGlobalId() { test.name = "MultipleWorkitemsGlobalId"; test.code = code; test.expected = {64, 65, 66, 67, 68, 69, 70, 71}; - test.opcodes = {O::VMovB32, O::VLshlrevB32, O::VAddNcU32, O::BufferStoreDword, - O::SEndpgm}; + test.opcodes = {O::V_MOV_B32, O::V_LSHLREV_B32, O::V_ADD_NC_U32, O::BUFFER_STORE_DWORD, + O::S_ENDPGM}; test.compute_info.threads_num[0] = 4; test.compute_info.threads_num[1] = 1; test.compute_info.threads_num[2] = 1; @@ -17895,8 +17893,8 @@ TestCase DispatcherIrreducibleControlFlow() { test.name = "DispatcherIrreducibleControlFlow"; test.code = code; test.expected = {7}; - test.opcodes = {O::SCbranchScc1, O::VMovB32, O::BufferStoreDword, - O::SCbranchScc0, O::SBranch, O::SEndpgm}; + test.opcodes = {O::S_CBRANCH_SCC1, O::V_MOV_B32, O::BUFFER_STORE_DWORD, + O::S_CBRANCH_SCC0, O::S_BRANCH, O::S_ENDPGM}; return test; } diff --git a/tests/shaderCfgTests.cpp b/tests/shaderCfgTests.cpp index eea9a6b5d..04d0f1902 100644 --- a/tests/shaderCfgTests.cpp +++ b/tests/shaderCfgTests.cpp @@ -1050,11 +1050,11 @@ void TestNewShaderRecompilerSMovB32() { Check(!result.spirv.empty(), "new shader recompiler produced no SPIR-V"); Check(result.spirv.front() == 0x07230203u, "new shader recompiler did not emit SPIR-V binary"); - Check(Common::ContainsStr(result.decoded_dump, "s_mov_b32 s0, 1"), + Check(Common::ContainsStr(result.decoded_dump, "S_MOV_B32 s0, 1"), "new decoder did not decode inline S_MOV_B32 operand"); - Check(Common::ContainsStr(result.decoded_dump, "s_mov_b32 s1, 0x12345678"), + Check(Common::ContainsStr(result.decoded_dump, "S_MOV_B32 s1, 0x12345678"), "new decoder did not decode literal S_MOV_B32 operand"); - Check(Common::ContainsStr(result.decoded_dump, "s_mov_b32 s2, s1"), + Check(Common::ContainsStr(result.decoded_dump, "S_MOV_B32 s2, s1"), "new decoder did not decode register S_MOV_B32 operand"); Check(Common::ContainsStr(result.ir_dump, "StoreBufferU32") && Common::ContainsStr(result.ir_dump, "0x00000001") && @@ -2844,9 +2844,8 @@ void TestNewShaderRecompilerCapturedVop1SdwaByteConvert() { std::string error; Check(ShaderRecompiler::TryRecompile(shader, options, result, &error), error.c_str()); - Check(Common::ContainsStr( - result.decoded_dump, - "v_cvt_f32_ubyte0 v4, v9.sdwa(sel=4,sext=0)"), + Check(Common::ContainsStr(result.decoded_dump, + "V_CVT_F32_UBYTE0 v4, v9.sdwa(sel=4,sext=0)"), "captured V_CVT_F32_UBYTE0 SDWA instruction was not decoded"); size_t extracts = 0; @@ -3458,7 +3457,7 @@ void TestNewShaderDecoderArchitecture() { std::string error; Check(DecodeInstruction(offset_code, 1u, direct, &error), error.c_str()); Check(direct.pc == 4u && direct.family == Family::VOP1 && - direct.opcode == Opcode::VMovB32 && direct.dst.reg == 2u && + direct.opcode == Opcode::V_MOV_B32 && direct.dst.reg == 2u && direct.src0.reg == 3u, "single-instruction decoder failed at a nonzero offset"); @@ -3489,7 +3488,7 @@ void TestNewShaderDecoderArchitecture() { Check(DecodeInstruction(scalar_signed_bfe, 0u, signed_bfe, &error), error.c_str()); Check(signed_bfe.family == Family::SOP2 && - signed_bfe.opcode == Opcode::SBfeI32 && + signed_bfe.opcode == Opcode::S_BFE_I32 && signed_bfe.word_count == 2u && signed_bfe.dst.kind == OperandKind::VccLo && signed_bfe.src0.reg == 20u && signed_bfe.src1.value == 0x0004001cu, @@ -3503,7 +3502,7 @@ void TestNewShaderDecoderArchitecture() { Check(DecodeInstruction(vop2_sdwa_partial_dst, 0u, sdwa_add, &error), error.c_str()); Check(sdwa_add.family == Family::VOP2 && - sdwa_add.opcode == Opcode::VAddNcU32 && sdwa_add.word_count == 2u && + sdwa_add.opcode == Opcode::V_ADD_NC_U32 && sdwa_add.word_count == 2u && sdwa_add.dst.reg == 4u && sdwa_add.dst.sdwa_sel == 5u && sdwa_add.dst.sdwa_dst_unused == 2u && sdwa_add.src0.kind == OperandKind::VccLo && @@ -3524,13 +3523,13 @@ void TestNewShaderDecoderArchitecture() { EncodeDs1(2, 0, 1)}; Instruction ds; Check(DecodeInstruction(ds_code, 0u, ds, &error), error.c_str()); - Check(ds.opcode == Opcode::DsReadB32 && ds.gds, + Check(ds.opcode == Opcode::DS_READ_B32 && ds.gds, "DS decoder lost the GFX10 opcode or GDS fields"); const uint32_t boot_ds[] = {0xd8d4c480u, 0x45000045u}; Instruction boot; Check(DecodeInstruction(boot_ds, 0u, boot, &error), error.c_str()); - Check(boot.opcode == Opcode::DsSwizzleB32 && boot.offset == 0xc480u, + Check(boot.opcode == Opcode::DS_SWIZZLE_B32 && boot.offset == 0xc480u, "DS decoder rejected a captured boot-shader instruction"); constexpr uint32_t packed_source_selectors[][2] = { @@ -3565,7 +3564,7 @@ void TestNewShaderRecompilerRejectsDppOn64BitCompares() { Check(program.instructions.size() == 2u, "64-bit VOPC DPP decode did not consume its modifier word"); const auto &compare = program.instructions.front(); - Check(compare.opcode == ShaderRecompiler::Decoder::Opcode::Unsupported, + Check(compare.opcode == ShaderRecompiler::Decoder::Opcode::UNSUPPORTED, "64-bit VOPC illegally accepted a DPP modifier"); Check(Common::ContainsStr(compare.unsupported_reason, "VOPC DPP modifier is not supported for opcode"), @@ -3578,7 +3577,7 @@ void TestNewShaderRecompilerIrLookupMissFailsExplicitly() { ShaderRecompiler::Decoder::Instruction missing; missing.pc = 0u; missing.family = ShaderRecompiler::Decoder::Family::VOP1; - missing.opcode = ShaderRecompiler::Decoder::Opcode::Unknown; + missing.opcode = ShaderRecompiler::Decoder::Opcode::UNKNOWN; decoded.instructions.push_back(missing); ShaderRecompiler::CFG::Graph cfg; @@ -3600,7 +3599,7 @@ void TestNewShaderRecompilerIrLookupMissFailsExplicitly() { decoded.instructions.front().family = ShaderRecompiler::Decoder::Family::MUBUF; decoded.instructions.front().opcode = - ShaderRecompiler::Decoder::Opcode::VAddNcU32; + ShaderRecompiler::Decoder::Opcode::V_ADD_NC_U32; error.clear(); Check(!ShaderRecompiler::IR::LowerProgram(decoded, cfg, ShaderType::Compute, 64u, ir, &error), @@ -3650,8 +3649,8 @@ void TestNewShaderRecompilerMemoryFamilyLowering() { "new decoder did not decode SMEM scalar-buffer dword load"); Check(Common::ContainsStr(result.decoded_dump, "s_buffer_load_dword s1, s8"), "SMEM scalar-buffer SBASE was not decoded as an SGPR-pair index"); - Check(Common::ContainsStr(result.decoded_dump, "buffer_load_dword"), - "new decoder did not decode MUBUF dword load"); + Check(Common::ContainsStr(result.decoded_dump, "buffer_load_dword"), + "new decoder did not decode MUBUF dword load"); Check(Common::ContainsStr(result.decoded_dump, "buffer_store_dword"), "new decoder did not decode MUBUF dword store"); Check(Common::ContainsStr(result.decoded_dump, "ds_read_b32"), @@ -6225,7 +6224,7 @@ void TestNewShaderRecompilerCfgPostEndTargetMergePS() { error.c_str()); } Check(ok, "post-end target PS shader failed to compile"); - Check(Common::ContainsStr(result.decoded_dump, "0x0000000c: s_mov_b32"), + Check(Common::ContainsStr(result.decoded_dump, "0x0000000c: S_MOV_B32"), "post-end branch target was not decoded"); Check(Common::ContainsStr(result.ir_dump, "mode=structured"), "post-end terminal branch should stay on structured path"); @@ -7366,7 +7365,7 @@ void TestNewShaderRecompilerBufferLoadsGuardedByExec() { std::string error; Check(ShaderRecompiler::TryRecompile(shader, options, result, &error), error.c_str()); - Check(Common::ContainsStr(result.decoded_dump, "buffer_load_dword"), + Check(Common::ContainsStr(result.decoded_dump, "BUFFER_LOAD_DWORD"), "buffer load guard regression did not decode MUBUF load"); CheckSpirvBinaryValidates(result.spirv); @@ -7407,7 +7406,7 @@ void TestNewShaderRecompilerBufferAtomicsGuardedByBounds() { std::string error; Check(ShaderRecompiler::TryRecompile(shader, options, result, &error), error.c_str()); - Check(Common::ContainsStr(result.decoded_dump, "buffer_atomic_add"), + Check(Common::ContainsStr(result.decoded_dump, "BUFFER_ATOMIC_ADD"), "buffer atomic bounds regression did not decode MUBUF atomic"); CheckSpirvBinaryValidates(result.spirv);