mirror of
https://github.com/KytyPS5/KytyPS5.git
synced 2026-10-25 20:36:54 +01:00
shader: release descriptor dependencies
This commit is contained in:
nmzik
@@ -32009,6 +32009,61 @@ void CheckImageSamplerSpecialization() {
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std::printf("[host] %-32s ok\n", "ImageSpecializationPipelineId");
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}
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void CheckResourcePlanHandoff() {
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constexpr const char *name = "ResourcePlanHandoff";
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using namespace ShaderRecompiler::IR;
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for (const bool numeric_read : {false, true}) {
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std::vector<u32> code{EncodeSmem0(0x02, 8), EncodeSmem1(0, 125),
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EncodeSmem0(0x08, 12, 4), EncodeSmem1(0, 125)};
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if (numeric_read) {
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code.insert(code.end(), {EncodeSmem0(0x00, 13), EncodeSmem1(16, 125)});
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AppendVop3(&code, 0x125u, 0, 12, 13); // v_add_nc_u32 v0, s12, s13
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} else {
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code.push_back(EncodeVop1(0x01, 0, 12));
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}
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code.insert(code.end(), {EncodeMubuf0(0x1c, 0, false, false),
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EncodeMubuf1(0, 2, 0)});
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AppendEnd(&code);
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std::array<u32, 2> user_data{};
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std::vector<u32> memory{0x1000u, 0u, 16u, 0x30000000u | DstSel(4, 5, 6, 7), 7u};
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ShaderComputeInputInfo compute{};
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ShaderRecompiler::CompileOptions options;
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options.stage = ShaderType::Compute;
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options.user_data = user_data;
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options.input_info.compute = &compute;
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auto translated = ShaderRecompiler::TranslateProgram(code, options);
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auto plan = ExtractResourcePlan(translated.program);
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ResourceSnapshot snapshot;
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ResourceSpecialization specialization;
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const SrtRuntime runtime{.user_data = user_data,
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.read_memory = ReadTestMemory,
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.userdata = &memory};
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Require(name, "initial descriptors",
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MaterializeResources(plan, runtime, snapshot, specialization) &&
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snapshot.buffers.size() == 1 && snapshot.buffers[0].dwords[0] == 0x1000u,
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"SRT buffer descriptor was not materialized");
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auto compiled = ShaderRecompiler::CompileProgram(std::move(translated), options,
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specialization);
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ValidateSpirv(name, compiled.spirv);
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const auto &bindings = compiled.program.bindings;
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Require(name, "GPU data requirements",
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bindings.user_data_registers.empty() && bindings.memory_offset_count == 1 &&
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(FindBinding(bindings, DescriptorBindingKind::FlattenedSrt) != nullptr) ==
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numeric_read,
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"descriptor-only shader retained SRT uploads or live scalar data was removed");
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memory[0] = 0x2000u;
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memory[4] = 13u;
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Require(name, "independent host plan",
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MaterializeResources(plan, runtime, snapshot, specialization) &&
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snapshot.buffers[0].dwords[0] == 0x2000u &&
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(!numeric_read || snapshot.flattened_srt.back() == 13u),
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"compiled shader cleanup invalidated or froze the host resource plan");
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}
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std::printf("[host] %-32s ok\n", name);
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}
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void CheckNativeImageDescriptorTypes() {
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using ShaderRecompiler::IR::DescriptorBindingKind;
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using ShaderRecompiler::IR::FirstImageBinding;
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@@ -33217,7 +33272,7 @@ void CheckPm4NativeTargetGeometryRegisters(RenderContext &renderer) {
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std::printf("[host] %-32s ok\n", "Pm4NativeTargetGeometry");
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}
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void CheckPm4PrivateAgcShaderRegisters(RenderContext &renderer) {
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void CheckPm4IndirectShaderRegisters(RenderContext &renderer) {
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GraphicsInitJmpTables();
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CommandProcessor processor(renderer, 0);
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std::array<uint32_t, 24> registers{
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@@ -33245,13 +33300,13 @@ void CheckPm4PrivateAgcShaderRegisters(RenderContext &renderer) {
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g_hw_sh_indirect_func[Pm4::SPI_SHADER_PGM_RSRC4_GS] != nullptr &&
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g_hw_sh_indirect_func[Pm4::SPI_SHADER_PGM_CHKSUM_HS] != nullptr &&
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g_hw_sh_indirect_func[Pm4::SPI_SHADER_PGM_RSRC4_HS] != nullptr;
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Require("Pm4PrivateAgcShaderRegisters", "private shader register stream",
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Require("Pm4IndirectShaderRegisters", "indirect shader register stream",
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handlers_present &&
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processor.Process(execution, command) == Pm4ProcessResult::Complete,
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"private AGC shader registers were rejected by SET_SH_REG_INDIRECT");
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"shader registers were rejected by SET_SH_REG_INDIRECT");
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const auto &vs = processor.GetShCtx().GetVs();
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const auto &ps = processor.GetShCtx().GetPs().ps_regs;
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Require("Pm4PrivateAgcShaderRegisters", "native state around front metadata",
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Require("Pm4IndirectShaderRegisters", "native state around front metadata",
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vs.es_regs.data_addr == 0x50025e500ull &&
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vs.gs_regs.rsrc1.vgprs == 2u &&
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vs.gs_regs.rsrc1.gs_vgpr_component_count == 3u &&
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@@ -33260,10 +33315,10 @@ void CheckPm4PrivateAgcShaderRegisters(RenderContext &renderer) {
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ps.data_addr == 0x500010400ull && ps.rsrc1.vgprs == 13u &&
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ps.rsrc2.user_sgpr == 30u,
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"GS-front metadata changed native GS state or prevented later PS writes");
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std::printf("[host] %-32s ok\n", "Pm4PrivateAgcShaderRegisters");
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std::printf("[host] %-32s ok\n", "Pm4IndirectShaderRegisters");
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}
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void CheckPm4PrivateAgcUconfigRegisters(RenderContext &renderer) {
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void CheckPm4IndirectUconfigRegisters(RenderContext &renderer) {
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GraphicsInitJmpTables();
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CommandProcessor processor(renderer, 0);
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std::array<uint32_t, 2> registers{
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@@ -33278,11 +33333,11 @@ void CheckPm4PrivateAgcUconfigRegisters(RenderContext &renderer) {
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Pm4Execution execution;
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const bool handler_present =
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g_hw_uc_indirect_func[Pm4::UC_PARAMETER_OVERSUBSCRIPTION] != nullptr;
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Require("Pm4PrivateAgcUconfigRegisters", "private UCONFIG register stream",
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Require("Pm4IndirectUconfigRegisters", "indirect UCONFIG register stream",
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handler_present &&
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processor.Process(execution, command) == Pm4ProcessResult::Complete,
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"private AGC UCONFIG register was rejected by SET_UCONFIG_REG_INDIRECT");
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std::printf("[host] %-32s ok\n", "Pm4PrivateAgcUconfigRegisters");
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"UCONFIG register was rejected by SET_UCONFIG_REG_INDIRECT");
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std::printf("[host] %-32s ok\n", "Pm4IndirectUconfigRegisters");
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}
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void CheckPm4DirectShaderRegisterFallback(RenderContext &renderer) {
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@@ -33538,12 +33593,12 @@ void CheckPm4DepthRenderOverride(RenderContext &renderer) {
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std::printf("[host] %-32s ok\n", name);
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}
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void CheckAgcShaderFusion() {
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void CheckShaderFusion() {
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struct Case {
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bool gs;
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uint32_t front1, front2, back1, back2, fused1, fused2, older2;
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};
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// Register results from both exports in the supplied libSceAgc.sprx.
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// Expected register results for both shader-fusion variants.
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constexpr Case cases[]{
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{true, 0x600c0007, 0x00030010, 0x600c0007, 0x008b0000,
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0x600c0007, 0x008b0010, 0x008b0010}, // Captured volume ES + GS.
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@@ -33585,7 +33640,7 @@ void CheckAgcShaderFusion() {
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const auto fuse = older ? Gen5::AgcUnknownNApJjpKNBl4 : Gen5::AgcUnknownFuseShaderHalves;
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const auto result = fuse(&fused, &front, &back, in_place ? nullptr : scratch.data());
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const auto *regs = fused.sh_registers;
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Require("AgcShaderFusion", "native fused registers",
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Require("ShaderFusion", "native fused registers",
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result == 0 && regs == (in_place ? registers.data() : scratch.data()) &&
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regs[0].value == 0x1234 && regs[1].value == 0x5678 &&
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regs[2].value == c.fused1 && regs[3].value == (older ? c.older2 : c.fused2) &&
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@@ -33594,14 +33649,14 @@ void CheckAgcShaderFusion() {
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: Prospero::ShaderBinaryType::kHs) &&
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fused.user_data == (older ? &user_data : nullptr) &&
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(in_place || std::memcmp(registers.data(), back_regs.data(), sizeof(registers)) == 0),
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"AGC lost front resources or changed the export's allocation/metadata behavior");
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"shader fusion lost front resources or changed the export's allocation/metadata behavior");
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}
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}
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}
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std::printf("[host] %-32s ok\n", "AgcShaderFusion");
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std::printf("[host] %-32s ok\n", "ShaderFusion");
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}
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struct AgcCommandBufferLayout {
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struct CommandBufferLayout {
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using Callback = KYTY_SYSV_ABI bool (*)(Gen5::CommandBuffer *, uint32_t,
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void *);
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@@ -33613,10 +33668,10 @@ struct AgcCommandBufferLayout {
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void *user_data;
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uint32_t reserved_dw;
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};
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static_assert(offsetof(AgcCommandBufferLayout, cursor_up) == 0x10);
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static_assert(offsetof(AgcCommandBufferLayout, reserved_dw) == 0x30);
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static_assert(offsetof(CommandBufferLayout, cursor_up) == 0x10);
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static_assert(offsetof(CommandBufferLayout, reserved_dw) == 0x30);
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void CheckAgcWaitPackets(RenderContext &renderer) {
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void CheckPm4WaitPackets(RenderContext &renderer) {
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GraphicsInitJmpTables();
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CommandProcessor processor(renderer, 0);
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constexpr auto packet_mismatch = static_cast<int>(0x8a6c000cu);
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@@ -33628,18 +33683,18 @@ void CheckAgcWaitPackets(RenderContext &renderer) {
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alignas(8) uint32_t label32 = 0x11223344u;
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std::array<uint32_t, 16> packet32{};
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AgcCommandBufferLayout dcb32{packet32.data(),
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packet32.data() + packet32.size(),
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packet32.data(),
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packet32.data() + packet32.size(),
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nullptr,
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nullptr,
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0};
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CommandBufferLayout dcb32{packet32.data(),
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packet32.data() + packet32.size(),
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packet32.data(),
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packet32.data() + packet32.size(),
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nullptr,
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nullptr,
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0};
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const auto address32 = reinterpret_cast<uint64_t>(&label32);
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auto *emitted32 =
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Gen5::AgcDcbWaitRegMem(reinterpret_cast<Gen5::CommandBuffer *>(&dcb32), 0,
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3, 0, 0, &label32, label32, UINT32_MAX, 400);
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Require("AgcWaitPackets", "native 32-bit packet",
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Require("Pm4WaitPackets", "native 32-bit packet",
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Gen5::AgcDcbWaitOnAddressGetSize(0) == 56 &&
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emitted32 == packet32.data() &&
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dcb32.cursor_up == packet32.data() + 14 &&
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@@ -33656,14 +33711,14 @@ void CheckAgcWaitPackets(RenderContext &renderer) {
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packet32[10] == 25u && packet32[11] == 0xc0017904u &&
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packet32[12] == 0x342u && packet32[13] == 0xc8000000u &&
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execute(packet32.data(), 14),
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"32-bit waitOnAddress stream differs from native AGC");
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"32-bit wait packet differs from the expected stream");
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alignas(8) uint32_t patched_label32 = 0xaabbccddu;
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const auto patched_address32 = reinterpret_cast<uint64_t>(&patched_label32);
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packet32[6] |= 0x2u;
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packet32[7] |= 0xa5a40000u;
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Require(
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"AgcWaitPackets", "native 32-bit patch",
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"Pm4WaitPackets", "native 32-bit patch",
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Gen5::AgcWaitRegMemPatchAddress(packet32.data(), &patched_label32) == 0 &&
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Gen5::AgcWaitRegMemPatchReference(packet32.data(), patched_label32) ==
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0 &&
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@@ -33681,18 +33736,18 @@ void CheckAgcWaitPackets(RenderContext &renderer) {
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alignas(8) uint64_t label64 = 0x1122334455667788ull;
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std::array<uint32_t, 16> packet64{};
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AgcCommandBufferLayout dcb64{packet64.data(),
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packet64.data() + packet64.size(),
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packet64.data(),
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packet64.data() + packet64.size(),
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nullptr,
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nullptr,
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0};
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CommandBufferLayout dcb64{packet64.data(),
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packet64.data() + packet64.size(),
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packet64.data(),
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packet64.data() + packet64.size(),
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nullptr,
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nullptr,
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0};
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const auto address64 = reinterpret_cast<uint64_t>(&label64);
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auto *emitted64 =
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Gen5::AgcDcbWaitRegMem(reinterpret_cast<Gen5::CommandBuffer *>(&dcb64), 1,
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3, 0, 0, &label64, label64, UINT64_MAX, 400);
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Require("AgcWaitPackets", "native 64-bit packet",
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Require("Pm4WaitPackets", "native 64-bit packet",
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Gen5::AgcDcbWaitOnAddressGetSize(1) == 64 &&
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Gen5::AgcDcbWaitOnAddressGetSize(2) == 0 &&
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emitted64 == packet64.data() &&
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@@ -33712,14 +33767,14 @@ void CheckAgcWaitPackets(RenderContext &renderer) {
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packet64[12] == 25u && packet64[13] == 0xc0017904u &&
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packet64[14] == 0x342u && packet64[15] == 0xc8000000u &&
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execute(packet64.data(), packet64.size()),
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"64-bit waitOnAddress stream differs from native AGC");
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"64-bit wait packet differs from the expected stream");
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alignas(8) uint64_t patched_label64 = 0x11223344aabbccddull;
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const auto patched_address64 = reinterpret_cast<uint64_t>(&patched_label64);
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packet64[6] |= 0x5u;
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packet64[7] |= 0x5a580000u;
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Require(
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"AgcWaitPackets", "native 64-bit patch",
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"Pm4WaitPackets", "native 64-bit patch",
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Gen5::AgcWaitRegMemPatchAddress(packet64.data(), &patched_label64) == 0 &&
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Gen5::AgcWaitRegMemPatchReference(packet64.data(),
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0xdeadbeefaabbccddull) == 0 &&
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@@ -33740,18 +33795,18 @@ void CheckAgcWaitPackets(RenderContext &renderer) {
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std::array<uint32_t, 16> invalid{};
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const uint32_t short_payload = 0x342u;
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Require(
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"AgcWaitPackets", "invalid packet",
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"Pm4WaitPackets", "invalid packet",
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Gen5::AgcWaitRegMemPatchAddress(invalid.data(), &label32) ==
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packet_mismatch &&
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Gen5::AgcWaitRegMemPatchReference(invalid.data(), label32) ==
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packet_mismatch &&
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!Gen5::AgcIsInternalDataPacket(
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KYTY_PM4(2, Pm4::IT_SET_UCONFIG_REG, 1), &short_payload),
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"native wait patch accepted a packet without the AGC metadata prefix");
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std::printf("[host] %-32s ok\n", "AgcWaitPackets");
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"wait patch accepted a packet without the metadata prefix");
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std::printf("[host] %-32s ok\n", "Pm4WaitPackets");
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}
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void CheckAgcDrawIndirectMultiPacket(RenderContext &renderer) {
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void CheckPm4DrawIndirectMultiPacket(RenderContext &renderer) {
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GraphicsInitJmpTables();
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CommandProcessor processor(renderer, 0);
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const auto execute = [&](uint32_t *packet, uint32_t size_dw) {
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@@ -33771,19 +33826,19 @@ void CheckAgcDrawIndirectMultiPacket(RenderContext &renderer) {
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0x00000022u, 0xc0017904u, 0x00000342u, 0xc6000000u};
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std::array<uint32_t, 16> packet{};
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AgcCommandBufferLayout dcb{packet.data(),
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packet.data() + packet.size(),
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packet.data(),
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packet.data() + packet.size(),
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nullptr,
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nullptr,
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0};
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CommandBufferLayout dcb{packet.data(),
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packet.data() + packet.size(),
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packet.data(),
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packet.data() + packet.size(),
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nullptr,
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nullptr,
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0};
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auto *emitted = Gen5::AgcDcbDrawIndirectMulti(
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reinterpret_cast<Gen5::CommandBuffer *>(&dcb), 0x11223344u, 1u,
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0x55667788u, count_address, 0xaabbccddu, modifier);
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const uint32_t invalid_payload[]{0x342u, 0xc6000010u};
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Require("AgcDrawIndirectMulti", "native packet",
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Require("Pm4DrawIndirectMulti", "native packet",
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emitted == packet.data() &&
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dcb.cursor_up == packet.data() + packet.size() &&
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packet == expected && execute(packet.data(), 3u) &&
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@@ -33793,8 +33848,8 @@ void CheckAgcDrawIndirectMultiPacket(RenderContext &renderer) {
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Gen5::AgcWaitRegMemPatchReference(packet.data(), 0x12345678u) ==
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packet_mismatch &&
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!Gen5::AgcIsInternalDataPacket(0xc0017904u, invalid_payload),
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"drawIndirectMulti stream differs from native AGC");
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std::printf("[host] %-32s ok\n", "AgcDrawIndirectMulti");
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"indirect multi-draw packet differs from the expected stream");
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std::printf("[host] %-32s ok\n", "Pm4DrawIndirectMulti");
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}
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void CheckPm4ContextStateOperations(RenderContext &renderer) {
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@@ -33814,13 +33869,13 @@ void CheckPm4ContextStateOperations(RenderContext &renderer) {
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const auto invoke = [&](ContextStateOperation operation) {
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std::array<uint32_t, 32> packet{};
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std::array<uint32_t, 6> segment_sizes{};
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AgcCommandBufferLayout dcb{packet.data(),
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packet.data() + packet.size(),
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packet.data(),
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packet.data() + packet.size(),
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nullptr,
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nullptr,
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0};
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CommandBufferLayout dcb{packet.data(),
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packet.data() + packet.size(),
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packet.data(),
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packet.data() + packet.size(),
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nullptr,
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nullptr,
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0};
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const auto operation_value = static_cast<uint32_t>(operation);
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size_t segment_count = 0;
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switch (operation) {
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@@ -34456,6 +34511,7 @@ int main(int argc, char **argv) {
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return 0;
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}
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if (argc == 2 && std::strcmp(argv[1], "--shader-data-storage-only") == 0) {
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CheckResourcePlanHandoff();
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VulkanHarness vulkan;
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RunCase(&vulkan, BufferOffsetsUsePackedLaneAndStorageFallback());
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return 0;
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@@ -34593,10 +34649,10 @@ int main(int argc, char **argv) {
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}
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if (argc == 2 && std::strcmp(argv[1], "--context-state-only") == 0) {
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VulkanHarness vulkan;
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CheckAgcShaderFusion();
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CheckShaderFusion();
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CheckPm4NativeTargetGeometryRegisters(vulkan.RuntimeRenderer());
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CheckPm4PrivateAgcShaderRegisters(vulkan.RuntimeRenderer());
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CheckPm4PrivateAgcUconfigRegisters(vulkan.RuntimeRenderer());
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CheckPm4IndirectShaderRegisters(vulkan.RuntimeRenderer());
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CheckPm4IndirectUconfigRegisters(vulkan.RuntimeRenderer());
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CheckPm4BlendColorRegisterRanges(vulkan.RuntimeRenderer());
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CheckPm4PolygonOffsetRegisters(vulkan.RuntimeRenderer());
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CheckPm4DepthControlHighBits(vulkan.RuntimeRenderer());
|
||||
@@ -34604,15 +34660,15 @@ int main(int argc, char **argv) {
|
||||
CheckPm4ContextStateOperations(vulkan.RuntimeRenderer());
|
||||
return 0;
|
||||
}
|
||||
if (argc == 2 && std::strcmp(argv[1], "--agc-wait-only") == 0) {
|
||||
if (argc == 2 && std::strcmp(argv[1], "--pm4-wait-only") == 0) {
|
||||
VulkanHarness vulkan;
|
||||
CheckAgcWaitPackets(vulkan.RuntimeRenderer());
|
||||
CheckPm4WaitPackets(vulkan.RuntimeRenderer());
|
||||
CheckPm4WaitResume(vulkan.RuntimeRenderer());
|
||||
return 0;
|
||||
}
|
||||
if (argc == 2 && std::strcmp(argv[1], "--agc-draw-multi-only") == 0) {
|
||||
if (argc == 2 && std::strcmp(argv[1], "--pm4-draw-multi-only") == 0) {
|
||||
VulkanHarness vulkan;
|
||||
CheckAgcDrawIndirectMultiPacket(vulkan.RuntimeRenderer());
|
||||
CheckPm4DrawIndirectMultiPacket(vulkan.RuntimeRenderer());
|
||||
return 0;
|
||||
}
|
||||
if (argc == 2 && std::strcmp(argv[1], "--rewind-only") == 0) {
|
||||
@@ -34820,6 +34876,7 @@ int main(int argc, char **argv) {
|
||||
VulkanHarness vulkan;
|
||||
#endif
|
||||
CheckImageSamplerSpecialization();
|
||||
CheckResourcePlanHandoff();
|
||||
CheckNativeImageDescriptorTypes();
|
||||
CheckClipControlDepthClipState();
|
||||
CheckReferenceClockScale();
|
||||
@@ -34830,17 +34887,17 @@ int main(int argc, char **argv) {
|
||||
CheckPm4Predication(vulkan.RuntimeRenderer());
|
||||
CheckPm4StencilInfoValueLane(vulkan.RuntimeRenderer());
|
||||
CheckPm4NativeTargetGeometryRegisters(vulkan.RuntimeRenderer());
|
||||
CheckPm4PrivateAgcShaderRegisters(vulkan.RuntimeRenderer());
|
||||
CheckPm4PrivateAgcUconfigRegisters(vulkan.RuntimeRenderer());
|
||||
CheckPm4IndirectShaderRegisters(vulkan.RuntimeRenderer());
|
||||
CheckPm4IndirectUconfigRegisters(vulkan.RuntimeRenderer());
|
||||
CheckPm4DirectShaderRegisterFallback(vulkan.RuntimeRenderer());
|
||||
CheckPm4GuardBandRegisterRanges(vulkan.RuntimeRenderer());
|
||||
CheckPm4BlendColorRegisterRanges(vulkan.RuntimeRenderer());
|
||||
CheckPm4PolygonOffsetRegisters(vulkan.RuntimeRenderer());
|
||||
CheckPm4DepthControlHighBits(vulkan.RuntimeRenderer());
|
||||
CheckPm4DepthRenderOverride(vulkan.RuntimeRenderer());
|
||||
CheckAgcShaderFusion();
|
||||
CheckAgcWaitPackets(vulkan.RuntimeRenderer());
|
||||
CheckAgcDrawIndirectMultiPacket(vulkan.RuntimeRenderer());
|
||||
CheckShaderFusion();
|
||||
CheckPm4WaitPackets(vulkan.RuntimeRenderer());
|
||||
CheckPm4DrawIndirectMultiPacket(vulkan.RuntimeRenderer());
|
||||
CheckPm4ContextStateOperations(vulkan.RuntimeRenderer());
|
||||
CheckPm4IndirectControlFlow(vulkan.RuntimeRenderer());
|
||||
CheckPm4WaitResume(vulkan.RuntimeRenderer());
|
||||
|
||||
Reference in New Issue
Block a user