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shader: add missing F64 VOPC compares
Co-authored-by: Hector Mödinger S. <hectormodinger@gmail.com>
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@@ -65,11 +65,14 @@ void Translator::EmitFloatCompare(const Decoder::Instruction& inst, IR::ValueOpc
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EmitCompareResult(inst, IR::U1(ir.Emit(opcode, {lhs, rhs}, flags)), false, cmpx);
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}
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void Translator::EmitFloatOrderedCompare(const Decoder::Instruction& inst, bool ordered, bool cmpx) {
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const auto lhs = IR::F32(ReadOperand(inst.src0, IR::Type::F32));
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const auto rhs = IR::F32(ReadOperand(inst.src1, IR::Type::F32));
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const auto unordered = ir.LogicalOr(IR::U1(ir.Emit(IR::ValueOpcode::FPIsNan32, {lhs})),
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IR::U1(ir.Emit(IR::ValueOpcode::FPIsNan32, {rhs})));
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void Translator::EmitFloatOrderedCompare(const Decoder::Instruction& inst, bool ordered, bool cmpx,
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bool is64) {
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const auto type = is64 ? IR::Type::F64 : IR::Type::F32;
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const auto is_nan_op = is64 ? IR::ValueOpcode::FPIsNan64 : IR::ValueOpcode::FPIsNan32;
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const auto lhs = ReadOperand(inst.src0, type);
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const auto rhs = ReadOperand(inst.src1, type);
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const auto unordered = ir.LogicalOr(IR::U1(ir.Emit(is_nan_op, {lhs})),
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IR::U1(ir.Emit(is_nan_op, {rhs})));
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EmitCompareResult(inst, ordered ? ir.LogicalNot(unordered) : unordered, false, cmpx);
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}
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