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shader: emit native 64-bit operations where compatible
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@@ -347,6 +347,17 @@ void FoldInstruction(Block& block, Block::iterator instruction,
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if (IsImmediate(low, Type::U32) && IsImmediate(high, Type::U32)) {
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Replace(inst, Value(static_cast<uint64_t>(low.U32()) |
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(static_cast<uint64_t>(high.U32()) << 32u)));
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} else {
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const auto* low_extract = low.TryInstruction();
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const auto* high_extract = high.TryInstruction();
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if (low_extract != nullptr && high_extract != nullptr &&
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low_extract->GetOpcode() == ValueOpcode::CompositeExtractU64 &&
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high_extract->GetOpcode() == ValueOpcode::CompositeExtractU64 &&
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Arg(*low_extract, 1) == Value(0u) && Arg(*high_extract, 1) == Value(1u) &&
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Arg(*low_extract, 0) == Arg(*high_extract, 0)) {
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// Guest register pairs need not unpack and repack between wide operations.
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Replace(inst, Arg(*low_extract, 0));
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}
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}
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return;
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}
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