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https://github.com/KytyPS5/KytyPS5.git
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shader: preserve raw VCC bits in S_MOV_B64 (#418)
* shader: preserve raw VCC bits in S_MOV_B64 * fix(shader): centralize scalar U64 mask provenance --------- Co-authored-by: nmzik <Nmzik@mail.ru>
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@@ -23,18 +23,28 @@ Decoder::Operand ConditionOperand(Decoder::OperandKind kind) {
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void Translator::S_SAVEEXEC(const Decoder::Instruction& inst, IR::ValueOpcode operation,
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bool negate_exec, bool negate_source, bool write_64) {
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if (write_64) {
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const auto exec_operand = ConditionOperand(Decoder::OperandKind::ExecLo);
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const auto old = ReadScalarU64(exec_operand);
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const auto bit_operation = operation == IR::ValueOpcode::LogicalAnd
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? IR::ValueOpcode::BitwiseAnd32
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: IR::ValueOpcode::BitwiseOr32;
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const auto result = BinaryScalarU64(old, ReadScalarU64(inst.src0), operation, bit_operation,
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negate_exec, negate_source, false);
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WriteScalarU64(inst.dst, old);
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WriteScalarU64(exec_operand, result);
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ir.SetScc(ScalarU64NonZero(result));
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return;
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}
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const auto old = ir.GetExec();
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const auto src = ReadMask(inst.src0);
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const auto lhs = negate_exec ? ir.LogicalNot(old) : old;
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const auto rhs = negate_source ? ir.LogicalNot(src) : src;
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const auto result = IR::U1(ir.Emit(operation, {lhs, rhs}));
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if (write_64) {
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WriteMask64(inst.dst, old);
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} else {
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WriteMask(inst.dst, old);
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}
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WriteMask(inst.dst, old);
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const auto mask = BallotMask(result);
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ir.SetExec(result);
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ir.SetExecMaskTag(IR::U1(IR::Value(true)));
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ir.SetExecLo(mask[0]);
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ir.SetExecHi(mask[1]);
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ir.SetScc(result);
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@@ -196,30 +206,21 @@ void Translator::S_CSELECT_B32(const Decoder::Instruction& inst) {
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}
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void Translator::S_CSELECT_B64(const Decoder::Instruction& inst) {
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const auto condition = ir.GetScc();
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const auto lhs = ReadU32Pair(inst.src0);
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const auto rhs = ReadU32Pair(inst.src1);
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const auto selected_mask = IR::U1(
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ir.Emit(IR::ValueOpcode::SelectU1, {condition, ReadMask(inst.src0), ReadMask(inst.src1)}));
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const auto selected_mask_valid =
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IR::U1(ir.Emit(IR::ValueOpcode::SelectU1,
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{condition, ReadMaskValid(inst.src0), ReadMaskValid(inst.src1)}));
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if (IsExecOrVcc(inst.dst)) {
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WriteMask64(inst.dst, selected_mask);
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return;
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}
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WriteU32Pair(inst.dst,
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{ir.Select(condition, lhs[0], rhs[0]), ir.Select(condition, lhs[1], rhs[1])});
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if (inst.dst.kind == Decoder::OperandKind::Sgpr) {
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const auto dst = static_cast<IR::ScalarReg>(inst.dst.reg);
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ir.SetThreadBitScalarReg(dst, selected_mask);
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ir.SetScalarMaskTag(dst, selected_mask_valid);
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}
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const auto condition = ir.GetScc();
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const auto lhs = ReadScalarU64(inst.src0);
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const auto rhs = ReadScalarU64(inst.src1);
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WriteScalarU64(inst.dst, SelectScalarU64(condition, lhs, rhs));
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}
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void Translator::MOV_B32(const Decoder::Instruction& inst, bool apply_float_modifiers) {
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if (inst.src0.kind == Decoder::OperandKind::Sgpr && inst.dst.kind == Decoder::OperandKind::Sgpr &&
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inst.src0.reg == inst.dst.reg) {
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return;
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}
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if (IsExecOrVcc(inst.src0) && IsExecOrVcc(inst.dst)) {
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WriteMask(inst.dst, ReadMask(inst.src0));
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if (inst.src0.kind != inst.dst.kind) {
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WriteRawU32(inst.dst, ReadRawU32(inst.src0));
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}
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} else if (apply_float_modifiers && (inst.src0.negate || inst.src0.absolute)) {
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WriteOperand(DestinationOperand(inst), ReadOperand(inst.src0, IR::Type::F32));
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} else {
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@@ -228,50 +229,17 @@ void Translator::MOV_B32(const Decoder::Instruction& inst, bool apply_float_modi
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}
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void Translator::S_MOV_B64(const Decoder::Instruction& inst) {
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if (IsExecOrVcc(inst.dst) || IsExecOrVcc(inst.src0)) {
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WriteMask64(inst.dst, ReadMask(inst.src0));
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return;
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}
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const bool scalar_copy =
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inst.dst.kind == Decoder::OperandKind::Sgpr && inst.src0.kind == Decoder::OperandKind::Sgpr;
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IR::U1 source_mask;
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IR::U1 source_mask_valid;
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if (scalar_copy) {
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source_mask = ir.GetThreadBitScalarReg(static_cast<IR::ScalarReg>(inst.src0.reg));
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source_mask_valid = ir.GetScalarMaskTag(static_cast<IR::ScalarReg>(inst.src0.reg));
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}
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WriteU32Pair(inst.dst, ReadU32Pair(inst.src0));
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if (scalar_copy) {
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ir.SetThreadBitScalarReg(static_cast<IR::ScalarReg>(inst.dst.reg), source_mask);
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ir.SetScalarMaskTag(static_cast<IR::ScalarReg>(inst.dst.reg), source_mask_valid);
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}
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WriteScalarU64(inst.dst, ReadScalarU64(inst.src0));
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}
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void Translator::S_WQM_B64(const Decoder::Instruction& inst) {
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if (!IsExecOrVcc(inst.dst) && !IsExecOrVcc(inst.src0)) {
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const auto mask_valid = ReadMaskValid(inst.src0);
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const auto invocation_result =
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IR::U1(ir.Emit(IR::ValueOpcode::WqmMask, {ReadMask(inst.src0)}));
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const auto result =
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IR::U64(ir.Emit(IR::ValueOpcode::WqmU64, {ReadOperand(inst.src0, IR::Type::U64)}));
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WriteOperand(DestinationOperand(inst), result);
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if (inst.dst.kind == Decoder::OperandKind::Sgpr) {
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const auto dst = static_cast<IR::ScalarReg>(inst.dst.reg);
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ir.SetThreadBitScalarReg(dst, invocation_result);
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ir.SetScalarMaskTag(dst, mask_valid);
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const auto raw_nonzero =
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IR::U1(ir.Emit(IR::ValueOpcode::INotEqual64, {result, IR::Value(uint64_t {0})}));
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ir.SetScc(IR::U1(
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ir.Emit(IR::ValueOpcode::SelectU1, {mask_valid, invocation_result, raw_nonzero})));
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} else {
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ir.SetScc(
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IR::U1(ir.Emit(IR::ValueOpcode::INotEqual64, {result, IR::Value(uint64_t {0})})));
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}
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return;
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}
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const auto result = IR::U1(ir.Emit(IR::ValueOpcode::WqmMask, {ReadMask(inst.src0)}));
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WriteMask64(inst.dst, result);
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ir.SetScc(result);
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const auto source = ReadScalarU64(inst.src0);
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const auto raw = ExtractU64(
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IR::U64(ir.Emit(IR::ValueOpcode::WqmU64, {ir.ConstructU64(source.raw[0], source.raw[1])})));
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const auto invocation = IR::U1(ir.Emit(IR::ValueOpcode::WqmMask, {source.invocation}));
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const auto result = MakeScalarU64Result(raw, invocation, source.mask_valid);
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WriteScalarU64(inst.dst, result);
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ir.SetScc(ScalarU64NonZero(result));
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}
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bool Translator::V_MOVRELS_B32(const Decoder::Instruction& inst, std::string* error) {
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