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shader: initialize compute EXEC from active subgroup

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This commit is contained in:
nmzik
2026-08-19 20:19:32 +02:00
parent 77db9164b8
commit 705fc93363
3 changed files with 39 additions and 11 deletions
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src/graphics/shader/recompiler/frontend/translate/Translate.cpp
+10 -3
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@@ -841,9 +841,16 @@ bool TranslateProgram(const IR::Program& source, IR::ValueProgram& result,
entry_ir.SetScalarReg(reg, entry_ir.GetUserData(reg)); entry_ir.SetScalarReg(reg, entry_ir.GetUserData(reg));
} }
entry_ir.SetExec(IR::U1(IR::Value(true))); entry_ir.SetExec(IR::U1(IR::Value(true)));
entry_ir.SetExecLo(IR::U32(IR::Value(per_invocation_masks ? 1u : 0xffffffffu))); if (source.stage == ShaderType::Compute && !per_invocation_masks) {
entry_ir.SetExecHi( const auto active = entry_ir.Emit(IR::ValueOpcode::Ballot, {IR::Value(true)});
IR::U32(IR::Value(!per_invocation_masks && source.wave_size > 32u ? 0xffffffffu : 0u))); entry_ir.SetExecLo(entry_ir.CompositeExtract(active, 0));
entry_ir.SetExecHi(source.wave_size > 32u ? entry_ir.CompositeExtract(active, 1)
: IR::U32(IR::Value(0u)));
} else {
entry_ir.SetExecLo(IR::U32(IR::Value(per_invocation_masks ? 1u : 0xffffffffu)));
entry_ir.SetExecHi(IR::U32(
IR::Value(!per_invocation_masks && source.wave_size > 32u ? 0xffffffffu : 0u)));
}
if (source.stage == ShaderType::Compute) { if (source.stage == ShaderType::Compute) {
const auto* cs = compute_input_info; const auto* cs = compute_input_info;
const auto thread_ids = const auto thread_ids =
tests/ShaderRecompilerComputeTests.cpp
+3 -3
View File
@@ -11734,7 +11734,7 @@ TestCase ScalarSaveExecOps() {
return {"ScalarSaveExecOps", return {"ScalarSaveExecOps",
code, code,
{}, {},
{0xffffffffu, 0xffffffffu, 0xffffffffu, 0xffffffffu, 0xffffffffu, {0x00000001u, 0x00000000u, 0x00000001u, 0x00000000u, 0xffffffffu,
0xffffffffu, 0xffffffffu, 0x00000003u, 0xffffffffu, 0x00000003u, 0xffffffffu, 0xffffffffu, 0x00000003u, 0xffffffffu, 0x00000003u,
0x00000002u, 0xffffffffu, 1}, 0x00000002u, 0xffffffffu, 1},
{O::S_MOV_B32, O::S_AND_SAVEEXEC_B64, O::S_ORN2_SAVEEXEC_B64, {O::S_MOV_B32, O::S_AND_SAVEEXEC_B64, O::S_ORN2_SAVEEXEC_B64,
@@ -17190,7 +17190,7 @@ TestCase DsAppendConsumeUsesEncodedLdsSelector() {
return {"DsAppendConsumeLdsSelector", return {"DsAppendConsumeLdsSelector",
code, code,
{}, {},
{10, 74, 0, 10}, {10, 11, 0, 10},
{O::S_MOV_B32, O::V_MOV_B32, O::DS_WRITE_B32, O::DS_READ_B32, {O::S_MOV_B32, O::V_MOV_B32, O::DS_WRITE_B32, O::DS_READ_B32,
O::DS_APPEND, O::DS_CONSUME, O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; O::DS_APPEND, O::DS_CONSUME, O::BUFFER_STORE_DWORD, O::S_ENDPGM}};
} }
@@ -17224,7 +17224,7 @@ TestCase DsAppendUsesEncodedGdsSelector() {
TestCase test{"DsAppendGdsSelector", TestCase test{"DsAppendGdsSelector",
code, code,
{}, {},
{10, 74, 20, 84, 40, 104}, {10, 11, 20, 21, 40, 41},
{O::S_MOV_B32, O::DS_APPEND, O::DS_CONSUME, {O::S_MOV_B32, O::DS_APPEND, O::DS_CONSUME,
O::BUFFER_STORE_DWORD, O::S_ENDPGM}}; O::BUFFER_STORE_DWORD, O::S_ENDPGM}};
test.gds_initial = {10, 20, 30, 40}; test.gds_initial = {10, 20, 30, 40};
tests/shaderCfgTests.cpp
+26 -5
View File
@@ -8640,12 +8640,18 @@ void TestTypedEntryStateIsMinimal() {
uint32_t set_exec = 0; uint32_t set_exec = 0;
uint32_t set_exec_lo = 0; uint32_t set_exec_lo = 0;
uint32_t set_exec_hi = 0; uint32_t set_exec_hi = 0;
uint32_t ballots = 0;
IR::Value exec; IR::Value exec;
IR::Value exec_lo; IR::Value exec_lo;
IR::Value exec_hi; IR::Value exec_hi;
const IR::Inst *ballot = nullptr;
for (const auto *block : values.blocks) { for (const auto *block : values.blocks) {
for (const auto &inst : *block) { for (const auto &inst : *block) {
switch (inst.GetOpcode()) { switch (inst.GetOpcode()) {
case IR::ValueOpcode::Ballot:
ballots++;
ballot = &inst;
break;
case IR::ValueOpcode::SetExec: case IR::ValueOpcode::SetExec:
set_exec++; set_exec++;
exec = inst.Arg(0).Resolve(); exec = inst.Arg(0).Resolve();
@@ -8677,14 +8683,29 @@ void TestTypedEntryStateIsMinimal() {
exec.IsImmediate() && exec.U1(), exec.IsImmediate() && exec.U1(),
"typed entry does not define EXEC exactly once"); "typed entry does not define EXEC exactly once");
if (lane_mode == ShaderLaneMaskMode::PerInvocation) { if (lane_mode == ShaderLaneMaskMode::PerInvocation) {
Check(exec_lo.IsImmediate() && exec_lo.U32() == 1u && Check(ballots == 0u && exec_lo.IsImmediate() && exec_lo.U32() == 1u &&
exec_hi.IsImmediate() && exec_hi.U32() == 0u, exec_hi.IsImmediate() && exec_hi.U32() == 0u,
"per-invocation entry EXEC is not the local {1,0} mask"); "per-invocation entry EXEC is not the local {1,0} mask");
} else { } else {
Check(exec_lo.IsImmediate() && exec_lo.U32() == 0xffffffffu && Check(ballots == 1u && !exec_lo.IsImmediate(),
exec_hi.IsImmediate() && "native compute entry EXEC does not use the active subgroup mask");
exec_hi.U32() == (wave_size == 32u ? 0u : 0xffffffffu), const auto *lo = exec_lo.ResolveInstruction();
"native entry EXEC does not match the guest wave width"); Check(lo != nullptr &&
lo->GetOpcode() == IR::ValueOpcode::CompositeExtractU32x4 &&
lo->Arg(0).ResolveInstruction() == ballot &&
lo->Arg(1).Resolve().U32() == 0u,
"native compute EXEC_LO does not use ballot word zero");
if (wave_size == 32u) {
Check(exec_hi.IsImmediate() && exec_hi.U32() == 0u,
"native wave32 entry defined EXEC_HI");
} else {
const auto *hi = exec_hi.ResolveInstruction();
Check(hi != nullptr &&
hi->GetOpcode() == IR::ValueOpcode::CompositeExtractU32x4 &&
hi->Arg(0).ResolveInstruction() == ballot &&
hi->Arg(1).Resolve().U32() == 1u,
"native wave64 EXEC_HI does not use ballot word one");
}
} }
IR::RewriteToSsa(values.blocks); IR::RewriteToSsa(values.blocks);