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gpu: drop global barriers for PM4 flush events and releases, ordering buffer-writing draws like dispatches

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This commit is contained in:
nmzik
2026-10-21 01:33:10 +02:00
parent ea1b032c59
commit 70668fbd98
6 changed files with 31 additions and 64 deletions
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src/graphics/host_gpu/renderer/context.cpp
+7 -1
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@@ -104,8 +104,14 @@ void CommandBuffer::BeginRendering(const RenderState& state) const {
rendering.pDepthAttachment = depth_stencil.has_depth ? &depth : nullptr;
rendering.pStencilAttachment = depth_stencil.has_stencil ? &stencil : nullptr;
Handle().beginRendering(rendering);
// The open pass holds the cleared contents, so a later clear begins a new pass.
m_render_state = state;
m_rendering = true;
for (auto& color: m_render_state.color_attachments) {
color.is_clear = false;
}
m_render_state.depth_stencil_attachment.depth_clear = false;
m_render_state.depth_stencil_attachment.stencil_clear = false;
m_rendering = true;
}
void CommandBuffer::EndRendering() const {
src/graphics/host_gpu/renderer/pipeline/shaderResourceBarrier.cpp
+2 -1
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@@ -92,7 +92,8 @@ bool HasShaderBufferWrites(const ShaderStageRuntime& runtime) {
const auto& program = *runtime.program;
const auto& resources = *runtime.resources;
EXIT_IF(resources.buffers.size() != program.info.buffers.size());
bool has_writes = false;
// Address writes reach memory outside the bound buffer descriptors.
bool has_writes = program.has_address_writes;
for (uint32_t i = 0; i < program.info.buffers.size(); i++) {
if (!program.info.buffers[i].written) {
continue;
src/graphics/host_gpu/renderer/renderDraw.cpp
+14 -9
View File
@@ -1227,6 +1227,20 @@ void RenderExecutor::ExecutePreparedDraw(uint64_t submit_id, CommandBuffer& buff
dynamic_state.SetAttachmentFeedbackLoopAspects(feedback_aspects);
dynamic_state.Commit(m_context.GetGraphics(), vk_buffer);
vk::PipelineStageFlags shader_write_stages = {};
for (const auto& stage: vertex_stages) {
if (HasShaderBufferWrites(stage.stage)) {
shader_write_stages |= ShaderPipelineStages(NativeShaderStage(stage.logical_stage));
}
}
if (state.ps_active && HasShaderBufferWrites(state.ps_input_info.stage)) {
shader_write_stages |= vk::PipelineStageFlagBits::eFragmentShader;
}
if (shader_write_stages) {
// As for dispatches, buffer writes wait for earlier accesses to the memory.
m_context.GetCommandScheduler().EndRendering();
ShaderWriteHazardBarrier(vk_buffer, shader_write_stages);
}
LogDrawPhase(draw.Name(), "BeginRendering");
if (!draw.IsIndexed()) {
SetDrawDebugPhase(buffer, submit_id, draw, 0x400u);
@@ -1247,15 +1261,6 @@ void RenderExecutor::ExecutePreparedDraw(uint64_t submit_id, CommandBuffer& buff
if (!draw.IsIndexed()) {
SetDrawDebugPhase(buffer, submit_id, draw, 0x600u);
}
vk::PipelineStageFlags shader_write_stages = {};
for (const auto& stage: vertex_stages) {
if (HasShaderBufferWrites(stage.stage)) {
shader_write_stages |= ShaderPipelineStages(NativeShaderStage(stage.logical_stage));
}
}
if (state.ps_active && HasShaderBufferWrites(state.ps_input_info.stage)) {
shader_write_stages |= vk::PipelineStageFlagBits::eFragmentShader;
}
if (shader_write_stages) {
m_context.GetCommandScheduler().EndRendering();
ShaderWriteBarrier(vk_buffer, shader_write_stages);