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guest_gpu: fix private AGC register regression
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@@ -834,8 +834,9 @@ constexpr uint32_t SPI_SHADER_USER_ACCUM_ESGS_0 = 0xB2;
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constexpr uint32_t SPI_SHADER_USER_ACCUM_ESGS_3 = 0xB5;
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constexpr uint32_t SPI_SHADER_PGM_LO_ES = 0xC8;
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constexpr uint32_t SPI_SHADER_PGM_HI_ES = 0xC9;
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// Retained only as an opaque AGC compiler-record tag; 0x100 is not a PS5 SH register.
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// Private AGC registers used by shader binaries submitted through SET_SH_REG_INDIRECT.
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constexpr uint32_t SPI_SHADER_PGM_CHKSUM_HS = 0x100;
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constexpr uint32_t SPI_SHADER_PGM_RSRC4_HS = 0x101;
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constexpr uint32_t SPI_SHADER_USER_DATA_ADDR_LO_HS = 0x102;
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constexpr uint32_t SPI_SHADER_USER_DATA_ADDR_HI_HS = 0x103;
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constexpr uint32_t SPI_GRAPHICS_SHADER_CONTROL_HS = 0x107;
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@@ -976,7 +977,7 @@ constexpr uint32_t GE_USER_VGPR1 = 0x25C;
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constexpr uint32_t GE_USER_VGPR2 = 0x25D;
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constexpr uint32_t GE_USER_VGPR3 = 0x25E;
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constexpr uint32_t GE_STEREO_CNTL = 0x25F;
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constexpr uint32_t GE_PC_ALLOC = 0x260;
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constexpr uint32_t UC_PARAMETER_OVERSUBSCRIPTION = 0x260;
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constexpr uint32_t GE_USER_VGPR_EN = 0x262;
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constexpr uint32_t GE_USER_VGPR_EN_EN_USER_VGPR1_SHIFT = 0;
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