mirror of
https://github.com/KytyPS5/KytyPS5.git
synced 2026-10-21 19:36:55 +02:00
Improve Hades II compatibility (#964)
Fix Hades II startup and color clears Co-authored-by: nmzik <Nmzik@mail.ru>
This commit is contained in:
@@ -140,6 +140,8 @@ constexpr auto MakeShaderDispatchTable() {
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g_hw_sh_func[Pm4::COMPUTE_PGM_RSRC3] = HwShSetCsRegisters;
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g_hw_sh_func[Pm4::COMPUTE_PGM_RSRC3] = HwShSetCsRegisters;
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g_hw_sh_func[Pm4::COMPUTE_PACE_ID] = HwShSetCsRegisters;
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g_hw_sh_func[Pm4::COMPUTE_PACE_ID] = HwShSetCsRegisters;
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g_hw_sh_func[Pm4::SPI_GRAPHICS_SHADER_CONTROL_PS] = HwShSetRegisters;
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g_hw_sh_func[Pm4::SPI_GRAPHICS_SHADER_CONTROL_PS] = HwShSetRegisters;
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g_hw_sh_func[Pm4::SPI_SHADER_USER_DATA_ADDR_LO_PS] = HwShSetRegisters;
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g_hw_sh_func[Pm4::SPI_SHADER_USER_DATA_ADDR_HI_PS] = HwShSetRegisters;
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g_hw_sh_func[Pm4::SPI_GRAPHICS_SHADER_CONTROL_GS] = HwShSetRegisters;
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g_hw_sh_func[Pm4::SPI_GRAPHICS_SHADER_CONTROL_GS] = HwShSetRegisters;
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g_hw_sh_func[Pm4::SPI_SHADER_USER_DATA_ADDR_LO_GS] = HwShSetRegisters;
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g_hw_sh_func[Pm4::SPI_SHADER_USER_DATA_ADDR_LO_GS] = HwShSetRegisters;
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g_hw_sh_func[Pm4::SPI_SHADER_USER_DATA_ADDR_HI_GS] = HwShSetRegisters;
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g_hw_sh_func[Pm4::SPI_SHADER_USER_DATA_ADDR_HI_GS] = HwShSetRegisters;
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@@ -3622,6 +3622,18 @@ void GraphicsInitJmpTablesShIndirect() {
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g_hw_sh_indirect_func[Pm4::SPI_GRAPHICS_SHADER_CONTROL_PS] = [](KYTY_HW_SH_INDIRECT_ARGS) {
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g_hw_sh_indirect_func[Pm4::SPI_GRAPHICS_SHADER_CONTROL_PS] = [](KYTY_HW_SH_INDIRECT_ARGS) {
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HwShIgnoreShaderRegister(cmd_offset, value);
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HwShIgnoreShaderRegister(cmd_offset, value);
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};
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};
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for (uint32_t offset = Pm4::SPI_SHADER_USER_DATA_ADDR_LO_PS;
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offset <= Pm4::SPI_SHADER_USER_DATA_ADDR_HI_PS; offset++) {
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g_hw_sh_indirect_func[offset] = [](KYTY_HW_SH_INDIRECT_ARGS) {
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cp.GetShCtx().SetPsUserDataAddress(cmd_offset - Pm4::SPI_SHADER_USER_DATA_ADDR_LO_PS,
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value);
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};
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}
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for (uint32_t offset = 4; offset <= 5; offset++) {
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g_hw_sh_indirect_func[offset] = [](KYTY_HW_SH_INDIRECT_ARGS) {
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cp.GetShCtx().SetPsAuxiliaryTableAddress(cmd_offset - 4, value);
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};
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}
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g_hw_sh_indirect_func[Pm4::SPI_SHADER_PACE_ID_GS] = [](KYTY_HW_SH_INDIRECT_ARGS) {
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g_hw_sh_indirect_func[Pm4::SPI_SHADER_PACE_ID_GS] = [](KYTY_HW_SH_INDIRECT_ARGS) {
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HwShIgnoreShaderRegister(cmd_offset, value);
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HwShIgnoreShaderRegister(cmd_offset, value);
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};
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};
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@@ -458,6 +458,9 @@ struct PsShaderResource2 {
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struct PsStageRegisters {
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struct PsStageRegisters {
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uint64_t data_addr = 0;
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uint64_t data_addr = 0;
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uint64_t user_data_addr = 0;
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// Hades II uses PS offsets 4:5 for a byte-addressed descriptor table.
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uint64_t auxiliary_table_addr = 0;
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PsShaderResource1 rsrc1;
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PsShaderResource1 rsrc1;
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PsShaderResource2 rsrc2;
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PsShaderResource2 rsrc2;
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};
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};
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@@ -1017,6 +1020,12 @@ public:
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void SetGsShaderResource2(const GsShaderResource2& rsrc2) { m_vs.gs_regs.rsrc2 = rsrc2; }
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void SetGsShaderResource2(const GsShaderResource2& rsrc2) { m_vs.gs_regs.rsrc2 = rsrc2; }
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void SetPsShaderBase(uint64_t addr) { m_ps.ps_regs.data_addr = addr; }
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void SetPsShaderBase(uint64_t addr) { m_ps.ps_regs.data_addr = addr; }
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void SetPsUserDataAddress(uint32_t word, uint32_t value) {
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SetUserDataAddressWord(m_ps.ps_regs.user_data_addr, word, value);
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}
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void SetPsAuxiliaryTableAddress(uint32_t word, uint32_t value) {
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SetUserDataAddressWord(m_ps.ps_regs.auxiliary_table_addr, word, value);
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}
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void SetPsShaderResource1(const PsShaderResource1& rsrc1) { m_ps.ps_regs.rsrc1 = rsrc1; }
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void SetPsShaderResource1(const PsShaderResource1& rsrc1) { m_ps.ps_regs.rsrc1 = rsrc1; }
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void SetPsShaderResource2(const PsShaderResource2& rsrc2) { m_ps.ps_regs.rsrc2 = rsrc2; }
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void SetPsShaderResource2(const PsShaderResource2& rsrc2) { m_ps.ps_regs.rsrc2 = rsrc2; }
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@@ -697,6 +697,8 @@ constexpr uint32_t CX_NUM = 0x3FF + 1;
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/* Shader registers */
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/* Shader registers */
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constexpr uint32_t SPI_SHADER_USER_DATA_ADDR_LO_PS = 0x2;
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constexpr uint32_t SPI_SHADER_USER_DATA_ADDR_HI_PS = 0x3;
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constexpr uint32_t SPI_SHADER_PACE_ID_PS = 0x6;
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constexpr uint32_t SPI_SHADER_PACE_ID_PS = 0x6;
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constexpr uint32_t SPI_GRAPHICS_SHADER_CONTROL_PS = 0x7;
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constexpr uint32_t SPI_GRAPHICS_SHADER_CONTROL_PS = 0x7;
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constexpr uint32_t SPI_SHADER_PGM_LO_PS = 0x8;
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constexpr uint32_t SPI_SHADER_PGM_LO_PS = 0x8;
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+1
-1
@@ -1533,7 +1533,7 @@ bool TextureCache::ClearImageFromBuffer(CommandBuffer& command, uint64_t address
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auto& image = m_slot_images[selected];
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auto& image = m_slot_images[selected];
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vk::ClearValue clear {};
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vk::ClearValue clear {};
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if (aspect == vk::ImageAspectFlagBits::eColor) {
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if (aspect == vk::ImageAspectFlagBits::eColor) {
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if (!DecodePackedColorClear(image.info.pixel_format, packed_clear, clear.color)) {
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if (!DecodeColorDwordFill(image.info.pixel_format, packed_clear, clear.color)) {
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return false;
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return false;
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}
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}
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} else {
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} else {
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@@ -428,6 +428,20 @@ inline constexpr std::array<VideoOutFormatPolicy, 7> VIDEO_OUT_FORMAT_POLICIES {
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return true;
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return true;
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}
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}
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// Unlike a register clear, a DWORD fill repeats the same word across the entire pixel.
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// Keep this separate: the first register word alone cannot describe a 64-bit color.
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[[nodiscard]] inline bool DecodeColorDwordFill(vk::Format format, uint32_t packed,
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vk::ClearColorValue& clear) {
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if (format == vk::Format::eR16G16B16A16Sfloat) {
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if (packed != 0) {
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return false;
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}
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clear = vk::ClearColorValue {};
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return true;
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}
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return DecodePackedColorClear(format, packed, clear);
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}
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[[nodiscard]] inline bool DecodePackedStencilClear(uint32_t packed, uint8_t& clear) {
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[[nodiscard]] inline bool DecodePackedStencilClear(uint32_t packed, uint8_t& clear) {
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const auto value = static_cast<uint8_t>(packed);
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const auto value = static_cast<uint8_t>(packed);
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if (packed != static_cast<uint32_t>(value) * 0x01010101u) {
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if (packed != static_cast<uint32_t>(value) * 0x01010101u) {
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@@ -1797,6 +1797,12 @@ int KYTY_SYSV_ABI KernelRtldThreadAtexitDecrement(uint64_t* /*c*/) {
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return 0;
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return 0;
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}
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}
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static uint64_t KYTY_SYSV_ABI KernelGetAvailableCpumask() {
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PRINT_NAME();
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return 0x1fff;
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}
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static KYTY_SYSV_ABI int KernelGetCurrentCpu() {
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static KYTY_SYSV_ABI int KernelGetCurrentCpu() {
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PRINT_NAME();
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PRINT_NAME();
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@@ -3340,6 +3346,7 @@ LIB_DEFINE(InitLibKernel_1) {
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LIB_FUNC("vYU8P9Td2Zo", KernelAioInitializeImpl);
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LIB_FUNC("vYU8P9Td2Zo", KernelAioInitializeImpl);
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LIB_FUNC("WhCc1w3EhSI", LibKernel::KernelSetThreadAtexitReport);
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LIB_FUNC("WhCc1w3EhSI", LibKernel::KernelSetThreadAtexitReport);
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LIB_FUNC("WkwEd3N7w0Y", LibKernel::KernelInstallExceptionHandler);
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LIB_FUNC("WkwEd3N7w0Y", LibKernel::KernelInstallExceptionHandler);
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LIB_FUNC("La9uyZv4Kvw", LibKernel::KernelGetAvailableCpumask);
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LIB_FUNC("g0VTBxfJyu0", LibKernel::KernelGetCurrentCpu);
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LIB_FUNC("g0VTBxfJyu0", LibKernel::KernelGetCurrentCpu);
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LIB_FUNC("wzvqT4UqKX8", LibKernel::KernelLoadStartModule);
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LIB_FUNC("wzvqT4UqKX8", LibKernel::KernelLoadStartModule);
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LIB_FUNC("Xjoosiw+XPI", LibKernel::KernelUuidCreate);
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LIB_FUNC("Xjoosiw+XPI", LibKernel::KernelUuidCreate);
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