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https://github.com/KytyPS5/KytyPS5.git
synced 2026-10-25 20:36:54 +01:00
shader: saturate V_CVT_PK_U16_U32 and V_CVT_PK_I16_I32
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@@ -49,18 +49,11 @@ void Translator::V_CVT_F16_16(const Decoder::Instruction& inst, bool signed_valu
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}
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void Translator::V_CVT_16_F16(const Decoder::Instruction& inst, bool signed_value) {
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const auto value = ReadF16AsF32(inst.src0);
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// The 32-bit conversion already saturates and maps NaN to zero.
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if (signed_value) {
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const auto converted = ir.Emit(IR::ValueOpcode::ConvertS32F32, {value});
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const auto low = ir.Emit(IR::ValueOpcode::SMax32, {converted, IR::Value(0xffff8000u)});
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Write16Bits(DestinationOperand(inst),
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IR::U32(ir.Emit(IR::ValueOpcode::SMin32, {low, IR::Value(0x7fffu)})));
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return;
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}
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const auto converted = ir.Emit(IR::ValueOpcode::ConvertU32F32, {value});
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Write16Bits(DestinationOperand(inst),
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IR::U32(ir.Emit(IR::ValueOpcode::UMin32, {converted, IR::Value(0xffffu)})));
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const auto converted = IR::U32(
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ir.Emit(signed_value ? IR::ValueOpcode::ConvertS32F32 : IR::ValueOpcode::ConvertU32F32,
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{ReadF16AsF32(inst.src0)}));
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Write16Bits(DestinationOperand(inst), Saturate16(converted, signed_value));
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}
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void Translator::V_CVT_RPI_I32_F32(const Decoder::Instruction& inst) {
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@@ -130,6 +123,12 @@ void Translator::V_CVT_PK_U8_F32(const Decoder::Instruction& inst) {
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{ReadU32(SourceAt(inst, 2)), byte, shift, IR::Value(8u)}));
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}
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void Translator::V_CVT_PK_16_32(const Decoder::Instruction& inst, bool signed_value) {
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WriteOperand(DestinationOperand(inst),
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PackU16Lanes(Saturate16(ReadU32(inst.src0), signed_value),
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Saturate16(ReadU32(inst.src1), signed_value)));
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}
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void Translator::V_PACK_B32_F16(const Decoder::Instruction& inst) {
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WriteOperand(DestinationOperand(inst),
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PackU16Lanes(Read16LaneBits(inst.src0, false), Read16LaneBits(inst.src1, false)));
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@@ -140,4 +139,12 @@ IR::U32 Translator::PackU16Lanes(IR::U32 low, IR::U32 high) {
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ir.Emit(IR::ValueOpcode::BitFieldInsert, {low, high, IR::Value(16u), IR::Value(16u)}));
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}
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IR::U32 Translator::Saturate16(IR::U32 value, bool signed_value) {
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if (!signed_value) {
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return IR::U32(ir.Emit(IR::ValueOpcode::UMin32, {value, IR::Value(0xffffu)}));
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}
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const auto low = ir.Emit(IR::ValueOpcode::SMax32, {value, IR::Value(0xffff8000u)});
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return IR::U32(ir.Emit(IR::ValueOpcode::SMin32, {low, IR::Value(0x7fffu)}));
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}
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} // namespace Libs::Graphics::ShaderRecompiler::Frontend
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@@ -25,8 +25,7 @@ void Translator::V_MAD_I16(const Decoder::Instruction& inst) {
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const auto rhs = ReadU16AsU32(inst.src1, true);
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auto result = ir.IAdd(ir.IMul(lhs, rhs), ReadU16AsU32(inst.src2, true));
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if (inst.dst.clamp) {
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result = IR::U32(ir.Emit(IR::ValueOpcode::SMax32, {result, IR::Value(0xffff8000u)}));
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result = IR::U32(ir.Emit(IR::ValueOpcode::SMin32, {result, IR::Value(0x7fffu)}));
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result = Saturate16(result, true);
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}
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Write16Bits(DestinationOperand(inst), result);
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}
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@@ -114,6 +114,7 @@ private:
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IR::F32 SelectF32(IR::U1 condition, IR::F32 true_value, IR::F32 false_value);
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IR::U32 PackU16Lanes(IR::U32 low, IR::U32 high);
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IR::U32 Saturate16(IR::U32 value, bool signed_value);
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void EmitCompareResult(const Decoder::Instruction& inst, IR::U1 value, bool scalar, bool cmpx);
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void EmitCompareConstant(const Decoder::Instruction& inst, bool value, bool scalar, bool cmpx);
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void EmitIntegerCompare(const Decoder::Instruction& inst, IR::ValueOpcode opcode, IR::Type type,
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@@ -141,6 +142,7 @@ private:
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void V_CVT_PKRTZ_F16_F32(const Decoder::Instruction& inst);
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void V_CVT_PKNORM_F32(const Decoder::Instruction& inst, IR::ValueOpcode opcode);
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void V_CVT_PK_U8_F32(const Decoder::Instruction& inst);
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void V_CVT_PK_16_32(const Decoder::Instruction& inst, bool signed_value);
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void V_PACK_B32_F16(const Decoder::Instruction& inst);
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void PackedFloat16(const Decoder::Instruction& inst, IR::ValueOpcode opcode, bool accumulator,
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bool quiet_snan);
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@@ -495,8 +495,8 @@ void Translator::EmitVector(const Decoder::Instruction& inst) {
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return;
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case O::V_CVT_PK_U8_F32: V_CVT_PK_U8_F32(inst); return;
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case O::V_PACK_B32_F16: V_PACK_B32_F16(inst); return;
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case O::V_CVT_PK_U16_U32:
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case O::V_CVT_PK_I16_I32: return PackB16(inst, false, false);
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case O::V_CVT_PK_U16_U32: return V_CVT_PK_16_32(inst, false);
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case O::V_CVT_PK_I16_I32: return V_CVT_PK_16_32(inst, true);
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case O::V_LSHLREV_B16:
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return Integer16Shift(inst, IR::ValueOpcode::ShiftLeftLogical32, false);
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