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graphics: sign-extend vector bitfield extracts
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@@ -548,12 +548,10 @@ bool Translator::TranslateExtendedInteger(const IR::Instruction& inst) {
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const auto count =
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IR::U32(ir.Emit(IR::ValueOpcode::UMin32,
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{mask(ReadU32(inst.src[2]), 31u), ir.ISub(imm(32), offset)}));
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if (inst.op == IR::Opcode::BitFieldExtract3I32) {
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result =
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ir.BitwiseAnd(ir.ShiftRightArithmetic(source, offset), right_mask32(count));
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} else {
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result = ir.Emit(IR::ValueOpcode::BitFieldUExtract, {source, offset, count});
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}
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const auto opcode = inst.op == IR::Opcode::BitFieldExtract3I32
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? IR::ValueOpcode::BitFieldSExtract
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: IR::ValueOpcode::BitFieldUExtract;
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result = ir.Emit(opcode, {source, offset, count});
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break;
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}
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case IR::Opcode::BitFieldInsertSelectU32: {
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