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shader: decode FLAT, GLOBAL and SCRATCH D16 high-half loads (#1924)
FLAT-family opcode 0x25 (FLAT/GLOBAL/SCRATCH_LOAD_SHORT_D16_HI) loads an unsigned halfword into bits [31:16] of the destination and keeps bits [15:0]. Decode it beside the low-half variant and let it select the high half of the existing partial destination write, so FLAT_LOAD needs no new path. Ghost of Yotei CS 0x79b0066f0cd1f3cd stopped at global_load_short_d16_hi v16, v18, s[0:1] offset:196 (0xdc9480c4 0x10000012).
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@@ -95,14 +95,14 @@ constexpr MemoryOpcodeInfo MTBUF_OPCODE_LIST[] = {
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};
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constexpr MemoryOpcodeInfo FLAT_OPCODE_LIST[] = {
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{0x08u, Opcode::FLAT_LOAD_UBYTE, 1, 8}, {0x09u, Opcode::FLAT_LOAD_SBYTE, 1, 8, true},
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{0x0au, Opcode::FLAT_LOAD_USHORT, 1, 16}, {0x0bu, Opcode::FLAT_LOAD_SSHORT, 1, 16, true},
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{0x0cu, Opcode::FLAT_LOAD_DWORD, 1, 32}, {0x0du, Opcode::FLAT_LOAD_DWORDX2, 2, 32},
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{0x0eu, Opcode::FLAT_LOAD_DWORDX4, 4, 32}, {0x0fu, Opcode::FLAT_LOAD_DWORDX3, 3, 32},
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{0x18u, Opcode::FLAT_STORE_BYTE, 1, 8}, {0x1au, Opcode::FLAT_STORE_SHORT, 1, 16},
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{0x1cu, Opcode::FLAT_STORE_DWORD, 1, 32}, {0x1du, Opcode::FLAT_STORE_DWORDX2, 2, 32},
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{0x1eu, Opcode::FLAT_STORE_DWORDX4, 4, 32}, {0x1fu, Opcode::FLAT_STORE_DWORDX3, 3, 32},
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{0x24u, Opcode::FLAT_LOAD_SHORT_D16, 1, 16},
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{0x08u, Opcode::FLAT_LOAD_UBYTE, 1, 8}, {0x09u, Opcode::FLAT_LOAD_SBYTE, 1, 8, true},
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{0x0au, Opcode::FLAT_LOAD_USHORT, 1, 16}, {0x0bu, Opcode::FLAT_LOAD_SSHORT, 1, 16, true},
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{0x0cu, Opcode::FLAT_LOAD_DWORD, 1, 32}, {0x0du, Opcode::FLAT_LOAD_DWORDX2, 2, 32},
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{0x0eu, Opcode::FLAT_LOAD_DWORDX4, 4, 32}, {0x0fu, Opcode::FLAT_LOAD_DWORDX3, 3, 32},
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{0x18u, Opcode::FLAT_STORE_BYTE, 1, 8}, {0x1au, Opcode::FLAT_STORE_SHORT, 1, 16},
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{0x1cu, Opcode::FLAT_STORE_DWORD, 1, 32}, {0x1du, Opcode::FLAT_STORE_DWORDX2, 2, 32},
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{0x1eu, Opcode::FLAT_STORE_DWORDX4, 4, 32}, {0x1fu, Opcode::FLAT_STORE_DWORDX3, 3, 32},
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{0x24u, Opcode::FLAT_LOAD_SHORT_D16, 1, 16}, {0x25u, Opcode::FLAT_LOAD_SHORT_D16_HI, 1, 16},
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};
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constexpr MemoryOpcodeInfo DS_OPCODE_LIST[] = {
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@@ -419,9 +419,10 @@ void DecodeFlat(uint32_t pc, std::span<const uint32_t> code, uint32_t word_index
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}
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DecodeVectorGpr(IsFlatStoreOpcode(inst.opcode) ? data : vdst, inst.dst);
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if (inst.opcode == Opcode::FLAT_LOAD_SHORT_D16) {
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// D16 loads reuse partial destinations to preserve the untouched high half.
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inst.dst.sdwa_sel = 4u;
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if (inst.opcode == Opcode::FLAT_LOAD_SHORT_D16 ||
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inst.opcode == Opcode::FLAT_LOAD_SHORT_D16_HI) {
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// D16 loads reuse partial destinations to preserve the untouched half.
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inst.dst.sdwa_sel = inst.opcode == Opcode::FLAT_LOAD_SHORT_D16_HI ? 5u : 4u;
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}
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DecodeVectorGpr(addr, inst.src0);
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inst.src_count = 1;
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@@ -701,6 +701,7 @@ std::string InstructionToString(const Instruction& inst) {
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case Opcode::FLAT_LOAD_USHORT:
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case Opcode::FLAT_LOAD_SSHORT:
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case Opcode::FLAT_LOAD_SHORT_D16:
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case Opcode::FLAT_LOAD_SHORT_D16_HI:
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case Opcode::FLAT_LOAD_DWORD:
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case Opcode::FLAT_LOAD_DWORDX2:
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case Opcode::FLAT_LOAD_DWORDX3:
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@@ -612,6 +612,7 @@ enum class Opcode {
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FLAT_LOAD_USHORT,
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FLAT_LOAD_SSHORT,
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FLAT_LOAD_SHORT_D16,
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FLAT_LOAD_SHORT_D16_HI,
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FLAT_LOAD_DWORD,
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FLAT_LOAD_DWORDX2,
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FLAT_LOAD_DWORDX3,
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@@ -1146,6 +1146,7 @@ void Translator::EmitMemory(const Decoder::Instruction& inst) {
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case Decoder::Opcode::FLAT_LOAD_USHORT:
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case Decoder::Opcode::FLAT_LOAD_SSHORT:
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case Decoder::Opcode::FLAT_LOAD_SHORT_D16:
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case Decoder::Opcode::FLAT_LOAD_SHORT_D16_HI:
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case Decoder::Opcode::FLAT_LOAD_DWORD:
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case Decoder::Opcode::FLAT_LOAD_DWORDX2:
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case Decoder::Opcode::FLAT_LOAD_DWORDX3:
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