From a3aece2762939a6a99d9dc4d8d9d9d7c87be84f8 Mon Sep 17 00:00:00 2001 From: nmzik Date: Thu, 22 Oct 2026 01:02:38 +0200 Subject: [PATCH] shader: check the DPP source lane bound only for row shifts --- .../shader/recompiler/backend/spirv/spirvEmitterFlow.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/graphics/shader/recompiler/backend/spirv/spirvEmitterFlow.cpp b/src/graphics/shader/recompiler/backend/spirv/spirvEmitterFlow.cpp index ff542da9e..f504bed10 100644 --- a/src/graphics/shader/recompiler/backend/spirv/spirvEmitterFlow.cpp +++ b/src/graphics/shader/recompiler/backend/spirv/spirvEmitterFlow.cpp @@ -130,7 +130,10 @@ uint32_t EmitDppWriteCondition(ValueEmitContext& ctx, const IR::DppMoveFlags& fl }; enable(flags.bank_mask, 2u); enable(flags.row_mask, 4u); - if (!flags.bound_control) { + // Only row shifts (0x101-0x10f, 0x111-0x11f) can vacate a lane; other controls always read one. + const bool row_shift = !flags.dpp8 && flags.control > 0x100u && flags.control < 0x120u && + flags.control != 0x110u; + if (!flags.bound_control && row_shift) { writable = Binary(state, spv::OpLogicalAnd, TypeBool(state), writable, EmitDppTargetLane(state, flags).valid); }