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shader: implement V_ASHRREV_I64 (VOP3 0x301)
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@@ -354,6 +354,7 @@ enum class Opcode {
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V_ASHRREV_I32,
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V_LSHLREV_B64,
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V_LSHRREV_B64,
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V_ASHRREV_I64,
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V_LSHLREV_B16,
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V_LSHRREV_B16,
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V_ASHRREV_I16,
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@@ -354,6 +354,7 @@ constexpr OpcodeMap VOP3_OPCODE_LIST[] = {
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{0x16cu, Opcode::V_MUL_HI_I32},
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{0x2ffu, Opcode::V_LSHLREV_B64},
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{0x300u, Opcode::V_LSHRREV_B64},
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{0x301u, Opcode::V_ASHRREV_I64},
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{0x303u, Opcode::V_ADD_NC_U16},
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{0x304u, Opcode::V_SUB_NC_U16},
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{0x305u, Opcode::V_MUL_LO_U16},
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@@ -1335,6 +1336,7 @@ uint32_t NativeVop3SourceCount(Opcode opcode) {
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case Opcode::V_SUB_NC_I16:
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case Opcode::V_LSHLREV_B64:
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case Opcode::V_LSHRREV_B64:
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case Opcode::V_ASHRREV_I64:
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case Opcode::V_LSHLREV_B16:
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case Opcode::V_LSHRREV_B16:
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case Opcode::V_ASHRREV_I16:
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@@ -147,6 +147,12 @@ void Translator::SimpleInteger(const Decoder::Instruction& inst, IR::ValueOpcode
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const auto arg_type = IR::ArgTypeOf(opcode, index);
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const auto& operand = SourceAt(inst, reverse && index < 2u ? 1u - index : index);
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args[index] = ReadOperand(operand, arg_type == IR::Type::Void ? type : arg_type);
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if (opcode == IR::ValueOpcode::ShiftRightArithmetic64 && index == 0u &&
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operand.kind == Decoder::OperandKind::LiteralConstant) {
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args[index] = ir.ConstructU64(
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ReadU32(operand),
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IR::U32(IR::Value((operand.value & 0x80000000u) ? 0xffffffffu : 0u)));
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}
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if (mask_shift_count && index == 1u) {
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args[index] = ir.BitwiseAnd(IR::U32(args[index]), IR::U32(IR::Value(31u)));
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}
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@@ -565,6 +565,9 @@ void Translator::EmitVector(const Decoder::Instruction& inst) {
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case O::V_LSHRREV_B64:
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return SimpleInteger(inst, IR::ValueOpcode::ShiftRightLogical64, IR::Type::U64, true,
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false, false);
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case O::V_ASHRREV_I64:
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return SimpleInteger(inst, IR::ValueOpcode::ShiftRightArithmetic64, IR::Type::U64, true,
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false, false);
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case O::V_XNOR_B32:
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return ComposedIntegerBinary(inst, IR::ValueOpcode::BitwiseXor32, false, true, false);
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