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https://github.com/KytyPS5/KytyPS5.git
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shader: implement V_SUB_NC_U32
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@@ -834,7 +834,7 @@ constexpr Vop2SdwaRule VOP2_SDWA_RULES[] = {
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{Opcode::VXorB32, SdwaSelWords() | SdwaSelFull(), SdwaSelAll(), SdwaSelAll(), true, false},
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{Opcode::VXorB32, SdwaSelWords() | SdwaSelFull(), SdwaSelAll(), SdwaSelAll(), true, false},
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{Opcode::VXnorB32, SdwaSelWords() | SdwaSelFull(), SdwaSelAll(), SdwaSelAll(), true, false},
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{Opcode::VXnorB32, SdwaSelWords() | SdwaSelFull(), SdwaSelAll(), SdwaSelAll(), true, false},
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{Opcode::VAddNcU32, SdwaSelFull(), SdwaSelAll(), SdwaSelAll(), false, false},
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{Opcode::VAddNcU32, SdwaSelFull(), SdwaSelAll(), SdwaSelAll(), false, false},
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{Opcode::VSubNcU32, SdwaSelFull(), SdwaSelAll(), SdwaSelAll(), false, false},
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{Opcode::VSubNcU32, SdwaSelAll(), SdwaSelAll(), SdwaSelAll(), true, false},
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{Opcode::VSubrevNcU32, SdwaSelFull(), SdwaSelAll(), SdwaSelAll(), false, false},
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{Opcode::VSubrevNcU32, SdwaSelFull(), SdwaSelAll(), SdwaSelAll(), false, false},
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};
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};
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@@ -10116,6 +10116,48 @@ TestCase VectorIntegerOps() {
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O::VCndmaskB32, O::BufferStoreDword, O::SEndpgm}};
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O::VCndmaskB32, O::BufferStoreDword, O::SEndpgm}};
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}
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}
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TestCase Vop2SdwaSubNcExactByte2Destination() {
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using O = ShaderOpcode;
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std::vector<u32> code;
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AppendVMovU32(&code, 11, 2);
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code.push_back(0x4c1616f9u);
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code.push_back(0x0686128du);
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AppendStoreVgpr(&code, 11, 0);
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AppendEnd(&code);
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TestCase test;
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test.name = "Vop2SdwaSubNcExactByte2Destination";
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test.code = code;
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test.expected = {0x000b0002u};
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test.opcodes = {O::VMovB32, O::VSubNcU32, O::BufferStoreDword, O::SEndpgm};
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test.required_spirv = {"OpISub", "OpShiftLeftLogical", "OpBitwiseOr"};
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return test;
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}
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TestCase Vop2SdwaSubNcPreservesByteAndWordDestinations() {
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using O = ShaderOpcode;
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std::vector<u32> code;
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AppendVMovU32(&code, 0, 3);
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for (u32 dst = 10; dst <= 15; dst++) {
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AppendVMovLiteral(&code, dst, 0xa1b2c3d4u);
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}
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for (u32 sel = 0; sel <= 5; sel++) {
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code.push_back(EncodeVop2(0x26, 10 + sel, 249, 0));
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code.push_back(EncodeVop2Sdwa(InlineU32(20), sel, 2, 6, 6, 0, 0, 0, 0, 0, 0, 1));
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AppendStoreVgpr(&code, 10 + sel, sel);
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}
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AppendEnd(&code);
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return {"Vop2SdwaSubNcPreservesByteAndWordDestinations",
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code,
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{},
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{0xa1b2c311u, 0xa1b211d4u, 0xa111c3d4u, 0x11b2c3d4u, 0xa1b20011u,
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0x0011c3d4u},
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{O::VMovB32, O::VSubNcU32, O::BufferStoreDword, O::SEndpgm}};
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}
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TestCase VectorShiftCountsMaskLowBits() {
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TestCase VectorShiftCountsMaskLowBits() {
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using O = ShaderOpcode;
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using O = ShaderOpcode;
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@@ -15050,6 +15092,8 @@ std::vector<TestCase> MakeCases() {
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AddCase(VectorMoves);
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AddCase(VectorMoves);
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AddCase(VectorVop3MoveAppliesFloatSourceModifiers);
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AddCase(VectorVop3MoveAppliesFloatSourceModifiers);
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AddCase(VectorIntegerOps);
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AddCase(VectorIntegerOps);
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AddCase(Vop2SdwaSubNcExactByte2Destination);
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AddCase(Vop2SdwaSubNcPreservesByteAndWordDestinations);
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AddCase(VectorShiftCountsMaskLowBits);
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AddCase(VectorShiftCountsMaskLowBits);
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AddCase(VectorVop3IntegerOps);
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AddCase(VectorVop3IntegerOps);
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AddCase(VectorBfeI32ArithmeticShiftMasksField);
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AddCase(VectorBfeI32ArithmeticShiftMasksField);
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@@ -2417,6 +2417,8 @@ void TestNewShaderRecompilerBootB16PackedAndSdwaOpcodes() {
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0x0c860688u, // v_add_nc_u32 v5, 8, sign-extended v4.lo
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0x0c860688u, // v_add_nc_u32 v5, 8, sign-extended v4.lo
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0x4a0c0cf9u,
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0x4a0c0cf9u,
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0x0d860688u, // v_add_nc_u32 v6, 8, sign-extended v6.hi
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0x0d860688u, // v_add_nc_u32 v6, 8, sign-extended v6.hi
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0x4c1616f9u,
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0x0686128du, // v_sub_nc_u32 v11.byte2, 13, v11; preserve other destination bytes
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0xbf810000u,
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0xbf810000u,
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};
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};
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@@ -2465,6 +2467,8 @@ void TestNewShaderRecompilerBootB16PackedAndSdwaOpcodes() {
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Check(Common::ContainsStr(result.decoded_dump, "v_add_nc_u32 v6") &&
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Check(Common::ContainsStr(result.decoded_dump, "v_add_nc_u32 v6") &&
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Common::ContainsStr(result.decoded_dump, "v6.sdwa(sel=5,sext=1"),
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Common::ContainsStr(result.decoded_dump, "v6.sdwa(sel=5,sext=1"),
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"new decoder did not decode V_ADD_NC_U32 SDWA sign-extended high word");
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"new decoder did not decode V_ADD_NC_U32 SDWA sign-extended high word");
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Check(Common::ContainsStr(result.decoded_dump, "v_sub_nc_u32 v11.sdwa(sel=2"),
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"new decoder did not decode V_SUB_NC_U32 SDWA byte-2 destination");
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Check(!Common::ContainsStr(result.decoded_dump, "unsupported family=VOP2 opcode=0x00"),
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Check(!Common::ContainsStr(result.decoded_dump, "unsupported family=VOP2 opcode=0x00"),
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"literal/SDWA extension words were decoded as phantom VOP2 instructions");
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"literal/SDWA extension words were decoded as phantom VOP2 instructions");
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Check(!Common::ContainsStr(result.decoded_dump,
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Check(!Common::ContainsStr(result.decoded_dump,
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@@ -2498,6 +2502,8 @@ void TestNewShaderRecompilerBootB16PackedAndSdwaOpcodes() {
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Check(Common::ContainsStr(result.ir_dump, "IAddU32 v6") &&
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Check(Common::ContainsStr(result.ir_dump, "IAddU32 v6") &&
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Common::ContainsStr(result.ir_dump, "v6.sdwa(sel=5,sext=1"),
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Common::ContainsStr(result.ir_dump, "v6.sdwa(sel=5,sext=1"),
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"V_ADD_NC_U32 SDWA sign-extended high word did not lower to IR");
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"V_ADD_NC_U32 SDWA sign-extended high word did not lower to IR");
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Check(Common::ContainsStr(result.ir_dump, "ISubU32 v11.sdwa(sel=2"),
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"V_SUB_NC_U32 SDWA byte-2 destination did not lower to IR");
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Check(SpirvContainsOpcode(result.spirv, 128),
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Check(SpirvContainsOpcode(result.spirv, 128),
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"SPIR-V binary does not contain OpIAdd for U16 operations");
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"SPIR-V binary does not contain OpIAdd for U16 operations");
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Check(SpirvContainsOpcode(result.spirv, 202),
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Check(SpirvContainsOpcode(result.spirv, 202),
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