shader: implement BUFFER_ATOMIC_FMAX

src/graphics/shader/recompiler/ir/ResourceTracking.cpp

@@ -31,7 +31,8 @@ bool IsAtomic(Opcode op) {
 		case Opcode::AtomicAndU32:
 		case Opcode::AtomicOrU32:
 		case Opcode::AtomicXorU32:
-		case Opcode::AtomicFMinF32: return true;
+		case Opcode::AtomicFMinF32:
+		case Opcode::AtomicFMaxF32: return true;
 		default: return false;
 	}
 }

src/graphics/shader/recompiler/ir/ShaderIR.cpp

@@ -975,7 +975,12 @@ bool LowerControlInstruction(const Decoder::Instruction& decoded, BasicBlock& bl
 			return LowerControlMarker(decoded, block, Opcode::TtraceData, true, error);
 		case Decoder::Opcode::SInstPrefetch:
 			return LowerControlMarker(decoded, block, Opcode::InstPrefetch, true, error);
-		default: return false;
+		default:
+			if (error != nullptr) {
+				*error = fmt::format("control opcode has no specialized IR lowering: {}",
+				                     Decoder::OpcodeToString(decoded.opcode));
+			}
+			return false;
 	}
 }
 
@@ -1064,6 +1069,18 @@ bool IsTerminatorOpcode(Decoder::Opcode opcode) {
 
 bool LowerImplemented(const Decoder::Instruction& decoded, BasicBlock& block, std::string* error);
 
+bool IsMemoryFamily(Decoder::Family family) {
+	switch (family) {
+		case Decoder::Family::SMEM:
+		case Decoder::Family::MUBUF:
+		case Decoder::Family::MTBUF:
+		case Decoder::Family::FLAT:
+		case Decoder::Family::DS:
+		case Decoder::Family::MIMG: return true;
+		default: return false;
+	}
+}
+
 bool LowerDecodedInstruction(const Decoder::Instruction& inst, BasicBlock& block,
                              std::string* error) {
 	switch (inst.opcode) {
@@ -1117,6 +1134,15 @@ bool LowerDecodedInstruction(const Decoder::Instruction& inst, BasicBlock& block
 	if (IsMemoryOpcode(inst.opcode)) {
 		return LowerMemoryInstruction(inst, block, error);
 	}
+	// Memory instructions require specialized lowering to populate MemoryInfo. Never let a
+	// newly decoded memory-family opcode fall through to generic register-only IR.
+	if (IsMemoryFamily(inst.family)) {
+		if (error != nullptr) {
+			*error = fmt::format("decoded memory-family opcode has no specialized IR lowering: {}",
+			                     Decoder::OpcodeToString(inst.opcode));
+		}
+		return false;
+	}
 	if (ScalarShiftLeftAddAmount(inst.opcode) != 0) {
 		return LowerScalarShiftLeftAdd(inst, block, error);
 	}

src/graphics/shader/recompiler/ir/ShaderIRMemory.cpp

@@ -571,6 +571,8 @@ bool LowerMemoryInstruction(const Decoder::Instruction& decoded, BasicBlock& blo
 			return LowerBufferAtomicDword(decoded, block, Opcode::AtomicXorU32, error);
 		case Decoder::Opcode::BufferAtomicFMin:
 			return LowerBufferAtomicDword(decoded, block, Opcode::AtomicFMinF32, error);
+		case Decoder::Opcode::BufferAtomicFMax:
+			return LowerBufferAtomicDword(decoded, block, Opcode::AtomicFMaxF32, error);
 		case Decoder::Opcode::FlatLoadUbyte:
 		case Decoder::Opcode::FlatLoadSbyte:
 		case Decoder::Opcode::FlatLoadUshort:
@@ -675,7 +677,12 @@ bool LowerMemoryInstruction(const Decoder::Instruction& decoded, BasicBlock& blo
 		case Decoder::Opcode::ImageAtomicAnd:
 		case Decoder::Opcode::ImageAtomicOr:
 		case Decoder::Opcode::ImageAtomicXor: return LowerImageAtomicU32(decoded, block, error);
-		default: return false;
+		default:
+			if (error != nullptr) {
+				*error = fmt::format("memory opcode has no specialized IR lowering: {}",
+				                     Decoder::OpcodeToString(decoded.opcode));
+			}
+			return false;
 	}
 }
 
@@ -732,6 +739,7 @@ bool IsMemoryOpcode(Decoder::Opcode opcode) {
 		case Decoder::Opcode::BufferAtomicOr:
 		case Decoder::Opcode::BufferAtomicXor:
 		case Decoder::Opcode::BufferAtomicFMin:
+		case Decoder::Opcode::BufferAtomicFMax:
 		case Decoder::Opcode::FlatLoadUbyte:
 		case Decoder::Opcode::FlatLoadSbyte:
 		case Decoder::Opcode::FlatLoadUshort:

src/graphics/shader/recompiler/ir/ShaderIROpcodes.cpp

@@ -353,6 +353,7 @@ constexpr LowerMap LOWER_OPS[] = {
     {Decoder::Opcode::BufferAtomicOr, Opcode::AtomicOrU32},
     {Decoder::Opcode::BufferAtomicXor, Opcode::AtomicXorU32},
     {Decoder::Opcode::BufferAtomicFMin, Opcode::AtomicFMinF32},
+    {Decoder::Opcode::BufferAtomicFMax, Opcode::AtomicFMaxF32},
     {Decoder::Opcode::FlatLoadUbyte, Opcode::FlatLoadUbyte},
     {Decoder::Opcode::FlatLoadSbyte, Opcode::FlatLoadSbyte},
     {Decoder::Opcode::FlatLoadSshort, Opcode::FlatLoadSshort},

src/graphics/shader/recompiler/ir/ShaderIROpcodes.inc

@@ -308,6 +308,7 @@ IR_OPCODE(AtomicAndU32, General)
 IR_OPCODE(AtomicOrU32, General)
 IR_OPCODE(AtomicXorU32, General)
 IR_OPCODE(AtomicFMinF32, General)
+IR_OPCODE(AtomicFMaxF32, General)
 IR_OPCODE(FlatLoadUbyte, General)
 IR_OPCODE(FlatLoadSbyte, General)
 IR_OPCODE(FlatLoadUshort, General)