mirror of
https://github.com/KytyPS5/KytyPS5.git
synced 2026-10-21 11:26:56 +02:00
shader: remove recompiler error-string propagation
This commit is contained in:
@@ -1,19 +1,23 @@
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#include "graphics/shader/recompiler/backend/spirv/SpirvEmitter.h"
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#include "common/assert.h"
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#include "graphics/shader/recompiler/backend/spirv/spirvEmitterInternal.h"
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#include "graphics/shader/recompiler/ir/ShaderIR.h"
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#include "graphics/shader/shader.h"
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#include <algorithm>
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#include <array>
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namespace Libs::Graphics::ShaderRecompiler::Spirv {
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using ShaderError::Fail;
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namespace {
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bool ValidateNativeProgram(const IR::Program& program, std::string* error) {
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[[noreturn]] void Fail(const IR::Program& program, const char* reason) {
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EXIT("SPIR-V validation failed: hash=0x%016" PRIx64 " stage=%u reason=%s\n",
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program.shader_hash, static_cast<unsigned>(program.stage), reason);
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std::abort();
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}
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void ValidateNativeProgram(const IR::Program& program) {
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using Kind = IR::DescriptorBindingKind;
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constexpr auto KindCount = static_cast<size_t>(Kind::Count);
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std::array<std::vector<uint32_t>, KindCount> expected;
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@@ -36,13 +40,13 @@ bool ValidateNativeProgram(const IR::Program& program, std::string* error) {
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for (uint32_t i = 0; i < program.info.images.size(); i++) {
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const auto kind = IR::DescriptorBindingForImage(program.info.images[i]);
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if (!kind.has_value()) {
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return Fail(error, "native shader plan has an invalid image class");
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Fail(program, "native shader plan has an invalid image class");
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}
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present[static_cast<size_t>(*kind)] = true;
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const auto dynamic = program.info.images[i].mip_mode == IR::ImageMipMode::DynamicStorage;
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const auto count = dynamic ? program.info.images[i].mip_count : 1u;
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if (count == 0u || (!dynamic && program.info.images[i].mip_count != 1u)) {
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return Fail(error, "native shader plan has an invalid image mip descriptor count");
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Fail(program, "native shader plan has an invalid image mip descriptor count");
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}
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expected[static_cast<size_t>(*kind)].insert(expected[static_cast<size_t>(*kind)].end(),
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count, i);
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@@ -58,11 +62,11 @@ bool ValidateNativeProgram(const IR::Program& program, std::string* error) {
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}
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const auto index = inst.Flags<IR::MemoryFlags>().index;
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if (index >= program.memory_info.size()) {
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return Fail(error, "shared operation has invalid memory metadata");
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Fail(program, "shared operation has invalid memory metadata");
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}
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const auto kind = program.memory_info[index].kind;
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if (kind != IR::ResourceKind::Lds && kind != IR::ResourceKind::Gds) {
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return Fail(error, "shared operation has invalid resource kind");
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Fail(program, "shared operation has invalid resource kind");
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}
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uses_gds |= kind == IR::ResourceKind::Gds;
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}
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@@ -91,13 +95,13 @@ bool ValidateNativeProgram(const IR::Program& program, std::string* error) {
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const auto kind = static_cast<size_t>(binding.kind);
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if (kind >= KindCount || seen[kind] || !present[kind] ||
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binding.resources != expected[kind]) {
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return Fail(error, "native descriptor groups do not match shader topology");
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Fail(program, "native descriptor groups do not match shader topology");
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}
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seen[kind] = true;
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}
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for (size_t i = 0; i < KindCount; i++) {
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if (present[i] != seen[i]) {
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return Fail(error, "native shader plan is missing a required descriptor group");
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Fail(program, "native shader plan is missing a required descriptor group");
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}
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}
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const auto has_user_storage = present[static_cast<size_t>(Kind::UserData)];
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@@ -114,7 +118,7 @@ bool ValidateNativeProgram(const IR::Program& program, std::string* error) {
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std::adjacent_find(program.bindings.user_data_registers.begin(),
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program.bindings.user_data_registers.end()) !=
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program.bindings.user_data_registers.end()) {
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return Fail(error, "native user-data layout is inconsistent");
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Fail(program, "native user-data layout is inconsistent");
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}
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const auto planning_only_handle = [&](const IR::Inst& handle) {
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@@ -139,7 +143,7 @@ bool ValidateNativeProgram(const IR::Program& program, std::string* error) {
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break;
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}
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if (dense >= program.info.buffers.size()) {
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return Fail(error, "typed buffer handle has an invalid dense resource");
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Fail(program, "typed buffer handle has an invalid dense resource");
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}
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break;
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case IR::ValueOpcode::GetAddressResource:
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@@ -147,29 +151,29 @@ bool ValidateNativeProgram(const IR::Program& program, std::string* error) {
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break;
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}
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if (inst.NumArgs() != 2 || !program.info.uses_dma) {
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return Fail(error, "typed address handle has invalid DMA metadata");
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Fail(program, "typed address handle has invalid DMA metadata");
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}
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break;
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case IR::ValueOpcode::GetScratchResource:
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if (inst.NumArgs() != 0 || program.scratch_dwords == 0) {
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return Fail(error, "typed scratch handle has invalid shader metadata");
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Fail(program, "typed scratch handle has invalid shader metadata");
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}
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break;
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case IR::ValueOpcode::GetImageResource:
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if (dense >= program.info.images.size()) {
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return Fail(error, "typed image handle has an invalid dense resource");
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Fail(program, "typed image handle has an invalid dense resource");
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}
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break;
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case IR::ValueOpcode::GetSamplerResource:
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if (dense >= program.info.samplers.size()) {
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return Fail(error, "typed sampler handle has an invalid dense resource");
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Fail(program, "typed sampler handle has an invalid dense resource");
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}
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break;
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case IR::ValueOpcode::ReadConst: {
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const auto slot = inst.Arg(1).Resolve();
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if (!slot.IsImmediate() || slot.GetType() != IR::Type::U32 ||
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slot.U32() >= program.srt_reads.size()) {
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return Fail(error, "flattened SRT read has an invalid dense slot");
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Fail(program, "flattened SRT read has an invalid dense slot");
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}
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break;
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}
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@@ -177,12 +181,11 @@ bool ValidateNativeProgram(const IR::Program& program, std::string* error) {
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}
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}
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}
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return true;
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}
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} // namespace
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bool AnalyzeProgramRequirements(IR::Program& program, std::string* error) {
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void AnalyzeProgramRequirements(IR::Program& program) {
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program.spirv_requirements.reset();
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IR::SpirvRequirements requirements {};
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const auto MarkBallot = [&] { requirements.subgroup_ballot = true; };
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@@ -192,30 +195,30 @@ bool AnalyzeProgramRequirements(IR::Program& program, std::string* error) {
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if (address_access != IR::AddressAccess::None) {
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const auto memory_index = inst.Flags<IR::MemoryFlags>().index;
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if (memory_index >= program.memory_info.size()) {
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return Fail(error, "address operation has invalid memory metadata");
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Fail(program, "address operation has invalid memory metadata");
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}
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if (program.memory_info[memory_index].kind == IR::ResourceKind::Scratch) {
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if (program.scratch_dwords == 0) {
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return Fail(error, "scratch operation has no per-thread storage");
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Fail(program, "scratch operation has no per-thread storage");
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}
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requirements.function_scratch = true;
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} else if (address_access == IR::AddressAccess::Write) {
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return Fail(error, "writable FLAT/GLOBAL addresses require GPU ownership tracking");
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Fail(program, "writable FLAT/GLOBAL addresses require GPU ownership tracking");
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}
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}
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if (IR::BufferAccessOf(inst.GetOpcode()) != IR::BufferAccess::None) {
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const auto memory_index = inst.Flags<IR::MemoryFlags>().index;
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if (memory_index >= program.memory_info.size()) {
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return Fail(error, "buffer operation has invalid memory metadata");
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Fail(program, "buffer operation has invalid memory metadata");
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}
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const auto& memory = program.memory_info[memory_index];
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if (memory.kind == IR::ResourceKind::Buffer) {
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if (memory.resource >= program.info.buffers.size()) {
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return Fail(error, "buffer operation has invalid resource metadata");
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Fail(program, "buffer operation has invalid resource metadata");
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}
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if ((program.info.buffers[memory.resource].packed_stride & (1u << 20u)) != 0u) {
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if (program.stage != ShaderType::Compute) {
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return Fail(error, "buffer ADD_TID is only valid for compute shaders");
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Fail(program, "buffer ADD_TID is only valid for compute shaders");
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}
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requirements.subgroup_local_invocation_id = true;
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}
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@@ -225,11 +228,11 @@ bool AnalyzeProgramRequirements(IR::Program& program, std::string* error) {
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if (shared_access != IR::SharedAccess::None) {
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const auto index = inst.Flags<IR::MemoryFlags>().index;
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if (index >= program.memory_info.size()) {
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return Fail(error, "shared operation has invalid memory metadata");
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Fail(program, "shared operation has invalid memory metadata");
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}
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const auto kind = program.memory_info[index].kind;
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if (kind != IR::ResourceKind::Lds && kind != IR::ResourceKind::Gds) {
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return Fail(error, "shared operation has invalid resource kind");
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Fail(program, "shared operation has invalid resource kind");
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}
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if (program.stage != ShaderType::Compute && kind == IR::ResourceKind::Lds) {
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requirements.function_lds = true;
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@@ -283,7 +286,7 @@ bool AnalyzeProgramRequirements(IR::Program& program, std::string* error) {
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case IR::ValueOpcode::SetAttribute: {
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const auto index = inst.Flags<IR::ExportFlags>().index;
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if (index >= program.export_info.size()) {
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return Fail(error, "attribute export has invalid metadata");
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Fail(program, "attribute export has invalid metadata");
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}
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if (program.stage == ShaderType::Pixel &&
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program.export_info[index].vm) {
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@@ -296,37 +299,30 @@ bool AnalyzeProgramRequirements(IR::Program& program, std::string* error) {
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}
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}
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program.spirv_requirements.emplace(requirements);
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return true;
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}
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bool EmitProgram(const IR::Program& program, const IR::ResourceSnapshot& resources,
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ShaderStageInputInfo input_info, std::vector<uint32_t>& spirv,
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std::string* error) {
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std::vector<uint32_t> EmitProgram(const IR::Program& program,
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const IR::ResourceSnapshot& resources,
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ShaderStageInputInfo input_info) {
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using namespace Emitter;
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if (program.stage != ShaderType::Compute && program.stage != ShaderType::Vertex &&
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program.stage != ShaderType::Pixel) {
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SetError(error, "binary SPIR-V emitter supports compute, vertex, and pixel shaders");
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return false;
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Fail(program, "binary SPIR-V emitter supports compute, vertex, and pixel shaders");
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}
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if (!program.srt_plan_complete || !program.resource_tracking_complete ||
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!program.shader_info_complete || !program.binding_layout_complete ||
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!program.spirv_requirements.has_value()) {
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SetError(error, "SPIR-V emitter requires a fully planned native shader program");
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return false;
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Fail(program, "SPIR-V emitter requires a fully planned native shader program");
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}
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if (!IR::ValidateResourceSnapshot(program, resources, error)) {
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return false;
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if (!IR::ValidateResourceSnapshot(program, resources)) {
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Fail(program, "resource snapshot is inconsistent with the native shader plan");
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}
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if (!IR::ValidateResourceSpecialization(program, resources, error)) {
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return false;
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}
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if (!ValidateNativeProgram(program, error)) {
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return false;
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}
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if (!IR::ValidateProgram(program, true, error)) {
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return false;
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if (!IR::ValidateResourceSpecialization(program, resources)) {
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Fail(program, "resource specialization is inconsistent with the native shader plan");
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}
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ValidateNativeProgram(program);
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IR::ValidateProgram(program, true);
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EmitterState state(program, resources, input_info);
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state.stage = program.stage;
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state.wave_size = program.wave_size;
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@@ -337,17 +333,13 @@ bool EmitProgram(const IR::Program& program, const IR::ResourceSnapshot& resourc
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AllocateInputVariables(state);
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AllocateOutputVariables(state);
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DefineModule(state);
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if (!EmitProgram(state, program, error)) {
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return false;
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}
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EmitProgram(state, program);
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auto binary = state.builder.Build();
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if (binary.empty()) {
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SetError(error, "SPIR-V builder returned an empty module");
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return false;
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Fail(program, "SPIR-V builder returned an empty module");
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}
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spirv = std::move(binary);
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return true;
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return binary;
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}
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} // namespace Libs::Graphics::ShaderRecompiler::Spirv
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@@ -9,10 +9,11 @@
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namespace Libs::Graphics::ShaderRecompiler::Spirv {
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bool AnalyzeProgramRequirements(IR::Program& program, std::string* error);
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void AnalyzeProgramRequirements(IR::Program& program);
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bool EmitProgram(const IR::Program& program, const IR::ResourceSnapshot& resources,
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ShaderStageInputInfo input_info, std::vector<uint32_t>& spirv, std::string* error);
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std::vector<uint32_t> EmitProgram(const IR::Program& program,
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const IR::ResourceSnapshot& resources,
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ShaderStageInputInfo input_info);
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} // namespace Libs::Graphics::ShaderRecompiler::Spirv
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@@ -37,12 +37,6 @@ bool PixelParameterIsCustom(const EmitterState& state, uint32_t attr) {
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ShaderPixelParameterIsCustom(*state.input_info.pixel, attr);
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}
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void SetError(std::string* error, const char* message) {
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if (error != nullptr) {
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*error = message;
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}
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}
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bool HasOutput(const std::vector<OutputBinding>& outputs, IR::StageOutputKind kind,
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uint32_t index) {
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return std::any_of(outputs.begin(), outputs.end(), [kind, index](const OutputBinding& binding) {
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@@ -439,7 +439,8 @@ struct ValueEmitContext {
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const IR::MemoryInfo& Memory(const IR::Inst& inst) const;
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const IR::ExportInfo& Export(const IR::Inst& inst) const;
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uint32_t Label(const IR::Block* block) const;
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void Fail(const IR::Inst& inst, const char* reason);
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[[noreturn]] void Fail(const char* reason) const;
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[[noreturn]] void Fail(const IR::Inst& inst, const char* reason) const;
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EmitterState& state;
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const IR::Program& program;
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@@ -449,8 +450,6 @@ struct ValueEmitContext {
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std::unordered_map<const IR::Inst*, std::pair<uint32_t, uint32_t>> dispatcher_block_loads;
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const IR::Block* current_block = nullptr;
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uint32_t scratch_u32_variable = 0;
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bool failed = false;
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std::string error;
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};
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enum class VertexInputScalarKind { Float, Sint, Uint };
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@@ -613,8 +612,6 @@ uint32_t VertexParameterVectorOrScalarType(EmitterState& state, VertexInputScala
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uint32_t VertexParameterInputPointerType(EmitterState& state, VertexInputScalarKind kind,
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uint32_t components);
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void SetError(std::string* error, const char* message);
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bool HasOutput(const std::vector<OutputBinding>& outputs, IR::StageOutputKind kind, uint32_t index);
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void CopyProgramInputsAndOutputs(EmitterState& state, const IR::Program& program);
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@@ -864,7 +861,7 @@ bool EmitValueMemory(ValueEmitContext& ctx, const IR::Inst& inst);
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bool EmitValueImage(ValueEmitContext& ctx, const IR::Inst& inst);
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bool EmitProgram(EmitterState& state, const IR::Program& program, std::string* error);
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void EmitProgram(EmitterState& state, const IR::Program& program);
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void DefineGetBdaPointer(EmitterState& state);
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@@ -1,8 +1,9 @@
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#include "graphics/shader/recompiler/backend/spirv/spirvEmitterInternal.h"
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#include "common/assert.h"
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#include <algorithm>
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#include <bit>
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#include <fmt/format.h>
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#include <functional>
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#include <optional>
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#include <unordered_set>
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@@ -196,57 +197,50 @@ uint32_t EmitDispatcherNextPc(ValueEmitContext& ctx, const DispatcherFunctionSta
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}
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}
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bool EmitDirectInstruction(ValueEmitContext& ctx, const IR::Inst& inst) {
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void EmitDirectInstruction(ValueEmitContext& ctx, const IR::Inst& inst) {
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if (EmitValueFlow(ctx, inst) || EmitValueAlu(ctx, inst) || EmitValueMemory(ctx, inst) ||
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EmitValueImage(ctx, inst)) {
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return true;
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return;
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}
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ctx.Fail(inst, "has no direct SPIR-V emitter");
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return false;
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}
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bool EmitStructuredInstruction(ValueEmitContext& ctx, StructuredFunctionState& structured,
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void EmitStructuredInstruction(ValueEmitContext& ctx, StructuredFunctionState& structured,
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const IR::Inst& inst) {
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if (inst.GetOpcode() == IR::ValueOpcode::Phi) {
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const auto type = ctx.TypeId(inst.GetType());
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if (type == 0 || inst.NumArgs() == 0) {
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ctx.Fail(inst, "has no native SPIR-V representation");
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return false;
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}
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for (size_t index = 0; index < inst.NumArgs(); index++) {
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const auto* predecessor = inst.PhiBlock(index);
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if (predecessor == nullptr || !ctx.labels.contains(predecessor)) {
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ctx.Fail(inst, "has a predecessor outside the structured function");
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return false;
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}
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}
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structured.deferred_phis.push_back(
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{ctx.state.builder.AddDeferredPhi(type, ctx.Result(inst), inst.NumArgs()), &inst});
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return true;
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return;
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}
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return EmitDirectInstruction(ctx, inst);
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EmitDirectInstruction(ctx, inst);
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}
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bool EmitDispatcherInstruction(ValueEmitContext& ctx, const DispatcherFunctionState& dispatcher,
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void EmitDispatcherInstruction(ValueEmitContext& ctx, const DispatcherFunctionState& dispatcher,
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const IR::Inst& inst) {
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if (inst.GetOpcode() == IR::ValueOpcode::Phi) {
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const auto type = ctx.TypeId(inst.GetType());
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if (type == 0) {
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ctx.Fail(inst, "cannot be loaded by the dispatcher");
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return false;
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}
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ctx.state.builder.AddFunction(
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{OpLoad, type, ctx.Result(inst), dispatcher.spills.at(&inst)});
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return true;
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}
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if (!EmitDirectInstruction(ctx, inst)) {
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return false;
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return;
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}
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EmitDirectInstruction(ctx, inst);
|
||||
if (const auto found = dispatcher.spills.find(&inst); found != dispatcher.spills.end()) {
|
||||
ctx.state.builder.AddFunction(
|
||||
{OpStore, found->second, ctx.Def(IR::Value(const_cast<IR::Inst*>(&inst)))});
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
template <typename EmitInstruction>
|
||||
@@ -258,14 +252,11 @@ void EmitBlock(ValueEmitContext& ctx, const IR::Block* block, EmitInstruction&&
|
||||
if (inst.GetOpcode() == IR::ValueOpcode::Phi) {
|
||||
if (emitted_non_phi) {
|
||||
ctx.Fail(inst, "appears after a non-Phi instruction");
|
||||
return;
|
||||
}
|
||||
} else {
|
||||
emitted_non_phi = true;
|
||||
}
|
||||
if (!emit_instruction(inst)) {
|
||||
return;
|
||||
}
|
||||
emit_instruction(inst);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -275,15 +266,10 @@ void PatchStructuredPhis(ValueEmitContext& ctx, StructuredFunctionState& structu
|
||||
const auto* predecessor = deferred.instruction->PhiBlock(index);
|
||||
const auto found = structured.block_exit_labels.find(predecessor);
|
||||
if (found == structured.block_exit_labels.end()) {
|
||||
ctx.failed = true;
|
||||
ctx.error = "typed Phi predecessor was not emitted";
|
||||
return;
|
||||
ctx.Fail(*deferred.instruction, "has a predecessor that was not emitted");
|
||||
}
|
||||
ctx.state.builder.PatchDeferredPhi(
|
||||
deferred.phi, index, ctx.Def(deferred.instruction->Arg(index)), found->second);
|
||||
if (ctx.failed) {
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -291,20 +277,15 @@ void PatchStructuredPhis(ValueEmitContext& ctx, StructuredFunctionState& structu
|
||||
void EmitStructuredFunction(ValueEmitContext& ctx) {
|
||||
StructuredFunctionState structured;
|
||||
ctx.state.builder.AddFunction({OpBranch, ctx.Label(ctx.program.blocks.front())});
|
||||
for (size_t index = 0; index < ctx.program.blocks.size() && !ctx.failed; index++) {
|
||||
for (size_t index = 0; index < ctx.program.blocks.size(); index++) {
|
||||
const auto* block = ctx.program.blocks[index];
|
||||
EmitBlock(ctx, block, [&](const IR::Inst& inst) {
|
||||
return EmitStructuredInstruction(ctx, structured, inst);
|
||||
EmitStructuredInstruction(ctx, structured, inst);
|
||||
});
|
||||
if (ctx.failed) {
|
||||
break;
|
||||
}
|
||||
structured.block_exit_labels.emplace(block, ctx.state.current_label);
|
||||
EmitStructuredTerminator(ctx, block, ctx.program.block_info[index]);
|
||||
}
|
||||
if (!ctx.failed) {
|
||||
PatchStructuredPhis(ctx, structured);
|
||||
}
|
||||
PatchStructuredPhis(ctx, structured);
|
||||
}
|
||||
|
||||
void EmitDispatcherFunction(ValueEmitContext& ctx, const DispatcherFunctionState& dispatcher) {
|
||||
@@ -312,11 +293,8 @@ void EmitDispatcherFunction(ValueEmitContext& ctx, const DispatcherFunctionState
|
||||
const auto* entry = ctx.program.blocks.front();
|
||||
state.builder.AddFunction({OpBranch, ctx.Label(entry)});
|
||||
EmitBlock(ctx, entry, [&](const IR::Inst& inst) {
|
||||
return EmitDispatcherInstruction(ctx, dispatcher, inst);
|
||||
EmitDispatcherInstruction(ctx, dispatcher, inst);
|
||||
});
|
||||
if (ctx.failed) {
|
||||
return;
|
||||
}
|
||||
const auto initial_pc =
|
||||
EmitDispatcherNextPc(ctx, dispatcher, entry, ctx.program.block_info.front());
|
||||
const auto initial_parent = state.current_label;
|
||||
@@ -347,22 +325,16 @@ void EmitDispatcherFunction(ValueEmitContext& ctx, const DispatcherFunctionState
|
||||
std::vector<uint32_t> next_pc_words {OpPhi, TypeU32(state), next_pc,
|
||||
ConstantU32(state, UINT32_MAX), dispatcher.select_label};
|
||||
|
||||
for (size_t index = 1; index < ctx.program.blocks.size() && !ctx.failed; index++) {
|
||||
for (size_t index = 1; index < ctx.program.blocks.size(); index++) {
|
||||
EmitBlock(ctx, ctx.program.blocks[index], [&](const IR::Inst& inst) {
|
||||
return EmitDispatcherInstruction(ctx, dispatcher, inst);
|
||||
EmitDispatcherInstruction(ctx, dispatcher, inst);
|
||||
});
|
||||
if (ctx.failed) {
|
||||
break;
|
||||
}
|
||||
const auto selected = EmitDispatcherNextPc(ctx, dispatcher, ctx.program.blocks[index],
|
||||
ctx.program.block_info[index]);
|
||||
next_pc_words.push_back(selected);
|
||||
next_pc_words.push_back(state.current_label);
|
||||
state.builder.AddFunction({OpBranch, dispatcher.after_switch_label});
|
||||
}
|
||||
if (ctx.failed) {
|
||||
return;
|
||||
}
|
||||
EmitLabel(state, dispatcher.after_switch_label);
|
||||
state.builder.AddFunction(next_pc_words);
|
||||
state.builder.AddFunction({OpBranch, dispatcher.continue_label});
|
||||
@@ -408,9 +380,7 @@ uint32_t ValueEmitContext::Def(IR::Value value) {
|
||||
}
|
||||
const auto* inst = value.ResolveInstruction();
|
||||
if (inst == nullptr) {
|
||||
failed = true;
|
||||
error = "direct SPIR-V emitter received a non-value argument";
|
||||
return ConstantU32(state, 0);
|
||||
Fail("direct SPIR-V emitter received a non-value argument");
|
||||
}
|
||||
if (dispatcher_spills != nullptr && current_block != nullptr &&
|
||||
inst->Parent() != current_block) {
|
||||
@@ -469,9 +439,7 @@ uint32_t ValueEmitContext::Define(const IR::Inst& inst, uint32_t value) {
|
||||
uint32_t ValueEmitContext::ResourceIndex(IR::Value value, IR::ValueOpcode opcode) {
|
||||
const auto* inst = value.ResolveInstruction();
|
||||
if (inst == nullptr || inst->GetOpcode() != opcode) {
|
||||
failed = true;
|
||||
error = "typed resource handle has the wrong producer";
|
||||
return 0;
|
||||
Fail("typed resource handle has the wrong producer");
|
||||
}
|
||||
return inst->Flags<uint32_t>();
|
||||
}
|
||||
@@ -479,9 +447,7 @@ uint32_t ValueEmitContext::ResourceIndex(IR::Value value, IR::ValueOpcode opcode
|
||||
const IR::Inst* ValueEmitContext::ImageAddress(IR::Value value) {
|
||||
const auto* inst = value.ResolveInstruction();
|
||||
if (inst == nullptr || inst->GetOpcode() != IR::ValueOpcode::MakeImageAddress) {
|
||||
failed = true;
|
||||
error = "typed image address was not constructed by MakeImageAddress";
|
||||
return nullptr;
|
||||
Fail("typed image address was not constructed by MakeImageAddress");
|
||||
}
|
||||
return inst;
|
||||
}
|
||||
@@ -498,12 +464,20 @@ uint32_t ValueEmitContext::Label(const IR::Block* block) const {
|
||||
return labels.at(block);
|
||||
}
|
||||
|
||||
void ValueEmitContext::Fail(const IR::Inst& inst, const char* reason) {
|
||||
failed = true;
|
||||
error = fmt::format("typed opcode {} {}", IR::ValueOpcodeName(inst.GetOpcode()), reason);
|
||||
[[noreturn]] void ValueEmitContext::Fail(const char* reason) const {
|
||||
EXIT("SPIR-V emission failed: hash=0x%016" PRIx64 " stage=%u reason=%s\n",
|
||||
program.shader_hash, static_cast<unsigned>(program.stage), reason);
|
||||
std::abort();
|
||||
}
|
||||
|
||||
bool EmitProgram(EmitterState& state, const IR::Program& program, std::string* error) {
|
||||
[[noreturn]] void ValueEmitContext::Fail(const IR::Inst& inst, const char* reason) const {
|
||||
EXIT("SPIR-V emission failed: hash=0x%016" PRIx64 " stage=%u opcode=%s reason=%s\n",
|
||||
program.shader_hash, static_cast<unsigned>(program.stage),
|
||||
IR::ValueOpcodeName(inst.GetOpcode()), reason);
|
||||
std::abort();
|
||||
}
|
||||
|
||||
void EmitProgram(EmitterState& state, const IR::Program& program) {
|
||||
ValueEmitContext ctx(state, program);
|
||||
std::optional<DispatcherFunctionState> dispatcher;
|
||||
if (state.stage == ShaderType::Pixel && state.requirements.pixel_valid_mask) {
|
||||
@@ -562,10 +536,6 @@ bool EmitProgram(EmitterState& state, const IR::Program& program, std::string* e
|
||||
dispatch.merge_label = state.builder.AllocateId();
|
||||
ctx.dispatcher_spills = &dispatch.spills;
|
||||
}
|
||||
if (ctx.failed) {
|
||||
SetError(error, ctx.error.c_str());
|
||||
return false;
|
||||
}
|
||||
DefineGetBdaPointer(state);
|
||||
for (const auto* block: program.blocks) {
|
||||
if (std::ranges::any_of(*block, [](const IR::Inst& inst) {
|
||||
@@ -630,11 +600,6 @@ bool EmitProgram(EmitterState& state, const IR::Program& program, std::string* e
|
||||
EmitStructuredFunction(ctx);
|
||||
}
|
||||
state.builder.AddFunction({OpFunctionEnd});
|
||||
if (ctx.failed) {
|
||||
SetError(error, ctx.error.c_str());
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
} // namespace Libs::Graphics::ShaderRecompiler::Spirv::Emitter
|
||||
|
||||
Reference in New Issue
Block a user