mirror of
https://github.com/KytyPS5/KytyPS5.git
synced 2026-10-20 10:56:58 +02:00
graphics: implement RDNA2 buffer atomic swap x2
This commit is contained in:
@@ -189,7 +189,8 @@ void AnalyzeProgramRequirements(IR::Program& program) {
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const auto MarkBallot = [&] { requirements.subgroup_ballot = true; };
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for (const auto* block: program.blocks) {
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for (const auto& inst: *block) {
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if (inst.GetOpcode() == IR::ValueOpcode::BufferAtomicOr64) {
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if (IR::BufferAccessOf(inst.GetOpcode()) == IR::BufferAccess::Atomic &&
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inst.GetType() == IR::Type::U64) {
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requirements.buffer_int64_atomics = true;
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}
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const auto address_access = IR::AddressOpcodeInfoOf(inst.GetOpcode()).access;
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@@ -617,6 +617,7 @@ void FormattedStore(ValueEmitContext& ctx, const IR::Inst& inst, const IR::Memor
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uint32_t AtomicOpcode(IR::ValueOpcode opcode) {
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switch (opcode) {
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case IR::ValueOpcode::BufferAtomicSwap32:
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case IR::ValueOpcode::BufferAtomicSwap64:
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case IR::ValueOpcode::SharedAtomicSwap32: return OpAtomicExchange;
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case IR::ValueOpcode::BufferAtomicIAdd32:
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case IR::ValueOpcode::SharedAtomicIAdd32: return OpAtomicIAdd;
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@@ -633,6 +634,7 @@ uint32_t AtomicOpcode(IR::ValueOpcode opcode) {
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case IR::ValueOpcode::BufferAtomicAnd32:
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case IR::ValueOpcode::SharedAtomicAnd32: return OpAtomicAnd;
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case IR::ValueOpcode::BufferAtomicOr32:
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case IR::ValueOpcode::BufferAtomicOr64:
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case IR::ValueOpcode::SharedAtomicOr32: return OpAtomicOr;
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case IR::ValueOpcode::BufferAtomicXor32:
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case IR::ValueOpcode::SharedAtomicXor32: return OpAtomicXor;
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@@ -672,8 +674,8 @@ uint32_t EmitAtomic(ValueEmitContext& ctx, const IR::Inst& inst, const IR::Memor
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return return_value ? result : ConstantU32(ctx.state, 0);
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}
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uint32_t EmitBufferAtomicOr64(ValueEmitContext& ctx, const IR::Inst& inst,
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const IR::MemoryInfo& mem) {
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uint32_t EmitBufferAtomic64(ValueEmitContext& ctx, const IR::Inst& inst,
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const IR::MemoryInfo& mem) {
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auto& state = ctx.state;
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return EmitValueOrDefaultIfCondition(
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state, ctx.Arg(inst, inst.NumArgs() - 1), TypeU64(state), ConstantU64(state, 0), [&]() {
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@@ -690,7 +692,7 @@ uint32_t EmitBufferAtomicOr64(ValueEmitContext& ctx, const IR::Inst& inst,
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ctx.Arg(inst, inst.NumArgs() - 2));
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const auto old = state.builder.AllocateId();
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state.builder.AddFunction(
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{OpAtomicOr, TypeScalarU64(state), old,
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{AtomicOpcode(inst.GetOpcode()), TypeScalarU64(state), old,
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EmitStorageBufferElementPointer(
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state, resource, index, TypeStorageBufferU64ElementPointer(state)),
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ConstantU32(state, ScopeDevice),
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@@ -1209,12 +1211,12 @@ bool EmitValueMemory(ValueEmitContext& ctx, const IR::Inst& inst) {
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return true;
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}
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const auto atomic_opcode = AtomicOpcode(op);
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if (atomic_opcode != 0) {
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ctx.Define(inst, EmitAtomic(ctx, inst, ctx.Memory(inst), true));
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if (atomic_opcode != 0 && inst.GetType() == IR::Type::U64) {
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ctx.Define(inst, EmitBufferAtomic64(ctx, inst, ctx.Memory(inst)));
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return true;
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}
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if (op == IR::ValueOpcode::BufferAtomicOr64) {
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ctx.Define(inst, EmitBufferAtomicOr64(ctx, inst, ctx.Memory(inst)));
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if (atomic_opcode != 0) {
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ctx.Define(inst, EmitAtomic(ctx, inst, ctx.Memory(inst), true));
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return true;
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}
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if (op == IR::ValueOpcode::BufferAtomicFMin32 || op == IR::ValueOpcode::BufferAtomicFMax32) {
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@@ -58,6 +58,7 @@ constexpr MemoryOpcodeInfo MUBUF_OPCODE_LIST[] = {
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{0x3bu, Opcode::BUFFER_ATOMIC_XOR, 1, 32},
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{0x3fu, Opcode::BUFFER_ATOMIC_FMIN, 1, 32},
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{0x40u, Opcode::BUFFER_ATOMIC_FMAX, 1, 32},
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{0x50u, Opcode::BUFFER_ATOMIC_SWAP_X2, 2, 32},
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{0x5au, Opcode::BUFFER_ATOMIC_OR_X2, 2, 32},
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};
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@@ -592,6 +592,7 @@ std::string InstructionToString(const Instruction& inst) {
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case Opcode::TBUFFER_STORE_FORMAT_XYZ:
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case Opcode::TBUFFER_STORE_FORMAT_XYZW:
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case Opcode::BUFFER_ATOMIC_SWAP:
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case Opcode::BUFFER_ATOMIC_SWAP_X2:
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case Opcode::BUFFER_ATOMIC_ADD:
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case Opcode::BUFFER_ATOMIC_SUB:
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case Opcode::BUFFER_ATOMIC_SMIN:
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@@ -455,6 +455,7 @@ enum class Opcode {
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TBUFFER_STORE_FORMAT_XYZ,
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TBUFFER_STORE_FORMAT_XYZW,
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BUFFER_ATOMIC_SWAP,
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BUFFER_ATOMIC_SWAP_X2,
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BUFFER_ATOMIC_ADD,
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BUFFER_ATOMIC_SUB,
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BUFFER_ATOMIC_SMIN,
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@@ -922,6 +922,8 @@ bool Translator::EmitMemory(const Decoder::Instruction& inst) {
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case Decoder::Opcode::BUFFER_ATOMIC_SWAP:
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return BUFFER_ATOMIC(inst, IR::ValueOpcode::BufferAtomicSwap32);
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case Decoder::Opcode::BUFFER_ATOMIC_SWAP_X2:
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return BUFFER_ATOMIC(inst, IR::ValueOpcode::BufferAtomicSwap64);
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case Decoder::Opcode::BUFFER_ATOMIC_ADD:
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return BUFFER_ATOMIC(inst, IR::ValueOpcode::BufferAtomicIAdd32);
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case Decoder::Opcode::BUFFER_ATOMIC_SUB:
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@@ -111,6 +111,7 @@ BufferAccess BufferAccessOf(ValueOpcode opcode) {
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case ValueOpcode::StoreBufferU32x3:
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case ValueOpcode::StoreBufferU32x4: return BufferAccess::Write;
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case ValueOpcode::BufferAtomicSwap32:
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case ValueOpcode::BufferAtomicSwap64:
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case ValueOpcode::BufferAtomicIAdd32:
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case ValueOpcode::BufferAtomicISub32:
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case ValueOpcode::BufferAtomicSMin32:
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@@ -129,6 +130,7 @@ BufferAccess BufferAccessOf(ValueOpcode opcode) {
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uint32_t BufferComponentCount(ValueOpcode opcode) {
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switch (opcode) {
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case ValueOpcode::BufferAtomicSwap64:
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case ValueOpcode::BufferAtomicOr64:
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case ValueOpcode::LoadBufferU32x2:
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case ValueOpcode::StoreBufferU32x2: return 2u;
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@@ -222,6 +222,7 @@ VALUE_OPCODE(StoreBufferU32x2, Void, BufferResource, U32, U32, U32, U32x2, U1)
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VALUE_OPCODE(StoreBufferU32x3, Void, BufferResource, U32, U32, U32, U32x3, U1)
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VALUE_OPCODE(StoreBufferU32x4, Void, BufferResource, U32, U32, U32, U32x4, U1)
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VALUE_OPCODE(BufferAtomicSwap32, U32, BufferResource, U32, U32, U32, U32, U1)
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VALUE_OPCODE(BufferAtomicSwap64, U64, BufferResource, U32, U32, U32, U64, U1)
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VALUE_OPCODE(BufferAtomicIAdd32, U32, BufferResource, U32, U32, U32, U32, U1)
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VALUE_OPCODE(BufferAtomicISub32, U32, BufferResource, U32, U32, U32, U32, U1)
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VALUE_OPCODE(BufferAtomicSMin32, U32, BufferResource, U32, U32, U32, U32, U1)
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