mirror of
https://github.com/KytyPS5/KytyPS5.git
synced 2026-10-20 19:07:01 +02:00
shader_recompiler: add SSA
This commit is contained in:
nmzik
@@ -0,0 +1,396 @@
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#include "graphics/shader/recompiler/backend/spirv/SpirvEmitter.h"
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#include "graphics/shader/recompiler/backend/spirv/spirvEmitterInternal.h"
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#include "graphics/shader/recompiler/ir/ValueProgram.h"
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#include <algorithm>
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#include <array>
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#include <cinttypes>
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#include <cstdio>
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namespace Libs::Graphics::ShaderRecompiler::Spirv {
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namespace {
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bool Fail(std::string* error, const std::string& message) {
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if (error != nullptr) {
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*error = message;
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}
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return false;
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}
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bool ImageBinding(const IR::ImageResource& image, IR::DescriptorBindingKind& kind) {
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using Kind = IR::DescriptorBindingKind;
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using Dim = Decoder::ImageDimension;
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if (image.kind == IR::ResourceKind::Image || image.kind == IR::ResourceKind::ImageUint) {
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const bool integer = image.kind == IR::ResourceKind::ImageUint;
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switch (image.dimension) {
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case Dim::Dim1D: kind = integer ? Kind::SampledUint1D : Kind::Sampled1D; return true;
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case Dim::Dim1DArray:
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kind = integer ? Kind::SampledUint1DArray : Kind::Sampled1DArray;
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return true;
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case Dim::Dim2D: kind = integer ? Kind::SampledUint2D : Kind::Sampled2D; return true;
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case Dim::Dim2DMsaa:
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kind = integer ? Kind::SampledUint2DMsaa : Kind::Sampled2DMsaa;
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return true;
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case Dim::Dim3D: kind = integer ? Kind::SampledUint3D : Kind::Sampled3D; return true;
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case Dim::Dim2DArray:
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kind = integer ? Kind::SampledUint2DArray : Kind::Sampled2DArray;
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return true;
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case Dim::Dim2DMsaaArray:
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kind = integer ? Kind::SampledUint2DMsaaArray : Kind::Sampled2DMsaaArray;
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return true;
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case Dim::Unknown: return false;
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}
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}
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const bool uint_image = image.kind == IR::ResourceKind::StorageImageUint;
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if (image.kind != IR::ResourceKind::StorageImage && !uint_image) {
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return false;
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}
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switch (image.dimension) {
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case Dim::Dim1D: kind = uint_image ? Kind::StorageUint1D : Kind::Storage1D; return true;
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case Dim::Dim1DArray:
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kind = uint_image ? Kind::StorageUint1DArray : Kind::Storage1DArray;
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return true;
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case Dim::Dim2D: kind = uint_image ? Kind::StorageUint2D : Kind::Storage2D; return true;
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case Dim::Dim3D: kind = uint_image ? Kind::StorageUint3D : Kind::Storage3D; return true;
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case Dim::Dim2DArray:
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kind = uint_image ? Kind::StorageUint2DArray : Kind::Storage2DArray;
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return true;
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case Dim::Dim2DMsaa:
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case Dim::Dim2DMsaaArray: return false;
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case Dim::Unknown: return false;
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}
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return false;
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}
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bool ValidateNativeProgram(const IR::Program& program, std::string* error) {
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using Kind = IR::DescriptorBindingKind;
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constexpr auto KindCount = static_cast<size_t>(Kind::Count);
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std::array<std::vector<uint32_t>, KindCount> expected;
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std::array<bool, KindCount> present {};
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const auto Dense = [](size_t size) {
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std::vector<uint32_t> values(size);
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for (uint32_t i = 0; i < values.size(); i++) {
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values[i] = i;
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}
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return values;
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};
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auto Expect = [&](Kind kind, std::vector<uint32_t> resources = {}) {
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const auto index = static_cast<size_t>(kind);
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present[index] = true;
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expected[index] = std::move(resources);
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};
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if (!program.info.buffers.empty()) {
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Expect(Kind::Buffers, Dense(program.info.buffers.size()));
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}
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for (uint32_t i = 0; i < program.info.images.size(); i++) {
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Kind kind;
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if (!ImageBinding(program.info.images[i], kind)) {
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return Fail(error, "native shader plan has an invalid image class");
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}
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present[static_cast<size_t>(kind)] = true;
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expected[static_cast<size_t>(kind)].push_back(i);
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}
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if (!program.info.samplers.empty()) {
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Expect(Kind::Samplers, Dense(program.info.samplers.size()));
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}
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const auto uses_gds = program.values != nullptr &&
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std::ranges::any_of(program.values->blocks, [](const IR::Block* block) {
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return std::ranges::any_of(*block, [](const IR::Inst& inst) {
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return inst.GetOpcode() == IR::ValueOpcode::GetGdsResource;
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});
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});
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if (uses_gds) {
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Expect(Kind::Gds);
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}
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if (!program.info.addresses.empty()) {
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Expect(Kind::AddressMemory, Dense(program.info.addresses.size()));
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}
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if (program.values != nullptr && !program.values->srt_reads.empty()) {
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Expect(Kind::FlattenedSrt);
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}
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if (program.bindings.ShaderDataDwords() != 0 && program.bindings.push_constant_size == 0) {
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Expect(Kind::UserData);
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}
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std::array<bool, KindCount> seen {};
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for (uint32_t i = 0; i < program.bindings.descriptors.size(); i++) {
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const auto& binding = program.bindings.descriptors[i];
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const auto kind = static_cast<size_t>(binding.kind);
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if (kind >= KindCount || seen[kind] || !present[kind] ||
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binding.resources != expected[kind]) {
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return Fail(error, "native descriptor groups do not match shader topology");
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}
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for (uint32_t j = 0; j < i; j++) {
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if (program.bindings.descriptors[j].binding == binding.binding) {
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return Fail(error, "native descriptor binding numbers are not unique");
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}
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}
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seen[kind] = true;
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}
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for (size_t i = 0; i < KindCount; i++) {
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if (present[i] != seen[i]) {
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return Fail(error, "native shader plan is missing a required descriptor group");
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}
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}
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const auto has_user_storage = present[static_cast<size_t>(Kind::UserData)];
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if (program.bindings.buffer_offset_dword != program.bindings.user_data_registers.size() ||
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program.bindings.buffer_offset_count != program.info.buffers.size() ||
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(!has_user_storage &&
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program.bindings.push_constant_size != program.bindings.ShaderDataDwords() * 4u) ||
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(has_user_storage && program.bindings.push_constant_size != 0) ||
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!std::is_sorted(program.bindings.user_data_registers.begin(),
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program.bindings.user_data_registers.end()) ||
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std::adjacent_find(program.bindings.user_data_registers.begin(),
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program.bindings.user_data_registers.end()) !=
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program.bindings.user_data_registers.end()) {
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return Fail(error, "native user-data layout is inconsistent");
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}
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if (program.values == nullptr) {
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return Fail(error, "native shader plan has no typed SSA");
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}
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const auto planning_only_handle = [&](const IR::Inst& handle) {
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return !handle.Uses().empty() &&
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std::ranges::all_of(handle.Uses(), [&](const IR::Use& use) {
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const auto op = use.user->GetOpcode();
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if (op != IR::ValueOpcode::LoadAddressU32 &&
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op != IR::ValueOpcode::ReadConstBuffer) {
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return false;
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}
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const auto index = use.user->Flags<IR::MemoryFlags>().index;
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return index < program.values->memory_info.size() &&
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program.values->memory_info[index].planning_only;
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});
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};
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for (const auto* block: program.values->blocks) {
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for (const auto& inst: *block) {
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const auto dense = inst.Flags<uint32_t>();
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switch (inst.GetOpcode()) {
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case IR::ValueOpcode::GetBufferResource:
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if (planning_only_handle(inst)) {
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break;
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}
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if (dense >= program.info.buffers.size()) {
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return Fail(error, "typed buffer handle has an invalid dense resource");
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}
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break;
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case IR::ValueOpcode::GetAddressResource:
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if (planning_only_handle(inst)) {
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break;
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}
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if (dense >= program.info.addresses.size()) {
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return Fail(error, "typed address handle has an invalid dense resource");
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}
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break;
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case IR::ValueOpcode::GetImageResource:
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if (dense >= program.info.images.size()) {
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return Fail(error, "typed image handle has an invalid dense resource");
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}
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break;
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case IR::ValueOpcode::GetSamplerResource:
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if (dense >= program.info.samplers.size()) {
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return Fail(error, "typed sampler handle has an invalid dense resource");
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}
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break;
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case IR::ValueOpcode::ReadConst: {
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const auto slot = inst.Arg(1).Resolve();
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if (!slot.IsImmediate() || slot.GetType() != IR::Type::U32 ||
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slot.U32() >= program.values->srt_reads.size()) {
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return Fail(error, "flattened SRT read has an invalid dense slot");
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}
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break;
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}
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default: break;
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}
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}
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}
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return true;
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}
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} // namespace
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static constexpr size_t InitialEmitterVectorReserve = 4096;
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static void ReportReserveExceeded(const IR::Program& program, const char* vector_name,
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size_t size) {
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if (size <= InitialEmitterVectorReserve) {
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return;
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}
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std::printf("SPIR-V emitter reserve exceeded: hash=0x%016" PRIx64
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" stage=%u vector=%s size=%zu reserve=%zu\n",
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program.shader_hash, static_cast<unsigned>(program.stage), vector_name, size,
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InitialEmitterVectorReserve);
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}
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void CollectValueRegisterMirrors(const IR::ValueProgram& program,
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std::vector<Emitter::RegisterBinding>& registers) {
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for (const auto* block: program.blocks) {
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for (const auto& inst: *block) {
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switch (inst.GetOpcode()) {
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case IR::ValueOpcode::SetScalarRegister:
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case IR::ValueOpcode::SetThreadBitScalarRegister:
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if (block != program.blocks.front()) {
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Emitter::CollectRegister(
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registers,
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{IR::RegisterFile::Scalar, IR::RegIndex(inst.Arg(0).ScalarRegister())});
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}
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break;
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case IR::ValueOpcode::SetVectorRegister:
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Emitter::CollectRegister(
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registers,
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{IR::RegisterFile::Vector, IR::RegIndex(inst.Arg(0).VectorRegister())});
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break;
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case IR::ValueOpcode::SetM0:
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if (block != program.blocks.front()) {
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Emitter::CollectRegister(registers, {IR::RegisterFile::M0, 0});
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}
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break;
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case IR::ValueOpcode::SetExecLo:
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case IR::ValueOpcode::SetExecHi:
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if (block != program.blocks.front()) {
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Emitter::CollectRegister(
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registers, {IR::RegisterFile::Exec,
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inst.GetOpcode() == IR::ValueOpcode::SetExecLo ? 0u : 1u});
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}
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break;
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case IR::ValueOpcode::SetVccLo:
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case IR::ValueOpcode::SetVccHi:
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if (block != program.blocks.front()) {
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Emitter::CollectRegister(
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registers, {IR::RegisterFile::Vcc,
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inst.GetOpcode() == IR::ValueOpcode::SetVccLo ? 0u : 1u});
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}
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break;
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default: break;
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}
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}
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}
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}
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bool ValueProgramHasOpcode(const IR::ValueProgram& program, IR::ValueOpcode opcode) {
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return std::ranges::any_of(program.blocks, [opcode](const IR::Block* block) {
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return std::ranges::any_of(
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*block, [opcode](const IR::Inst& inst) { return inst.GetOpcode() == opcode; });
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});
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}
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bool ProgramRequiresExactSubgroupSize(const IR::Program& program) {
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if (program.values == nullptr) {
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return false;
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}
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for (const auto* block: program.values->blocks) {
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for (const auto& inst: *block) {
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switch (inst.GetOpcode()) {
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case IR::ValueOpcode::Ballot:
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case IR::ValueOpcode::DppMoveU32:
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case IR::ValueOpcode::DppUpdateU32:
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case IR::ValueOpcode::WqmMask:
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case IR::ValueOpcode::ReadFirstLane:
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case IR::ValueOpcode::ReadLane:
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case IR::ValueOpcode::WriteLane:
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case IR::ValueOpcode::Permlane16U32:
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case IR::ValueOpcode::SwizzleU32:
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case IR::ValueOpcode::DataAppend:
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case IR::ValueOpcode::DataConsume:
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case IR::ValueOpcode::GdsDataAppend:
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case IR::ValueOpcode::GdsDataConsume: return true;
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default: break;
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}
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}
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}
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return false;
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}
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bool EmitProgram(const IR::Program& program, const IR::ResourceSnapshot& resources,
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const ShaderVertexInputInfo* vertex_input_info,
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const ShaderPixelInputInfo* pixel_input_info,
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const ShaderComputeInputInfo* compute_input_info, std::vector<uint32_t>& spirv,
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std::string* error, bool preserve_debug_values) {
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using namespace Emitter;
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if (program.stage != ShaderType::Compute && program.stage != ShaderType::Vertex &&
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program.stage != ShaderType::Pixel) {
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SetError(error, "binary SPIR-V emitter supports compute, vertex, and pixel shaders");
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return false;
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}
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if (!program.srt_plan_complete || !program.resource_tracking_complete ||
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!program.shader_info_complete || !program.binding_layout_complete) {
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SetError(error, "SPIR-V emitter requires a fully planned native shader program");
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return false;
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}
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if (!IR::ValidateResourceSnapshot(program, resources, error)) {
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return false;
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}
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if (!IR::ValidateResourceSpecialization(program, resources, error)) {
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return false;
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}
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if (!ValidateNativeProgram(program, error)) {
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return false;
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}
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if (program.values == nullptr) {
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SetError(error, "SPIR-V emitter requires planned typed SSA");
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return false;
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}
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ShaderVertexInputInfo default_vertex {};
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ShaderPixelInputInfo default_pixel {};
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ShaderComputeInputInfo default_compute {};
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const auto* vertex = vertex_input_info != nullptr ? vertex_input_info : &default_vertex;
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const auto* pixel = pixel_input_info != nullptr ? pixel_input_info : &default_pixel;
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const auto* compute = compute_input_info != nullptr ? compute_input_info : &default_compute;
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(void)preserve_debug_values;
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const auto& value_program = *program.values;
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if (!IR::ValidateValueProgram(value_program, true, error)) {
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return false;
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}
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EmitterState state(program, resources);
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state.vertex_input_info = vertex;
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state.pixel_input_info = pixel;
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state.compute_input_info = compute;
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state.stage = program.stage;
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state.wave_size = program.wave_size;
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state.per_invocation_masks = program.lane_mask_mode == ShaderLaneMaskMode::PerInvocation;
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state.exact_subgroup_operations =
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!state.per_invocation_masks && ProgramRequiresExactSubgroupSize(program);
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state.registers.reserve(InitialEmitterVectorReserve);
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state.inputs.reserve(InitialEmitterVectorReserve);
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state.outputs.reserve(InitialEmitterVectorReserve);
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state.interface_variables.reserve(InitialEmitterVectorReserve);
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state.reachable_blocks.reserve(InitialEmitterVectorReserve);
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CollectValueRegisterMirrors(value_program, state.registers);
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CopyProgramInputsAndOutputs(state, program);
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state.needs_subgroup_ballot = ProgramNeedsSubgroupBallot(program) ||
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(!state.per_invocation_masks &&
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ValueProgramHasOpcode(value_program, IR::ValueOpcode::Ballot));
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state.needs_subgroup_shuffle = ProgramNeedsSubgroupShuffle(program);
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state.needs_subgroup_local_invocation_id = ProgramNeedsSubgroupLocalInvocationId(program);
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state.needs_compute_derivatives = ProgramNeedsComputeDerivatives(program);
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state.needs_image_gather_extended = ProgramNeedsImageGatherExtended(program);
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state.needs_function_lds = ProgramNeedsFunctionLds(program);
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state.needs_pixel_valid_mask = ProgramNeedsPixelValidMask(program);
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AllocateInputVariables(state);
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AllocateOutputVariables(state);
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AllocateDescriptorVariables(state);
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EmitHeaderAndTypes(state);
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AllocateRegisterVariables(state);
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if (!EmitValueProgram(state, value_program, error)) {
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return false;
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}
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ReportReserveExceeded(program, "registers", state.registers.size());
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ReportReserveExceeded(program, "inputs", state.inputs.size());
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ReportReserveExceeded(program, "outputs", state.outputs.size());
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ReportReserveExceeded(program, "interface_variables", state.interface_variables.size());
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ReportReserveExceeded(program, "reachable_blocks", state.reachable_blocks.size());
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auto binary = state.builder.Build();
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if (binary.empty()) {
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SetError(error, "SPIR-V builder returned an empty module");
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return false;
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}
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spirv = std::move(binary);
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return true;
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}
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} // namespace Libs::Graphics::ShaderRecompiler::Spirv
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