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https://github.com/KytyPS5/KytyPS5.git
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shader_recompiler: add SSA
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nmzik
@@ -0,0 +1,158 @@
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#include "graphics/shader/recompiler/frontend/translate/Translator.h"
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namespace Libs::Graphics::ShaderRecompiler::Frontend::Detail {
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IR::F32 Translator::SelectF32(IR::U1 condition, IR::F32 true_value, IR::F32 false_value) {
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return IR::F32(ir.Emit(IR::ValueOpcode::SelectF32, {condition, true_value, false_value}));
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}
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IR::U32 Translator::ConvertF32ToU32Saturated(IR::F32 value, float upper_bound, float safe_upper,
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uint32_t upper_result) {
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const auto zero = IR::F32(IR::Value::F32(0.0f));
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const auto nan = IR::U1(ir.Emit(IR::ValueOpcode::FPIsNan32, {value}));
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const auto low = IR::U1(ir.Emit(IR::ValueOpcode::FPOrdLessThanEqual32, {value, zero}));
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const auto high = IR::U1(
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ir.Emit(IR::ValueOpcode::FPOrdGreaterThanEqual32, {value, IR::Value::F32(upper_bound)}));
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const auto truncated = IR::F32(ir.Emit(IR::ValueOpcode::FPTrunc32, {value}));
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const auto safe_low = SelectF32(ir.LogicalOr(nan, low), zero, truncated);
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const auto safe = SelectF32(high, IR::F32(IR::Value::F32(safe_upper)), safe_low);
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const auto converted = IR::U32(ir.Emit(IR::ValueOpcode::ConvertU32F32, {safe}));
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return ir.Select(high, IR::U32(IR::Value(upper_result)), converted);
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}
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IR::U32 Translator::ConvertF32ToI32Saturated(IR::F32 value, float lower_bound, float upper_bound,
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float safe_upper, uint32_t lower_result,
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uint32_t upper_result) {
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const auto nan = IR::U1(ir.Emit(IR::ValueOpcode::FPIsNan32, {value}));
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const auto low = IR::U1(
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ir.Emit(IR::ValueOpcode::FPOrdLessThanEqual32, {value, IR::Value::F32(lower_bound)}));
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const auto high = IR::U1(
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ir.Emit(IR::ValueOpcode::FPOrdGreaterThanEqual32, {value, IR::Value::F32(upper_bound)}));
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const auto truncated = IR::F32(ir.Emit(IR::ValueOpcode::FPTrunc32, {value}));
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const auto safe_low = SelectF32(low, IR::F32(IR::Value::F32(lower_bound)), truncated);
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const auto safe_high = SelectF32(high, IR::F32(IR::Value::F32(safe_upper)), safe_low);
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const auto safe = SelectF32(nan, IR::F32(IR::Value::F32(0.0f)), safe_high);
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const auto converted = IR::U32(ir.Emit(IR::ValueOpcode::ConvertS32F32, {safe}));
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const auto clamped_high = ir.Select(high, IR::U32(IR::Value(upper_result)), converted);
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const auto clamped = ir.Select(low, IR::U32(IR::Value(lower_result)), clamped_high);
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return ir.Select(nan, IR::U32(IR::Value(0u)), clamped);
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}
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bool Translator::TranslateConversion(const IR::Instruction& inst) {
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const auto f32 = [&](uint32_t index) {
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return IR::F32(ReadOperand(inst.src[index], IR::Type::F32));
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};
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const auto u32 = [&](uint32_t index) { return ReadU32(inst.src[index]); };
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const auto convert_u32 = [&](IR::F32 value) {
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return ConvertF32ToU32Saturated(value, 4294967296.0f, 4294967040.0f, 0xffffffffu);
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};
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const auto convert_i32 = [&](IR::F32 value) {
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return ConvertF32ToI32Saturated(value, -2147483648.0f, 2147483648.0f, 2147483520.0f,
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0x80000000u, 0x7fffffffu);
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};
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switch (inst.op) {
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case IR::Opcode::ConvertByteU32ToF32: {
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const auto index =
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inst.src[1].kind == IR::OperandKind::ImmediateU32 ? inst.src[1].imm & 3u : 0u;
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const auto byte =
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ir.BitwiseAnd(ir.ShiftRightLogical(u32(0), IR::U32(IR::Value(index * 8u))),
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IR::U32(IR::Value(0xffu)));
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WriteOperand(inst.dst, ir.Emit(IR::ValueOpcode::ConvertF32U32, {byte}));
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return true;
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}
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case IR::Opcode::ConvertU32ToF32:
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WriteOperand(inst.dst, ir.Emit(IR::ValueOpcode::ConvertF32U32, {u32(0)}));
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return true;
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case IR::Opcode::ConvertI32ToF32:
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WriteOperand(inst.dst, ir.Emit(IR::ValueOpcode::ConvertF32S32, {u32(0)}));
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return true;
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case IR::Opcode::ConvertF32ToU32: WriteOperand(inst.dst, convert_u32(f32(0))); return true;
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case IR::Opcode::ConvertF32ToI32: WriteOperand(inst.dst, convert_i32(f32(0))); return true;
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case IR::Opcode::ConvertF32ToF16: WriteF16(inst.dst, f32(0)); return true;
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case IR::Opcode::ConvertF16ToF32:
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WriteOperand(inst.dst, ReadF16AsF32(inst.src[0]));
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return true;
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case IR::Opcode::ConvertU16ToF16: {
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const auto value = IR::F32(
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ir.Emit(IR::ValueOpcode::ConvertF32U32, {ReadU16AsU32(inst.src[0], false)}));
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WriteF16(inst.dst, value);
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return true;
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}
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case IR::Opcode::ConvertI16ToF16: {
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const auto value =
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IR::F32(ir.Emit(IR::ValueOpcode::ConvertF32S32, {ReadU16AsU32(inst.src[0], true)}));
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WriteF16(inst.dst, value);
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return true;
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}
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case IR::Opcode::ConvertF16ToU16: {
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const auto converted =
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ConvertF32ToU32Saturated(ReadF16AsF32(inst.src[0]), 65536.0f, 65535.0f, 0xffffu);
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WriteU16(inst.dst, converted);
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return true;
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}
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case IR::Opcode::ConvertF16ToI16: {
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const auto converted = ConvertF32ToI32Saturated(
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ReadF16AsF32(inst.src[0]), -32768.0f, 32768.0f, 32767.0f, 0xffff8000u, 0x7fffu);
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WriteU16(inst.dst, ir.BitwiseAnd(converted, IR::U32(IR::Value(0xffffu))));
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return true;
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}
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case IR::Opcode::ConvertRoundPlusInfF32ToI32: {
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const auto biased =
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IR::F32(ir.Emit(IR::ValueOpcode::FPAdd32, {f32(0), IR::Value::F32(0.5f)}));
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const auto rounded = IR::F32(ir.Emit(IR::ValueOpcode::FPFloor32, {biased}));
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WriteOperand(inst.dst, convert_i32(rounded));
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return true;
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}
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case IR::Opcode::ConvertFloorF32ToI32: {
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const auto rounded = IR::F32(ir.Emit(IR::ValueOpcode::FPFloor32, {f32(0)}));
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WriteOperand(inst.dst, convert_i32(rounded));
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return true;
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}
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case IR::Opcode::ConvertI4ToOffsetF32: {
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const auto nibble = IR::U32(
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ir.Emit(IR::ValueOpcode::BitFieldSExtract, {u32(0), IR::Value(0u), IR::Value(4u)}));
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const auto value = IR::F32(ir.Emit(IR::ValueOpcode::ConvertF32S32, {nibble}));
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WriteOperand(inst.dst,
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ir.Emit(IR::ValueOpcode::FPMul32, {value, IR::Value::F32(1.0f / 16.0f)}));
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return true;
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}
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case IR::Opcode::PackF32ToF16Rtz:
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WriteOperand(inst.dst, ir.Emit(IR::ValueOpcode::PackFloat2x16Rtz, {f32(0), f32(1)}));
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return true;
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case IR::Opcode::PackSnorm2x16F32:
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case IR::Opcode::PackUnorm2x16F32: {
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const auto pair = ir.Emit(IR::ValueOpcode::CompositeConstructF32x2, {f32(0), f32(1)});
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const auto opcode = inst.op == IR::Opcode::PackSnorm2x16F32
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? IR::ValueOpcode::PackSnorm2x16
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: IR::ValueOpcode::PackUnorm2x16;
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WriteOperand(inst.dst, ir.Emit(opcode, {pair}));
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return true;
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}
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case IR::Opcode::PackU8F32: {
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const auto byte = ConvertF32ToU32Saturated(f32(0), 255.0f, 255.0f, 255u);
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const auto index = ir.BitwiseAnd(u32(1), IR::U32(IR::Value(3u)));
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const auto shift = ir.ShiftLeftLogical(index, IR::U32(IR::Value(3u)));
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const auto mask = ir.ShiftLeftLogical(IR::U32(IR::Value(0xffu)), shift);
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const auto base = ir.BitwiseAnd(u32(2), ir.BitwiseNot(mask));
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WriteOperand(inst.dst, ir.BitwiseOr(base, ir.ShiftLeftLogical(byte, shift)));
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return true;
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}
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case IR::Opcode::PackB32F16: {
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const auto low = ReadF16LaneBits(inst.src[0], false);
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const auto high =
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ir.ShiftLeftLogical(ReadF16LaneBits(inst.src[1], false), IR::U32(IR::Value(16u)));
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WriteOperand(inst.dst, ir.BitwiseOr(low, high));
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return true;
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}
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default: return false;
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}
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}
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IR::U32 Translator::PackU16Lanes(IR::U32 low, IR::U32 high) {
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const auto mask = IR::U32(IR::Value(0xffffu));
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return ir.BitwiseOr(ir.BitwiseAnd(low, mask),
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ir.ShiftLeftLogical(ir.BitwiseAnd(high, mask), IR::U32(IR::Value(16u))));
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}
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} // namespace Libs::Graphics::ShaderRecompiler::Frontend::Detail
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