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Fix SPIR-V float control contract (Preserve FP32 Inf and NaN)
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@@ -33,6 +33,7 @@ enum : uint32_t {
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ExecutionModeEarlyFragmentTests = 9,
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ExecutionModeDepthReplacing = 12,
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ExecutionModeLocalSize = 17,
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ExecutionModeSignedZeroInfNanPreserve = 4461,
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ExecutionModeDerivativeGroupQuadsKHR = 5289,
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AddressingModelLogical = 0,
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MemoryModelGLSL450 = 1,
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@@ -46,6 +47,7 @@ enum : uint32_t {
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CapabilityGroupNonUniform = 61,
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CapabilityGroupNonUniformBallot = 64,
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CapabilityGroupNonUniformShuffle = 65,
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CapabilitySignedZeroInfNanPreserve = 4466,
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CapabilityComputeDerivativeGroupQuadsKHR = 5288,
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StorageClassUniformConstant = 0,
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StorageClassInput = 1,
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