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shader: implement RDNA2 V_LSHLREV_B64

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nmzik
2026-08-23 16:39:01 +02:00
parent a8fe4e7a2d
commit bc9c70d50f
5 changed files with 75 additions and 0 deletions
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src/graphics/shader/recompiler/frontend/decode/ShaderDecoder.h
+1
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@@ -299,6 +299,7 @@ enum class Opcode {
V_LSHRREV_B32,
V_ASHR_I32,
V_ASHRREV_I32,
V_LSHLREV_B64,
V_LSHRREV_B64,
V_LSHLREV_B16,
V_LSHRREV_B16,
src/graphics/shader/recompiler/frontend/decode/VectorAluOps.cpp
+2
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@@ -281,6 +281,7 @@ constexpr OpcodeMap VOP3_OPCODE_LIST[] = {
{0x16au, Opcode::V_MUL_HI_U32},
{0x16bu, Opcode::V_MUL_LO_I32},
{0x16cu, Opcode::V_MUL_HI_I32},
{0x2ffu, Opcode::V_LSHLREV_B64},
{0x300u, Opcode::V_LSHRREV_B64},
{0x303u, Opcode::V_ADD_NC_U16},
{0x304u, Opcode::V_SUB_NC_U16},
@@ -1248,6 +1249,7 @@ uint32_t NativeVop3SourceCount(Opcode opcode) {
case Opcode::V_MIN_I16:
case Opcode::V_ADD_NC_I16:
case Opcode::V_SUB_NC_I16:
case Opcode::V_LSHLREV_B64:
case Opcode::V_LSHRREV_B64:
case Opcode::V_LSHLREV_B16:
case Opcode::V_LSHRREV_B16:
src/graphics/shader/recompiler/ir/opcodes/ShaderIROpcodes.cpp
+2
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@@ -250,6 +250,7 @@ constexpr LowerMap LOWER_OPS[] = {
{Decoder::Opcode::V_LSHLREV_B16, Opcode::ShiftLeftLogicalU16},
{Decoder::Opcode::V_LSHR_B32, Opcode::ShiftRightLogicalU32},
{Decoder::Opcode::V_LSHRREV_B32, Opcode::ShiftRightLogicalU32},
{Decoder::Opcode::V_LSHLREV_B64, Opcode::ShiftLeftLogicalU64},
{Decoder::Opcode::V_LSHRREV_B64, Opcode::ShiftRightLogicalU64},
{Decoder::Opcode::V_LSHRREV_B16, Opcode::ShiftRightLogicalU16},
{Decoder::Opcode::V_ASHR_I32, Opcode::ShiftRightArithmeticI32},
@@ -468,6 +469,7 @@ bool IsReversedBinary(Decoder::Opcode opcode) {
case Decoder::Opcode::V_LSHLREV_B32:
case Decoder::Opcode::V_LSHRREV_B32:
case Decoder::Opcode::V_ASHRREV_I32:
case Decoder::Opcode::V_LSHLREV_B64:
case Decoder::Opcode::V_LSHRREV_B64:
case Decoder::Opcode::V_LSHLREV_B16:
case Decoder::Opcode::V_LSHRREV_B16: