diff --git a/src/graphics/host_gpu/renderer/renderCompute.cpp b/src/graphics/host_gpu/renderer/renderCompute.cpp index 69ae2b182..fdd358caa 100644 --- a/src/graphics/host_gpu/renderer/renderCompute.cpp +++ b/src/graphics/host_gpu/renderer/renderCompute.cpp @@ -206,6 +206,17 @@ void RenderExecutor::DispatchDirect(uint64_t submit_id, CommandBuffer& buffer, thread_group_x, thread_group_y, thread_group_z, mode, sh_ctx.GetCs().cs_regs.data_addr); + if (thread_group_x == 0 || thread_group_y == 0 || thread_group_z == 0) { + static std::atomic log_count {0}; + if (log_count.fetch_add(1, std::memory_order_relaxed) < 32) { + LOGF("GraphicsRenderDispatchDirect: skipping zero-sized dispatch groups=%ux%ux%u " + "mode=0x%08" PRIx32 " shader=0x%016" PRIx64 "\n", + thread_group_x, thread_group_y, thread_group_z, mode, + sh_ctx.GetCs().cs_regs.data_addr); + } + return; + } + Common::LockGuard lock(m_context.GetMutex()); if (sh_ctx.GetCs().cs_regs.data_addr == 0) { LOGF("GraphicsRenderDispatchDirect: temporary: ignoring dispatch with null CS shader, " @@ -347,17 +358,6 @@ void RenderExecutor::DispatchDirect(uint64_t submit_id, CommandBuffer& buffer, } } - if (thread_group_x == 0 || thread_group_y == 0 || thread_group_z == 0) { - static std::atomic log_count {0}; - if (log_count.fetch_add(1, std::memory_order_relaxed) < 32) { - LOGF("GraphicsRenderDispatchDirect: skipping zero-sized dispatch groups=%ux%ux%u " - "mode=0x%08" PRIx32 " shader=0x%016" PRIx64 "\n", - thread_group_x, thread_group_y, thread_group_z, mode, - sh_ctx.GetCs().cs_regs.data_addr); - } - return; - } - buffer.EndRendering(); auto& pipeline = m_context.GetPipelineCache().GetComputePipeline(input_info, compute_program); diff --git a/tests/ShaderRecompilerComputeTests.cpp b/tests/ShaderRecompilerComputeTests.cpp index e6813a3a2..e17954da0 100644 --- a/tests/ShaderRecompilerComputeTests.cpp +++ b/tests/ShaderRecompilerComputeTests.cpp @@ -4476,6 +4476,17 @@ public: TextureCacheTestAccess::RegisterHtileMeta(texture_cache, read_only_meta); TextureCacheTestAccess::RegisterHtileMeta(texture_cache, read_write_meta); TextureCacheTestAccess::RegisterHtileMeta(texture_cache, write_only_meta); + + // An empty dispatch must not inspect even an unreadable shader address. + shaders.SetCsShader({.data_addr = 1}); + constexpr std::array, 3> empty_dispatches{{ + {0, 1, 1}, {1, 0, 1}, {1, 1, 0}}}; + for (const auto mode : {0x41u, 0x61u}) { + for (const auto &groups : empty_dispatches) { + context.GetRenderExecutor().DispatchDirect( + 0, scheduler.Current(), groups[0], groups[1], groups[2], mode); + } + } Require(name, "HTile fixture", texture_cache.IsMeta(read_only_meta) && texture_cache.IsMeta(read_write_meta) &&