From cd4eab9d6569f281e65e2bebd6fc1815258f0126 Mon Sep 17 00:00:00 2001 From: Almo7aya <17254073+Almo7aya@users.noreply.github.com> Date: Mon, 19 Oct 2026 13:53:18 +0200 Subject: [PATCH] gpu: clamp resolved buffer ranges to storage buffer limits --- .../host_gpu/renderer/pipeline/descriptors.cpp | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/src/graphics/host_gpu/renderer/pipeline/descriptors.cpp b/src/graphics/host_gpu/renderer/pipeline/descriptors.cpp index 9b73e1ce1..5c50f737a 100644 --- a/src/graphics/host_gpu/renderer/pipeline/descriptors.cpp +++ b/src/graphics/host_gpu/renderer/pipeline/descriptors.cpp @@ -763,12 +763,13 @@ void RenderExecutor::FindBuffers(std::span stages) { } } } - } else { - const auto& graphics = m_context.GetGraphics(); - const auto limit = uint64_t {graphics.GetPhysicalDeviceProperties().limits.maxStorageBufferRange} - - (graphics.StorageMinAlignment() - 1); - size = std::min({size, uint64_t {256} * 1024 * 1024, limit}); } + // PPSA15246 + const auto& graphics = m_context.GetGraphics(); + const auto limit = + uint64_t {graphics.GetPhysicalDeviceProperties().limits.maxStorageBufferRange} - + (graphics.StorageMinAlignment() - 1); + size = std::min({size, uint64_t {256} * 1024 * 1024, limit}); } // Finite GPU descriptors can span sparse PRT holes; clamp only oversized/sentinel ranges. if (size >= (uint64_t {1} << 30u) || descriptor.NumRecords() == UINT32_MAX) {