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renderer: reduce synchronization and allocation overhead
Performance changes from #1495: - Sync changed BDA ranges instead of scanning all mappings. - Let VMA suballocate BDA buffers. - Remove the renderer lock from presentation. - Keep compatible pipeline caches across builds. - Fold masked shifts that always produce zero.
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@@ -608,13 +608,23 @@ void FoldInstruction(Block& block, Block::iterator instruction,
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ReplaceBinaryIdentity(inst, Type::U32, UINT32_MAX)) return;
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for (uint32_t arm = 0; arm < 2u; ++arm) {
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const auto mask = Arg(inst, arm);
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if (!IsImmediate(mask, Type::U32)) continue;
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if (mask.U32() == 0u) {
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Replace(inst, Value(0u));
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return;
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}
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const auto* shifted = Arg(inst, arm ^ 1u).TryInstruction();
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if (!IsImmediate(mask, Type::U32) || shifted == nullptr ||
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shifted->GetOpcode() != ValueOpcode::ShiftLeftLogical32 || !HasOneUse(*shifted)) continue;
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if (shifted == nullptr || shifted->GetOpcode() != ValueOpcode::ShiftLeftLogical32) continue;
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const auto shift = Arg(*shifted, 1);
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if (!IsImmediate(shift, Type::U32) || shift.U32() >= 32u) continue;
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if (!IsImmediate(shift, Type::U32)) continue;
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const auto shifted_mask = mask.U32() >> (shift.U32() & 31u);
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if (shifted_mask == 0u) {
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Replace(inst, Value(0u));
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return;
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}
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if (!HasOneUse(*shifted) || shift.U32() >= 32u) continue;
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const auto masked = worklist.Prepend(block, instruction, ValueOpcode::BitwiseAnd32,
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{Arg(*shifted, 0), Value(mask.U32() >> shift.U32())});
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{Arg(*shifted, 0), Value(shifted_mask)});
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Replace(inst, Value(&*worklist.Prepend(block, instruction, ValueOpcode::ShiftLeftLogical32,
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{Value(&*masked), shift})));
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return;
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