raphiaura/KytyPS5
1
0
Fork 0
mirror of https://github.com/KytyPS5/KytyPS5.git synced 2026-10-20 10:56:58 +02:00
Code Issues Packages Projects Releases Wiki Activity

graphics: support signed 16-bit integer packing

Browse Source
This commit is contained in:
nmzik
2026-08-16 10:23:49 +02:00
parent 2bb396f58f
commit d7f1bcaa19
5 changed files with 44 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/graphics/shader/recompiler/frontend/decode/ShaderDecoder.cpp
+1
View File
@@ -664,6 +664,7 @@ std::string OpcodeToString(Opcode opcode) {
case Opcode::VCvtPknormI16F32: return "v_cvt_pknorm_i16_f32";
case Opcode::VCvtPknormU16F32: return "v_cvt_pknorm_u16_f32";
case Opcode::VCvtPkU16U32: return "v_cvt_pk_u16_u32";
case Opcode::VCvtPkI16I32: return "v_cvt_pk_i16_i32";
case Opcode::VPkMadI16: return "v_pk_mad_i16";
case Opcode::VPkMulLoU16: return "v_pk_mul_lo_u16";
case Opcode::VPkAddI16: return "v_pk_add_i16";
src/graphics/shader/recompiler/frontend/decode/ShaderDecoder.h
+1
View File
@@ -249,6 +249,7 @@ enum class Opcode {
VCvtPknormI16F32,
VCvtPknormU16F32,
VCvtPkU16U32,
VCvtPkI16I32,
VPkMadI16,
VPkMulLoU16,
VPkAddI16,
src/graphics/shader/recompiler/frontend/decode/VectorAluOps.cpp
+7 -6
View File
@@ -272,11 +272,11 @@ constexpr OpcodeMap VOP3_OPCODE_LIST[] = {
{0x363u, Opcode::VBfmB32}, {0x364u, Opcode::VBcntU32B32},
{0x365u, Opcode::VMbcntLoU32B32}, {0x366u, Opcode::VMbcntHiU32B32},
{0x368u, Opcode::VCvtPknormI16F32}, {0x369u, Opcode::VCvtPknormU16F32},
{0x36au, Opcode::VCvtPkU16U32}, {0x36fu, Opcode::VLshlOrB32},
{0x371u, Opcode::VAndOrB32}, {0x372u, Opcode::VOr3B32},
{0x377u, Opcode::VPermlane16B32}, {0x378u, Opcode::VPermlanex16B32},
{0x34bu, Opcode::VFmaF16}, {0x36du, Opcode::VAdd3U32},
{0x14fu, Opcode::VAlignbyteB32},
{0x36au, Opcode::VCvtPkU16U32}, {0x36bu, Opcode::VCvtPkI16I32},
{0x36fu, Opcode::VLshlOrB32}, {0x371u, Opcode::VAndOrB32},
{0x372u, Opcode::VOr3B32}, {0x377u, Opcode::VPermlane16B32},
{0x378u, Opcode::VPermlanex16B32}, {0x34bu, Opcode::VFmaF16},
{0x36du, Opcode::VAdd3U32}, {0x14fu, Opcode::VAlignbyteB32},
};
constexpr auto VOP3_OPS = Detail::MakeOpcodeTable<0x400>(VOP3_OPCODE_LIST);
@@ -1208,7 +1208,8 @@ uint32_t NativeVop3SourceCount(Opcode opcode) {
case Opcode::VBcntU32B32:
case Opcode::VCvtPknormI16F32:
case Opcode::VCvtPknormU16F32:
case Opcode::VCvtPkU16U32: return 2;
case Opcode::VCvtPkU16U32:
case Opcode::VCvtPkI16I32: return 2;
default: return 3;
}
}
src/graphics/shader/recompiler/ir/opcodes/ShaderIROpcodes.cpp
+1
View File
@@ -201,6 +201,7 @@ constexpr LowerMap LOWER_OPS[] = {
{Decoder::Opcode::VCvtPknormI16F32, Opcode::PackSnorm2x16F32},
{Decoder::Opcode::VCvtPknormU16F32, Opcode::PackUnorm2x16F32},
{Decoder::Opcode::VCvtPkU16U32, Opcode::PackU16U32},
{Decoder::Opcode::VCvtPkI16I32, Opcode::PackU16U32},
{Decoder::Opcode::VCvtPkU8F32, Opcode::PackU8F32},
{Decoder::Opcode::VPackB32F16, Opcode::PackB32F16},
{Decoder::Opcode::VPkMadI16, Opcode::PackedMadI16},