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shader: implement BUFFER_ATOMIC_FMIN, unhandled IR opcode now fails
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@@ -84,6 +84,7 @@ bool InstructionMaySplitSpirvBlock(const IR::Instruction& inst) {
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case IR::Opcode::AtomicAndU32:
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case IR::Opcode::AtomicOrU32:
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case IR::Opcode::AtomicXorU32:
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case IR::Opcode::AtomicFMinF32:
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case IR::Opcode::FlatLoadUbyte:
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case IR::Opcode::FlatLoadSbyte:
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case IR::Opcode::FlatLoadUshort:
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