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https://github.com/KytyPS5/KytyPS5.git
synced 2026-10-20 19:07:01 +02:00
shader: implement DS_INC_RTN_U32 and DS_DEC_RTN_U32
This commit is contained in:
nmzik
@@ -86,6 +86,7 @@
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#include <span>
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#include <sstream>
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#include <string>
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#include <string_view>
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#include <vector>
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#if KYTY_PLATFORM != KYTY_PLATFORM_WINDOWS
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@@ -14015,6 +14016,8 @@ CoverageClass ClassifyOpcode(ShaderOpcode opcode,
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case Opcode::DS_ADD_RTN_U32:
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case Opcode::DS_SUB_U32:
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case Opcode::DS_SUB_RTN_U32:
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case Opcode::DS_INC_RTN_U32:
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case Opcode::DS_DEC_RTN_U32:
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case Opcode::DS_MIN_I32:
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case Opcode::DS_MIN_RTN_I32:
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case Opcode::DS_MAX_I32:
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@@ -21221,6 +21224,213 @@ TestCase DsAtomicReturnVariants() {
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O::BUFFER_STORE_DWORD, O::S_ENDPGM}};
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}
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TestCase DsBoundedAtomicBoundaries(bool decrement, bool gds) {
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using O = ShaderOpcode;
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constexpr u32 guard = 0x13579bdfu;
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struct Boundary {
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u32 before, limit, incremented, decremented;
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};
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constexpr Boundary boundaries[] = {
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{4, 5, 5, 3},
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{5, 5, 0, 4},
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{6, 5, 0, 5},
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{0, 5, 1, 5},
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{0, 0, 0, 0},
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{1, 0, 0, 0},
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{0xffffffffu, 0xffffffffu, 0, 0xfffffffeu},
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{0xfffffffeu, 0xffffffffu, 0xffffffffu, 0xfffffffdu},
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{0, 0xffffffffu, 1, 0xffffffffu},
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{0x80000000u, 0x7fffffffu, 0, 0x7fffffffu},
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{0x7fffffffu, 0x80000000u, 0x80000000u, 0x7ffffffeu},
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{0xffffffffu, 0x80000000u, 0, 0x80000000u}};
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constexpr u32 count = static_cast<u32>(std::size(boundaries));
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const u32 opcode = decrement ? 0x24u : 0x23u;
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TestCase test;
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test.name =
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decrement
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? (gds ? "DsDecReturnGdsBoundaries" : "DsDecReturnLdsBoundaries")
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: (gds ? "DsIncReturnGdsBoundaries" : "DsIncReturnLdsBoundaries");
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auto &code = test.code;
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AppendVMovU32(&code, 2, 0);
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std::vector<u32> memory(68, guard);
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for (u32 i = 0; i < count; ++i)
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memory[i + 1] = boundaries[i].before;
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if (!gds) {
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for (u32 i = 0; i < memory.size(); ++i) {
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AppendVMovLiteral(&code, 3, memory[i]);
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code.push_back(EncodeDs0(0x0d, i * 4));
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code.push_back(EncodeDs1(0, 3, 2));
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}
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}
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auto StoreResult = [&](u32 vgpr, u32 expected) {
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AppendStoreVgpr(&code, vgpr, static_cast<u32>(test.expected.size()));
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test.expected.push_back(expected);
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};
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for (u32 i = 0; i < count; ++i) {
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AppendVMovU32(&code, 2, i * 4);
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AppendVMovLiteral(&code, 3, boundaries[i].limit);
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// Preserve the captured DATA0/VDST alias and exact increment words in GDS.
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code.push_back(decrement ? EncodeDs0(opcode, 4, gds)
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: (gds ? 0xd88e0004u : 0xd88c0004u));
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code.push_back(0x03000302u);
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StoreResult(3, boundaries[i].before);
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code.push_back(EncodeDs0(0x36, 4, gds));
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code.push_back(EncodeDs1(4, 0, 2));
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StoreResult(4, decrement ? boundaries[i].decremented
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: boundaries[i].incremented);
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}
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// EXEC=0 preserves memory and the aliased destination register.
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AppendVMovU32(&code, 2, 0);
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AppendVMovLiteral(&code, 3, 0x12345678u);
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code.push_back(EncodeSop1(0x04, 10, 126));
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code.push_back(EncodeSop1(0x04, 126, InlineU32(0)));
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code.push_back(EncodeDs0(opcode, 4, gds));
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code.push_back(0x03000302u);
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code.push_back(EncodeSop1(0x04, 126, 10));
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StoreResult(3, 0x12345678u);
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// Use both offset bytes and alias VDST with ADDR instead of DATA0.
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AppendVMovU32(&code, 2, 4);
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AppendVMovLiteral(&code, 3, 0xffffffffu);
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code.push_back(EncodeDs0(opcode, 0x104, gds));
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code.push_back(EncodeDs1(2, 3, 2));
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StoreResult(2, guard);
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// Overwriting an unused return must not let DCE discard the atomic update.
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AppendVMovU32(&code, 2, 0);
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code.push_back(EncodeDs0(opcode, 0x108, gds));
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code.push_back(EncodeDs1(4, 3, 2));
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AppendVMovU32(&code, 4, 0);
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// An active access just outside the resource returns zero.
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AppendVMovU32(&code, 2, static_cast<u32>(memory.size() * 4 - 4));
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code.push_back(EncodeDs0(opcode, 4, gds));
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code.push_back(0x03000302u);
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StoreResult(3, 0);
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// Read back all words, including guards around both address ranges.
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AppendVMovU32(&code, 2, 0);
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for (u32 i = 0; i < memory.size(); ++i) {
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u32 expected = memory[i];
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if (i >= 1 && i <= count) {
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expected = decrement ? boundaries[i - 1].decremented
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: boundaries[i - 1].incremented;
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} else if (i == 66) {
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expected = decrement ? guard - 2 : guard + 2;
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}
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code.push_back(EncodeDs0(0x36, i * 4, gds));
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code.push_back(EncodeDs1(4, 0, 2));
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StoreResult(4, expected);
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if (gds)
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test.expected_gds.push_back(expected);
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}
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AppendEnd(&code);
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test.initial.resize(test.expected.size());
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test.compute_info.lds_size_dwords = static_cast<u32>(memory.size());
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test.opcodes = {
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O::S_MOV_B64, O::V_MOV_B32,
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O::DS_READ_B32, decrement ? O::DS_DEC_RTN_U32 : O::DS_INC_RTN_U32,
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O::BUFFER_STORE_DWORD, O::S_ENDPGM};
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test.required_spirv = {"OpAtomicLoad", "OpAtomicCompareExchange",
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"OpLoopMerge"};
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if (gds)
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test.gds_initial = memory;
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else
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test.opcodes.push_back(O::DS_WRITE_B32);
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return test;
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}
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TestCase DsBoundedAtomicContention(bool decrement, bool gds, u32 wave_size) {
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using O = ShaderOpcode;
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constexpr u32 guard = 0x13579bdfu;
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constexpr u32 limit = 15;
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TestCase test;
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if (wave_size == 32) {
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test.name = decrement ? (gds ? "DsDecReturnGdsContentionWave32"
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: "DsDecReturnLdsContentionWave32")
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: (gds ? "DsIncReturnGdsContentionWave32"
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: "DsIncReturnLdsContentionWave32");
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} else {
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test.name = decrement ? (gds ? "DsDecReturnGdsContentionWave64"
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: "DsDecReturnLdsContentionWave64")
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: (gds ? "DsIncReturnGdsContentionWave64"
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: "DsIncReturnLdsContentionWave64");
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}
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auto &code = test.code;
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AppendVMovU32(&code, 2, 0);
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AppendVMovU32(&code, 3, limit);
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AppendVMovU32(&code, 5, 1);
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AppendVMovLiteral(&code, 6, guard);
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if (!gds) {
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// One lane initializes LDS before every wave in the workgroup uses it.
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code.push_back(EncodeSop1(0x04, 10, 126));
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code.push_back(EncodeVopc(0xc2, InlineU32(0), 0));
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code.push_back(EncodeSop1(0x04, 126, 106));
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code.push_back(EncodeDs0(0x0d, 4));
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code.push_back(EncodeDs1(0, 2, 2));
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code.push_back(EncodeSop1(0x04, 126, 10));
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code.push_back(EncodeSopp(0x0a, 0));
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}
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// Distinct masks in the wave64 halves also check inactive return
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// preservation.
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code.push_back(EncodeSop1(0x04, 10, 126));
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AppendSMovLiteral(&code, 126, 0x55555555u);
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AppendSMovLiteral(&code, 127, 0xaaaaaaaau);
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code.push_back(EncodeDs0(decrement ? 0x24 : 0x23, 4, gds));
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code.push_back(EncodeDs1(6, 3, 2));
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// Returned old values form a histogram; no lane ordering is assumed.
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code.push_back(EncodeVop2(0x1a, 7, InlineU32(2), 6));
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AppendBufferStoreOpcode(&code, 0x32, 5, 7);
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code.push_back(EncodeSop1(0x04, 126, 10));
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AppendVMovLiteral(&code, 7, guard);
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code.push_back(EncodeVopc(0xc2, Vgpr(7), 6));
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code.push_back(EncodeVop2(0x01, 8, InlineU32(0), 5));
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AppendStoreVgprAtLaneDwordOffset(&code, 8, 0, 16);
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code.push_back(EncodeSopp(0x0a, 0));
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// S_BARRIER orders LDS; use atomic add-zero to read GDS consistently.
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code.push_back(EncodeDs0(gds ? 0x20 : 0x36, 4, gds));
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code.push_back(EncodeDs1(9, 2, 2));
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AppendStoreVgprAtLaneDwordOffset(&code, 9, 0, 144);
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AppendEnd(&code);
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test.expected.assign(16, 4); // 64 active lanes, four complete wraps.
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for (u32 lane = 0; lane < 128; ++lane) {
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const uint64_t mask = 0xaaaaaaaa55555555ull;
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test.expected.push_back(
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(mask & (uint64_t{1} << (lane % wave_size))) == 0 ? 1 : 0);
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}
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test.expected.resize(272, 0);
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test.initial.resize(test.expected.size());
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test.compute_info.threads_num[0] = 128;
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test.compute_info.threads_num[1] = 1;
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test.compute_info.threads_num[2] = 1;
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test.compute_info.thread_ids_num = 1;
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test.compute_info.wave_size = wave_size;
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test.compute_info.lds_size_dwords = 3;
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test.has_compute_info = true;
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test.opcodes = {O::S_MOV_B32,
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O::S_MOV_B64,
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O::S_BARRIER,
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O::V_MOV_B32,
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O::V_LSHLREV_B32,
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O::V_ADD_NC_U32,
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O::V_CMP_EQ_U32,
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O::V_CNDMASK_B32,
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decrement ? O::DS_DEC_RTN_U32 : O::DS_INC_RTN_U32,
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gds ? O::DS_ADD_RTN_U32 : O::DS_READ_B32,
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O::BUFFER_ATOMIC_ADD,
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O::BUFFER_STORE_DWORD,
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O::S_ENDPGM};
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test.required_spirv = {"OpAtomicLoad", "OpAtomicCompareExchange",
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"OpLoopMerge"};
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if (gds) {
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test.gds_initial = {guard, 0, guard};
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test.expected_gds = test.gds_initial;
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} else
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test.opcodes.push_back(O::DS_WRITE_B32);
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return test;
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}
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TestCase DsMiscVariants() {
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using O = ShaderOpcode;
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@@ -23989,6 +24199,14 @@ std::vector<TestCase> MakeCases() {
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AddCase(DsWideGdsPartialBounds);
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AddCase(DsAtomicNoReturnVariants);
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AddCase(DsAtomicReturnVariants);
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for (bool decrement : {false, true}) {
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for (bool gds : {false, true}) {
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cases.push_back(DsBoundedAtomicBoundaries(decrement, gds));
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for (u32 wave_size : {32u, 64u}) {
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cases.push_back(DsBoundedAtomicContention(decrement, gds, wave_size));
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}
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}
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}
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AddCase(DsMiscVariants);
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AddCase(DsFloatMinMaxUsesSeparateCompareOperand);
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AddCase(DsSwizzleInvalidSourceLaneZero);
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@@ -28293,6 +28511,16 @@ int main(int argc, char **argv) {
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RunCase(&vulkan, BufferAtomicCmpSwapExactRaw());
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return 0;
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}
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if (argc == 2 && std::strcmp(argv[1], "--ds-atomics-only") == 0) {
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VulkanHarness vulkan;
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for (const auto &test : MakeCases()) {
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if (std::string_view(test.name).starts_with("Ds") ||
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std::string_view(test.name).starts_with("BufferAtomic")) {
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RunCase(&vulkan, test);
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}
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}
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return 0;
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}
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if (argc == 2 && std::strcmp(argv[1], "--mapped-range-only") == 0) {
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VulkanHarness vulkan;
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vulkan.CheckGpuMappedRangeLifecycle();
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