mirror of
https://github.com/KytyPS5/KytyPS5.git
synced 2026-10-24 04:46:56 +02:00
shader: collect usage once and emit descriptor slots directly
This commit is contained in:
nmzik
@@ -3,7 +3,6 @@
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#include "common/assert.h"
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#include "graphics/shader/recompiler/backend/spirv/spirvEmitterInternal.h"
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#include "graphics/shader/recompiler/ir/ShaderIR.h"
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#include "graphics/shader/recompiler/ir/passes/BindingLayout.h"
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#include <algorithm>
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#include <array>
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@@ -19,92 +18,14 @@ namespace {
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}
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void ValidateNativeProgram(const IR::Program& program, bool lds_storage) {
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using Kind = IR::DescriptorBindingKind;
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constexpr auto KindCount = static_cast<size_t>(Kind::Count);
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std::array<std::vector<uint32_t>, KindCount> expected;
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std::array<bool, KindCount> present {};
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const auto Dense = [](size_t size) {
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std::vector<uint32_t> values(size);
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for (uint32_t i = 0; i < values.size(); i++) {
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values[i] = i;
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}
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return values;
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uint64_t live_buffers = 0;
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bool uses_lds = false;
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bool uses_gds = false;
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const auto uses_mapping = [](const auto& resource) {
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return resource.indirect_root != UINT32_MAX;
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};
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auto Expect = [&](Kind kind, std::vector<uint32_t> resources = {}) {
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const auto index = static_cast<size_t>(kind);
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present[index] = true;
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expected[index] = std::move(resources);
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};
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for (uint32_t i = 0; i < program.info.images.size(); i++) {
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const auto kind = IR::DescriptorBindingForImage(program.info.images[i]);
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if (!kind.has_value()) {
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Fail(program, "native shader plan has an invalid image class");
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}
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present[static_cast<size_t>(*kind)] = true;
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const auto dynamic = program.info.images[i].mip_mode == IR::ImageMipMode::Dynamic;
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const auto count = dynamic ? program.info.images[i].mip_count : 1u;
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if (count == 0u || (!dynamic && program.info.images[i].mip_count != 1u)) {
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Fail(program, "native shader plan has an invalid image mip descriptor count");
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}
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expected[static_cast<size_t>(*kind)].insert(expected[static_cast<size_t>(*kind)].end(),
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count, i);
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}
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if (!program.info.samplers.empty()) {
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Expect(Kind::Samplers, Dense(program.info.samplers.size()));
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}
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auto& buffers = expected[static_cast<size_t>(Kind::Buffers)];
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const auto shared = IR::CollectMemoryResources(program, buffers);
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present[static_cast<size_t>(Kind::Buffers)] = !buffers.empty();
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if (shared.gds) {
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Expect(Kind::Gds);
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}
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if (shared.lds && lds_storage) {
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Expect(Kind::SharedMemory);
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}
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if (program.info.uses_dma) {
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Expect(Kind::BdaPagetable);
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Expect(Kind::FaultBuffer);
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}
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if (IR::UsesFlattenedSrt(program)) {
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Expect(Kind::FlattenedSrt);
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}
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if (program.bindings.ShaderDataDwords() != 0 && !program.bindings.UsesPushData()) {
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Expect(Kind::ShaderData);
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}
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std::array<bool, KindCount> seen {};
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for (const auto& binding: program.bindings.descriptors) {
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const auto kind = static_cast<size_t>(binding.kind);
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if (kind >= KindCount || seen[kind] || !present[kind] ||
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binding.resources != expected[kind]) {
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Fail(program, "native descriptor groups do not match shader topology");
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}
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seen[kind] = true;
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}
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for (size_t i = 0; i < KindCount; i++) {
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if (present[i] != seen[i]) {
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Fail(program, "native shader plan is missing a required descriptor group");
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}
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}
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const auto has_shader_data_storage = present[static_cast<size_t>(Kind::ShaderData)];
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const auto shader_data_dwords = program.bindings.ShaderDataDwords();
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const auto user_data_dwords = program.bindings.user_data_registers.size();
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const bool has_dispatch_threads = program.bindings.dispatch_thread_dword != IR::PushData::NoStart;
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if ((program.bindings.UsesPushData() &&
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!IR::PushData::CanFit(program.bindings.push_data_start_dword, shader_data_dwords)) ||
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(has_dispatch_threads && (program.stage != ShaderType::Compute ||
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program.bindings.dispatch_thread_dword != user_data_dwords)) ||
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program.bindings.memory_offset_dword != user_data_dwords + (has_dispatch_threads ? 3u : 0u) ||
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program.bindings.memory_offset_count != buffers.size() ||
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has_shader_data_storage != (shader_data_dwords != 0 && !program.bindings.UsesPushData()) ||
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!std::is_sorted(program.bindings.user_data_registers.begin(),
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program.bindings.user_data_registers.end()) ||
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std::adjacent_find(program.bindings.user_data_registers.begin(),
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program.bindings.user_data_registers.end()) !=
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program.bindings.user_data_registers.end()) {
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Fail(program, "native shader-data layout is inconsistent");
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}
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bool uses_flattened_srt = std::ranges::any_of(program.info.buffers, uses_mapping) ||
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std::ranges::any_of(program.info.images, uses_mapping);
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const auto planning_only_handle = [&](const IR::Inst& handle) {
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return !handle.Uses().empty() &&
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std::ranges::all_of(handle.Uses(), [&](const IR::Use& use) {
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@@ -141,6 +62,39 @@ void ValidateNativeProgram(const IR::Program& program, bool lds_storage) {
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};
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for (const auto* block: program.blocks) {
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for (const auto& inst: *block) {
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const auto op = inst.GetOpcode();
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uses_flattened_srt |= op == IR::ValueOpcode::ReadConst;
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if (IR::BufferAccessOf(op) != IR::BufferAccess::None ||
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IR::SharedAccessOf(op) != IR::SharedAccess::None ||
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IR::AddressOpcodeInfoOf(op).access != IR::AddressAccess::None) {
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const auto index = inst.Flags<IR::MemoryFlags>().index;
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if (index >= program.memory_info.size()) {
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Fail(program, "typed shader contains invalid memory metadata");
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}
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const auto& memory = program.memory_info[index];
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if (!memory.planning_only) {
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uses_lds |= memory.kind == IR::ResourceKind::FlatLocal;
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if (IR::SharedAccessOf(op) != IR::SharedAccess::None) {
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if (memory.kind != IR::ResourceKind::Lds && memory.kind != IR::ResourceKind::Gds) {
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Fail(program, "typed shader contains invalid shared-memory metadata");
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}
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uses_gds |= memory.kind == IR::ResourceKind::Gds;
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uses_lds |= memory.kind == IR::ResourceKind::Lds;
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} else if (memory.kind == IR::ResourceKind::Buffer ||
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memory.kind == IR::ResourceKind::ScalarBuffer) {
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if (memory.resource >= program.info.buffers.size()) {
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Fail(program, "typed shader contains an invalid buffer resource");
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}
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live_buffers |= uint64_t{1} << memory.resource;
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for (const auto child: program.info.buffers[memory.resource].indirect_resources) {
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if (child >= program.info.buffers.size()) {
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Fail(program, "typed shader contains an invalid indirect buffer resource");
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}
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live_buffers |= uint64_t{1} << child;
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}
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}
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}
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}
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const auto dense = inst.Flags<uint32_t>();
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switch (inst.GetOpcode()) {
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case IR::ValueOpcode::GetBufferResource:
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@@ -186,163 +140,64 @@ void ValidateNativeProgram(const IR::Program& program, bool lds_storage) {
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}
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}
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}
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using Kind = IR::DescriptorBindingKind;
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std::array<uint32_t, static_cast<size_t>(Kind::Count)> expected {};
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auto& buffer_count = expected[static_cast<size_t>(Kind::Buffers)];
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for (uint32_t index = 0; index < program.info.buffers.size(); ++index) {
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const auto slot = (live_buffers & (uint64_t{1} << index)) != 0 ? buffer_count++ : UINT32_MAX;
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if (program.info.buffers[index].descriptor_index != slot) {
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Fail(program, "native buffer descriptor index does not match shader topology");
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}
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}
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for (const auto& image: program.info.images) {
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const auto kind = IR::DescriptorBindingForImage(image);
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if (!kind.has_value()) {
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Fail(program, "native shader plan has an invalid image class");
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}
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if (image.mip_count == 0u ||
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(image.mip_mode != IR::ImageMipMode::Dynamic && image.mip_count != 1u)) {
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Fail(program, "native shader plan has an invalid image mip descriptor count");
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}
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auto& count = expected[static_cast<size_t>(*kind)];
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if (image.descriptor_index != count) {
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Fail(program, "native image descriptor index does not match shader topology");
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}
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count += image.mip_count;
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}
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expected[static_cast<size_t>(Kind::Samplers)] = static_cast<uint32_t>(program.info.samplers.size());
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expected[static_cast<size_t>(Kind::Gds)] = uses_gds;
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expected[static_cast<size_t>(Kind::SharedMemory)] = uses_lds && lds_storage;
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expected[static_cast<size_t>(Kind::BdaPagetable)] = program.info.uses_dma;
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expected[static_cast<size_t>(Kind::FaultBuffer)] = program.info.uses_dma;
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expected[static_cast<size_t>(Kind::FlattenedSrt)] = uses_flattened_srt;
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expected[static_cast<size_t>(Kind::ShaderData)] =
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program.bindings.ShaderDataDwords() != 0 && !program.bindings.UsesPushData();
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uint64_t descriptor_mask = 0;
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for (uint32_t index = 0; index < expected.size(); ++index) {
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if (expected[index] != 0) descriptor_mask |= uint64_t{1} << index;
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}
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if (program.bindings.descriptor_counts != expected ||
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program.bindings.descriptor_mask != descriptor_mask) {
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Fail(program, "native descriptor counts do not match shader topology");
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}
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const auto shader_data_dwords = program.bindings.ShaderDataDwords();
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const auto& registers = program.info.user_data_registers;
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const bool has_dispatch_threads = program.bindings.dispatch_thread_dword != IR::PushData::NoStart;
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if ((program.bindings.UsesPushData() &&
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!IR::PushData::CanFit(program.bindings.push_data_start_dword, shader_data_dwords)) ||
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(has_dispatch_threads && (program.stage != ShaderType::Compute ||
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program.bindings.dispatch_thread_dword != registers.size())) ||
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program.bindings.memory_offset_dword != registers.size() + (has_dispatch_threads ? 3u : 0u) ||
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!std::is_sorted(registers.begin(), registers.end()) ||
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std::adjacent_find(registers.begin(), registers.end()) != registers.end()) {
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Fail(program, "native shader-data layout is inconsistent");
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}
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}
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} // namespace
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Emitter::SpirvRequirements Emitter::AnalyzeProgramRequirements(const IR::Program& program) {
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SpirvRequirements requirements {};
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for (const auto* block: program.blocks) {
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for (const auto& inst: *block) {
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requirements.float64 |= inst.GetType() == IR::Type::F64;
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if (IR::BufferAccessOf(inst.GetOpcode()) == IR::BufferAccess::Atomic &&
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inst.GetType() == IR::Type::U64) {
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requirements.buffer_int64_atomics = true;
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}
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const auto address_access = IR::AddressOpcodeInfoOf(inst.GetOpcode()).access;
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if (address_access != IR::AddressAccess::None) {
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const auto memory_index = inst.Flags<IR::MemoryFlags>().index;
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if (memory_index >= program.memory_info.size()) {
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Fail(program, "address operation has invalid memory metadata");
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}
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const auto& memory = program.memory_info[memory_index];
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const auto kind = memory.kind;
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if (kind == IR::ResourceKind::Scratch || kind == IR::ResourceKind::FlatLocal) {
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if (program.scratch_dwords == 0) {
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Fail(program, "scratch operation has no per-thread storage");
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}
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requirements.function_scratch = true;
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if (kind == IR::ResourceKind::FlatLocal && program.stage != ShaderType::Compute &&
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program.stage != ShaderType::Mesh) {
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requirements.function_lds = true;
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}
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} else if (address_access == IR::AddressAccess::Write) {
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Fail(program, "writable FLAT/GLOBAL addresses require GPU ownership tracking");
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} else {
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// Descriptor stores can alias coherent physical-address loads.
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requirements.coherent_buffers |= memory.coherent;
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}
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}
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if (IR::BufferAccessOf(inst.GetOpcode()) != IR::BufferAccess::None) {
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const auto memory_index = inst.Flags<IR::MemoryFlags>().index;
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if (memory_index >= program.memory_info.size()) {
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Fail(program, "buffer operation has invalid memory metadata");
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}
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const auto& memory = program.memory_info[memory_index];
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if (memory.kind == IR::ResourceKind::IndirectBuffer &&
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inst.GetOpcode() != IR::ValueOpcode::ReadConstBuffer) {
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requirements.subgroup_local_invocation_id = true;
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}
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if (memory.kind == IR::ResourceKind::Buffer) {
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requirements.coherent_buffers |= memory.coherent;
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if (memory.resource >= program.info.buffers.size()) {
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Fail(program, "buffer operation has invalid resource metadata");
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}
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const auto bits = StorageBufferElementBits(program, memory);
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requirements.buffer_u8 |= bits == 8u;
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requirements.buffer_u16 |= bits == 16u;
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if ((program.info.buffers[memory.resource].packed_stride & (1u << 20u)) != 0u) {
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if (program.stage != ShaderType::Compute) {
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Fail(program, "buffer ADD_TID is only valid for compute shaders");
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}
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requirements.subgroup_local_invocation_id = true;
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}
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}
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}
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const auto shared_access = IR::SharedAccessOf(inst.GetOpcode());
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if (shared_access != IR::SharedAccess::None) {
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const auto index = inst.Flags<IR::MemoryFlags>().index;
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if (index >= program.memory_info.size()) {
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Fail(program, "shared operation has invalid memory metadata");
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}
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const auto kind = program.memory_info[index].kind;
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if (kind != IR::ResourceKind::Lds && kind != IR::ResourceKind::Gds) {
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Fail(program, "shared operation has invalid resource kind");
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}
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if (shared_access == IR::SharedAccess::Atomic &&
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IR::SharedComponentCount(inst.GetOpcode()) == 2u) {
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if (kind != IR::ResourceKind::Lds || program.stage != ShaderType::Compute) {
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Fail(program, "64-bit shared atomics require compute LDS");
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}
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requirements.shared_int64_atomics = true;
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}
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if (program.stage != ShaderType::Compute && program.stage != ShaderType::Mesh &&
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kind == IR::ResourceKind::Lds) {
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requirements.function_lds = true;
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}
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if (shared_access == IR::SharedAccess::Append ||
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shared_access == IR::SharedAccess::Consume) {
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requirements.subgroup_ballot = true;
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requirements.subgroup_shuffle = true;
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requirements.subgroup_local_invocation_id = true;
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}
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}
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switch (inst.GetOpcode()) {
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case IR::ValueOpcode::StoreCompletion: requirements.subgroup_barrier = true; break;
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case IR::ValueOpcode::BvhIntersect: requirements.bvh = true; break;
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case IR::ValueOpcode::ConditionRef:
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requirements.subgroup_ballot |=
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inst.Flags<CFG::BranchCondition>() != CFG::BranchCondition::ScalarInstruction;
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break;
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case IR::ValueOpcode::Ballot: requirements.subgroup_ballot = true; break;
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case IR::ValueOpcode::DppMoveU32:
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case IR::ValueOpcode::ReadFirstLane:
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case IR::ValueOpcode::ReadLane: {
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requirements.subgroup_ballot = true;
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requirements.subgroup_shuffle = true;
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if (inst.GetOpcode() == IR::ValueOpcode::DppMoveU32) {
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requirements.subgroup_local_invocation_id = true;
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}
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break;
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}
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case IR::ValueOpcode::DppUpdateU32:
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case IR::ValueOpcode::WriteLane: {
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requirements.subgroup_ballot = true;
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requirements.subgroup_local_invocation_id = true;
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break;
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}
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case IR::ValueOpcode::Permlane16U32: {
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requirements.subgroup_ballot = true;
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requirements.subgroup_shuffle = true;
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requirements.subgroup_local_invocation_id = true;
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break;
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}
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case IR::ValueOpcode::SwizzleU32:
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case IR::ValueOpcode::PermuteU32:
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case IR::ValueOpcode::BpermuteU32: {
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requirements.subgroup_ballot = true;
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requirements.subgroup_shuffle = true;
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requirements.subgroup_local_invocation_id = true;
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break;
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}
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case IR::ValueOpcode::LaneId:
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requirements.subgroup_local_invocation_id |=
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program.stage != ShaderType::TessellationControl;
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break;
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case IR::ValueOpcode::ImageQueryLod: requirements.compute_derivatives = true; break;
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case IR::ValueOpcode::ImageGatherRaw:
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requirements.image_gather_extended = true;
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break;
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case IR::ValueOpcode::SetAttribute: {
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const auto index = inst.Flags<IR::ExportFlags>().index;
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if (index >= program.export_info.size()) {
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Fail(program, "attribute export has invalid metadata");
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}
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if (program.stage == ShaderType::Pixel &&
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program.export_info[index].vm) {
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requirements.pixel_valid_mask = true;
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}
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break;
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}
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default: break;
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}
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}
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}
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return requirements;
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}
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std::vector<uint32_t> EmitProgram(const IR::Program& program,
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ShaderStageInputInfo input_info) {
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std::vector<uint32_t> EmitProgram(IR::Program& program, ShaderStageInputInfo input_info,
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uint32_t push_data_start_dword) {
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using namespace Emitter;
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if (program.stage != ShaderType::Compute && program.stage != ShaderType::Vertex &&
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@@ -352,12 +207,14 @@ std::vector<uint32_t> EmitProgram(const IR::Program& program,
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Fail(program, "binary SPIR-V emitter received an unsupported shader stage");
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}
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if (!program.srt_plan_complete || !program.resource_tracking_complete ||
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!program.shader_info_complete || !program.binding_layout_complete) {
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!program.shader_info_complete) {
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Fail(program, "SPIR-V emitter requires a fully planned native shader program");
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}
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ValidateNativeProgram(program, program.stage == ShaderType::Compute &&
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input_info.compute != nullptr && input_info.compute->lds_storage);
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if (program.info.buffers.size() > IR::ShaderInfo::MaxBuffers) {
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Fail(program, "native shader exceeds the buffer resource limit");
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}
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IR::ValidateProgram(program, true);
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program.bindings = {.push_data_start_dword = push_data_start_dword};
|
||||
EmitterState state(program, input_info);
|
||||
const auto* workgroup = ShaderWorkgroupInput(program.stage, input_info);
|
||||
state.lane_count =
|
||||
@@ -365,6 +222,8 @@ std::vector<uint32_t> EmitProgram(const IR::Program& program,
|
||||
? 2u
|
||||
: 1u;
|
||||
DefineModule(state);
|
||||
ValidateNativeProgram(program, program.stage == ShaderType::Compute &&
|
||||
input_info.compute != nullptr && input_info.compute->lds_storage);
|
||||
EmitProgram(state);
|
||||
state.builder.AddEntryPoint(ExecutionModelForStage(state.program.stage), state.main_func,
|
||||
"main", state.interface_variables);
|
||||
|
||||
Reference in New Issue
Block a user