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shader: drop the unread F32Class bits and the per-pass HS reflection counter reset

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This commit is contained in:
nmzik
2026-10-20 23:54:32 +02:00
parent 3c4124dafa
commit ea1b032c59
3 changed files with 5 additions and 10 deletions
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src/graphics/shader/recompiler/Tessellation.cpp
+2 -3
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@@ -98,11 +98,10 @@ void ReflectTessellationLayout(const Decoder::Program& program, bool local,
return changed; return changed;
}; };
uint32_t stride = 0, patch_begin = 0, patch_end = 0; uint32_t stride = 0, patch_begin = UINT32_MAX, patch_end = 0;
for (bool repeat = true; repeat;) { for (bool repeat = true; repeat;) {
repeat = false; repeat = false;
registers = entry; registers = entry;
stride = 0, patch_begin = UINT32_MAX, patch_end = 0;
for (const auto& inst: program.instructions) { for (const auto& inst: program.instructions) {
if (const auto join = joins.find(inst.pc); join != joins.end()) { if (const auto join = joins.find(inst.pc); join != joins.end()) {
merge(registers, join->second); merge(registers, join->second);
@@ -112,7 +111,7 @@ void ReflectTessellationLayout(const Decoder::Program& program, bool local,
merge(registers, loop->second); merge(registers, loop->second);
if (IsDirectBranch(inst.opcode)) { if (IsDirectBranch(inst.opcode)) {
const bool back = inst.branch_target <= inst.pc; const bool back = inst.branch_target <= inst.pc;
auto [join, inserted] = const auto [join, inserted] =
(back ? loops : joins).try_emplace(inst.branch_target, registers); (back ? loops : joins).try_emplace(inst.branch_target, registers);
const bool changed = !inserted && merge(join->second, registers); const bool changed = !inserted && merge(join->second, registers);
repeat |= back && (inserted || changed); repeat |= back && (inserted || changed);
src/graphics/shader/recompiler/backend/spirv/spirvEmitterAluHelpers.cpp
+3 -6
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@@ -17,12 +17,9 @@ uint32_t EmitCompareU32Constant(EmitterState& state, spv::Op opcode, uint32_t va
} }
F32Class EmitClassifyF32Bits(EmitterState& state, uint32_t bits) { F32Class EmitClassifyF32Bits(EmitterState& state, uint32_t bits) {
F32Class cls; const auto abs_bits = EmitAndConstant(state, bits, 0x7fffffffu);
cls.bits = bits; return {EmitCompareU32Constant(state, spv::OpUGreaterThan, abs_bits, 0x7f800000u),
const auto abs_bits = EmitAndConstant(state, cls.bits, 0x7fffffffu); EmitCompareU32Constant(state, spv::OpIEqual, abs_bits, 0)};
cls.nan = EmitCompareU32Constant(state, spv::OpUGreaterThan, abs_bits, 0x7f800000u);
cls.zero = EmitCompareU32Constant(state, spv::OpIEqual, abs_bits, 0);
return cls;
} }
uint32_t EmitClassMaskBitMatch(EmitterState& state, uint32_t mask, uint32_t bit, uint32_t EmitClassMaskBitMatch(EmitterState& state, uint32_t mask, uint32_t bit,
src/graphics/shader/recompiler/backend/spirv/spirvEmitterInternal.h
-1
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@@ -285,7 +285,6 @@ struct ImageSampleLayout {
}; };
struct F32Class { struct F32Class {
uint32_t bits = 0;
uint32_t nan = 0; uint32_t nan = 0;
uint32_t zero = 0; uint32_t zero = 0;
}; };