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shader: V_MAD_I16
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@@ -22,6 +22,18 @@ bool Translator::Integer16Binary(const Decoder::Instruction& inst, IR::ValueOpco
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return true;
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}
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bool Translator::V_MAD_I16(const Decoder::Instruction& inst) {
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const auto lhs = ReadU16AsU32(inst.src0, true);
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const auto rhs = ReadU16AsU32(inst.src1, true);
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auto result = ir.IAdd(ir.IMul(lhs, rhs), ReadU16AsU32(inst.src2, true));
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if (inst.dst.clamp) {
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result = IR::U32(ir.Emit(IR::ValueOpcode::SMax32, {result, IR::Value(0xffff8000u)}));
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result = IR::U32(ir.Emit(IR::ValueOpcode::SMin32, {result, IR::Value(0x7fffu)}));
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}
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Write16Bits(DestinationOperand(inst), ir.BitwiseAnd(result, IR::U32(IR::Value(0xffffu))));
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return true;
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}
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bool Translator::V_MED3_I16(const Decoder::Instruction& inst) {
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const auto result = IR::U32(ir.Emit(
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IR::ValueOpcode::SMedTri32, {ReadU16AsU32(inst.src0, true), ReadU16AsU32(inst.src1, true),
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@@ -164,6 +164,7 @@ private:
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bool FloatCube(const Decoder::Instruction& inst, uint32_t result_kind);
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bool Integer16Shift(const Decoder::Instruction& inst, IR::ValueOpcode opcode, bool arithmetic);
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bool Integer16Binary(const Decoder::Instruction& inst, IR::ValueOpcode opcode, bool sign);
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bool V_MAD_I16(const Decoder::Instruction& inst);
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bool V_MED3_I16(const Decoder::Instruction& inst);
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bool PackedInteger16Shift(const Decoder::Instruction& inst, IR::ValueOpcode opcode,
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bool arithmetic);
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@@ -328,6 +328,7 @@ bool Translator::EmitVector(const Decoder::Instruction& inst) {
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case O::V_SUB_NC_U16:
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case O::V_SUB_NC_I16: return Integer16Binary(inst, IR::ValueOpcode::ISub32, false);
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case O::V_MUL_LO_U16: return Integer16Binary(inst, IR::ValueOpcode::IMul32, false);
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case O::V_MAD_I16: return V_MAD_I16(inst);
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case O::V_MED3_I16: return V_MED3_I16(inst);
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case O::V_MIN_I16: return Integer16Binary(inst, IR::ValueOpcode::SMin32, true);
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case O::V_MAX_I16: return Integer16Binary(inst, IR::ValueOpcode::SMax32, true);
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