gpu: handle partial guard-band register ranges

src/graphics/guest_gpu/command_processor/pm4Dispatch.cpp

@@ -82,7 +82,6 @@ constexpr auto MakeContextDispatchTable() {
 	g_hw_ctx_func[Pm4::VGT_PRIMITIVEID_RESET]                 = HwCtxSetPrimitiveIdReset;
 	g_hw_ctx_func[Pm4::PA_CL_OBJPRIM_ID_CNTL]                 = HwCtxSetObjprimIdControl;
 	g_hw_ctx_func[Pm4::VGT_SHADER_STAGES_EN]                  = HwCtxSetShaderStages;
-	g_hw_ctx_func[Pm4::PA_CL_GB_VERT_CLIP_ADJ]                = HwCtxSetGuardBands;
 
 	for (uint32_t slot = 0; slot < 8; slot++) {
 		g_hw_ctx_func[Pm4::CB_COLOR0_BASE + slot * 15] = HwCtxSetRenderTarget;

src/graphics/guest_gpu/command_processor/pm4Dispatch.h

@@ -90,7 +90,6 @@ uint32_t HwCtxSetDrawPayloadControl(CommandProcessor&, uint32_t, uint32_t, const
 uint32_t HwCtxSetPrimitiveIdReset(CommandProcessor&, uint32_t, uint32_t, const uint32_t*, uint32_t);
 uint32_t HwCtxSetObjprimIdControl(CommandProcessor&, uint32_t, uint32_t, const uint32_t*, uint32_t);
 uint32_t HwCtxSetShaderStages(CommandProcessor&, uint32_t, uint32_t, const uint32_t*, uint32_t);
-uint32_t HwCtxSetGuardBands(CommandProcessor&, uint32_t, uint32_t, const uint32_t*, uint32_t);
 uint32_t HwCtxSetRenderTarget(CommandProcessor&, uint32_t, uint32_t, const uint32_t*, uint32_t);
 uint32_t HwCtxSetColorInfo(CommandProcessor&, uint32_t, uint32_t, const uint32_t*, uint32_t);
 uint32_t HwCtxSetBlendControl(CommandProcessor&, uint32_t, uint32_t, const uint32_t*, uint32_t);

src/graphics/guest_gpu/command_processor/pm4Handlers.cpp

@@ -859,20 +859,6 @@ KYTY_HW_CTX_PARSER(HwCtxSetClipRect) {
 	return value_count;
 }
 
-KYTY_HW_CTX_PARSER(HwCtxSetGuardBands) {
-	EXIT_NOT_IMPLEMENTED(cmd_id != 0xC0046900);
-	EXIT_NOT_IMPLEMENTED(cmd_offset != Pm4::PA_CL_GB_VERT_CLIP_ADJ);
-
-	auto vert_clip    = *reinterpret_cast<const float*>(&buffer[0]); // PA_CL_GB_VERT_CLIP_ADJ
-	auto vert_discard = *reinterpret_cast<const float*>(&buffer[1]); // PA_CL_GB_VERT_DISC_ADJ
-	auto horz_clip    = *reinterpret_cast<const float*>(&buffer[2]); // PA_CL_GB_HORZ_CLIP_ADJ
-	auto horz_discard = *reinterpret_cast<const float*>(&buffer[3]); // PA_CL_GB_HORZ_DISC_ADJ
-
-	cp.GetCtx().SetGuardBands(horz_clip, vert_clip, horz_discard, vert_discard);
-
-	return 4;
-}
-
 KYTY_HW_CTX_PARSER(HwCtxSetHardwareScreenOffset) {
 	EXIT_NOT_IMPLEMENTED(cmd_id != 0xC0016900);
 	EXIT_NOT_IMPLEMENTED(cmd_offset != Pm4::PA_SU_HARDWARE_SCREEN_OFFSET);

tests/ShaderRecompilerComputeTests.cpp

@@ -22103,6 +22103,49 @@ void CheckPm4DirectShaderRegisterFallback(RenderContext &renderer) {
   std::printf("[host]    %-32s ok\n", "Pm4DirectShaderRegisterFallback");
 }
 
+void CheckPm4GuardBandRegisterRanges(RenderContext &renderer) {
+  GraphicsInitJmpTables();
+  CommandProcessor processor(renderer);
+  processor.GetCtx().SetGuardBands(2.0f, 3.0f, 4.0f, 5.0f);
+
+  std::array<uint32_t, 3> single{
+      KYTY_PM4(3, Pm4::IT_SET_CONTEXT_REG, Pm4::R_ZERO),
+      Pm4::PA_CL_GB_VERT_CLIP_ADJ,
+      std::bit_cast<uint32_t>(6.0f),
+  };
+  Pm4Execution single_execution;
+  const auto single_result =
+      processor.Process(single_execution, single.data(), single.size());
+  const auto &single_viewport = processor.GetCtx().GetScreenViewport();
+  Require("Pm4GuardBandRegisterRanges", "single register",
+          single_result == Pm4ProcessResult::Complete &&
+              single_viewport.guard_band_horz_clip == 2.0f &&
+              single_viewport.guard_band_vert_clip == 6.0f &&
+              single_viewport.guard_band_horz_discard == 4.0f &&
+              single_viewport.guard_band_vert_discard == 5.0f,
+          "single guard-band write changed the wrong context state");
+
+  std::array<uint32_t, 6> range{
+      KYTY_PM4(6, Pm4::IT_SET_CONTEXT_REG, Pm4::R_ZERO),
+      Pm4::PA_CL_GB_VERT_CLIP_ADJ,
+      std::bit_cast<uint32_t>(7.0f),
+      std::bit_cast<uint32_t>(8.0f),
+      std::bit_cast<uint32_t>(9.0f),
+      std::bit_cast<uint32_t>(10.0f),
+  };
+  Pm4Execution range_execution;
+  const auto range_result = processor.Process(range_execution, range.data(), range.size());
+  const auto &range_viewport = processor.GetCtx().GetScreenViewport();
+  Require("Pm4GuardBandRegisterRanges", "full range",
+          range_result == Pm4ProcessResult::Complete &&
+              range_viewport.guard_band_horz_clip == 9.0f &&
+              range_viewport.guard_band_vert_clip == 7.0f &&
+              range_viewport.guard_band_horz_discard == 10.0f &&
+              range_viewport.guard_band_vert_discard == 8.0f,
+          "full guard-band range did not preserve hardware register order");
+  std::printf("[host]    %-32s ok\n", "Pm4GuardBandRegisterRanges");
+}
+
 void CheckPm4PolygonOffsetRegisters(RenderContext &renderer) {
   GraphicsInitJmpTables();
   CommandProcessor processor(renderer);
@@ -22696,6 +22739,7 @@ int main(int argc, char **argv) {
   CheckPm4AcquireMemNoOp(vulkan.RuntimeRenderer());
   CheckPm4StencilInfoValueLane(vulkan.RuntimeRenderer());
   CheckPm4DirectShaderRegisterFallback(vulkan.RuntimeRenderer());
+  CheckPm4GuardBandRegisterRanges(vulkan.RuntimeRenderer());
   CheckPm4PolygonOffsetRegisters(vulkan.RuntimeRenderer());
   CheckPm4ContextStateOperations(vulkan.RuntimeRenderer());
   CheckPm4WaitResume(vulkan.RuntimeRenderer());