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shader: drop null checks on the stage input info pointers

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This commit is contained in:
nmzik
2026-10-20 03:18:03 +02:00
parent 992a83003d
commit f186b35706
12 changed files with 45 additions and 78 deletions
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src/graphics/shader/recompiler/ir/passes/ResourceTracking.cpp
+16 -17
View File
@@ -362,8 +362,7 @@ class Tracker {
public:
Tracker(Program& program, const Decoder::Program& decoded, const CFG::Graph& native_cfg,
ShaderStageInputInfo input)
: m_program(program), m_decoded(decoded), m_native_cfg(native_cfg),
m_workgroup(program.stage == ShaderType::Compute ? input.compute : nullptr),
: m_program(program), m_decoded(decoded), m_native_cfg(native_cfg), m_input(input),
m_scalar_writes(std::move(program.scalar_writes)), m_info(program.info) {
std::ranges::sort(m_scalar_writes, {}, &Program::ScalarWrite::pc);
m_info.buffers.clear();
@@ -1853,7 +1852,7 @@ private:
if (inst->GetOpcode() == ValueOpcode::GetBuiltin &&
inst->Arg(0) == Value(static_cast<uint32_t>(StageInputKind::LocalInvocationId)) &&
ImmediateU32(inst->Arg(1), axis) && axis < 3u &&
m_workgroup->threads_num[axis] <= (uint64_t {1} << bits)) return axis + 1u;
m_input.compute->threads_num[axis] <= (uint64_t {1} << bits)) return axis + 1u;
if (!allow_induction || inst->GetOpcode() != ValueOpcode::Phi ||
(!induction.IsEmpty() && induction != at)) return {};
induction = at;
@@ -1864,20 +1863,20 @@ private:
bool LinearLocalIndex(const std::array<uint64_t, 5>& index) const {
uint64_t stride = 1u;
for (uint32_t axis = 0; axis < 3u; ++axis) {
if (m_workgroup->threads_num[axis] != 1u && index[axis + 1u] != stride) return false;
stride *= m_workgroup->threads_num[axis];
if (m_input.compute->threads_num[axis] != 1u && index[axis + 1u] != stride) return false;
stride *= m_input.compute->threads_num[axis];
}
return index[0] == 0u;
}
void ForwardPrivateLds() {
if (m_workgroup == nullptr) return;
if (m_program.stage != ShaderType::Compute) return;
uint64_t bytes = 4u;
for (const auto size: m_workgroup->threads_num) {
for (const auto size: m_input.compute->threads_num) {
if (size == 0u || size > 1024u) return;
bytes *= size;
}
if (bytes > uint64_t {m_workgroup->lds_size_dwords} * 4u) return;
if (bytes > uint64_t {m_input.compute->lds_size_dwords} * 4u) return;
struct Access { Inst* inst; uint32_t offset; };
std::vector<Access> reads, writes;
Value address;
@@ -1893,7 +1892,7 @@ private:
if ((op != ValueOpcode::LoadSharedU32 && op != ValueOpcode::WriteSharedU32) ||
memory.data_bits != 32u || memory.secondary_offset != 0u ||
(memory.offset & 3u) != 0u ||
uint64_t {memory.offset} + bytes > uint64_t {m_workgroup->lds_size_dwords} * 4u)
uint64_t {memory.offset} + bytes > uint64_t {m_input.compute->lds_size_dwords} * 4u)
return;
if (address.IsEmpty()) address = inst.Arg(0).Resolve();
else if (!EquivalentValue(m_program, address, inst.Arg(0))) return;
@@ -2039,16 +2038,16 @@ private:
Value SharedLoadBound(Value value, Value active) {
const auto* read = ActiveValue(value, active).TryInstruction();
if (read == nullptr || read->GetOpcode() != ValueOpcode::LoadSharedU32 ||
m_workgroup == nullptr || m_program.stage != ShaderType::Compute ||
m_program.stage != ShaderType::Compute ||
read->Arg(1).Resolve() != Value(true)) return {};
uint64_t group_size = 1u;
for (const auto dimension: m_workgroup->threads_num) {
if (dimension == 0u || dimension > m_workgroup->wave_size) return {};
for (const auto dimension: m_input.compute->threads_num) {
if (dimension == 0u || dimension > m_input.compute->wave_size) return {};
group_size *= dimension;
}
// Indexed LDS operations within one native wave execute in order. Multiwave
// append lists require a separate workgroup synchronization proof.
if (group_size != m_workgroup->wave_size || group_size != m_program.wave_size ||
if (group_size != m_input.compute->wave_size || group_size != m_program.wave_size ||
(group_size != 32u && group_size != 64u)) return {};
const auto memory = [&](const Inst& inst) -> const MemoryInfo* {
const auto index = inst.Flags<MemoryFlags>().index;
@@ -2101,7 +2100,7 @@ private:
if (op != ValueOpcode::SharedAtomicIAdd32 ||
ActiveValue(inst.Arg(1), guard) != Value(1u) ||
!constant_address(inst, address) ||
uint64_t {address} + 4u > uint64_t {m_workgroup->lds_size_dwords} * 4u ||
uint64_t {address} + 4u > uint64_t {m_input.compute->lds_size_dwords} * 4u ||
address >= 0x10000u ||
std::ranges::any_of(appends, [&](const Append& at) { return at.counter == address; })) return {};
appends.push_back({.atomic = &inst, .counter = address});
@@ -4059,7 +4058,7 @@ private:
Program& m_program;
const Decoder::Program& m_decoded;
const CFG::Graph& m_native_cfg;
const ShaderWorkgroupInputInfo* m_workgroup;
ShaderStageInputInfo m_input;
std::vector<Program::ScalarWrite> m_scalar_writes;
std::vector<ResolvedHandle> m_resolved_handles;
std::vector<const Inst*> m_srt_visiting;
@@ -4092,8 +4091,8 @@ UniformFillPlan RecognizePatternFill(Program& program, const Decoder::Program& d
// Dispatch thread dimensions, valid in both wave sizes.
Pattern {.code_words = 38, .hash = 0xacbda1a1ccdd4198ull, .wave_size_mask = 32 | 64, .bounded = false},
};
if (program.stage != ShaderType::Compute || input.compute == nullptr ||
decoded.instructions.empty() || program.user_data_base != 0 || program.user_data_count < 10 ||
if (program.stage != ShaderType::Compute || decoded.instructions.empty() ||
program.user_data_base != 0 || program.user_data_count < 10 ||
program.info.buffers.size() != 1 || !program.info.images.empty()) return {};
const auto& cs = *input.compute;
const bool matching_inputs = cs.workgroup_register == 10 && cs.thread_ids_num == 1 &&
src/graphics/shader/recompiler/ir/passes/ResourceTracking.h
+1 -1
View File
@@ -7,7 +7,7 @@ namespace Libs::Graphics::ShaderRecompiler::IR {
// Resolves native descriptor sources, plans their scalar reads, and assigns dense resource bindings.
void TrackResources(Program& program, const Decoder::Program& decoded, const CFG::Graph& native_cfg,
ShaderStageInputInfo input = {});
ShaderStageInputInfo input);
} // namespace Libs::Graphics::ShaderRecompiler::IR
src/graphics/shader/recompiler/ir/passes/ShaderInfoCollection.cpp
+1 -10
View File
@@ -47,26 +47,17 @@ void ValidateOptions(const Program& program, ShaderStageInputInfo input_info) {
case ShaderType::TessellationControl:
case ShaderType::TessellationEvaluation:
case ShaderType::Mesh:
if (input_info.vertex == nullptr) {
return Fail("vertex shader has no input metadata");
}
if (input_info.vertex->resources_num < 0 ||
input_info.vertex->resources_num > ShaderVertexInputInfo::RES_MAX) {
return Fail("vertex resource count is out of range");
}
return;
case ShaderType::Pixel:
if (input_info.pixel == nullptr) {
return Fail("pixel shader has no input metadata");
}
if (input_info.pixel->input_num > std::size(input_info.pixel->interpolator_settings)) {
return Fail("pixel input count is out of range");
}
return;
case ShaderType::Compute:
if (input_info.compute == nullptr) {
return Fail("compute shader has no input metadata");
}
if (input_info.compute->thread_ids_num < 0 || input_info.compute->thread_ids_num > 3) {
return Fail("compute thread ID count is out of range");
}
@@ -191,7 +182,7 @@ void AddBuiltinInput(ShaderInfo& info, StageInputKind kind) {
void CollectOutput(const Program& program, ShaderStageInputInfo input_info,
ShaderInfo& info, const Inst& inst) {
const bool alpha_remap = program.stage == ShaderType::Pixel && input_info.pixel != nullptr &&
const bool alpha_remap = program.stage == ShaderType::Pixel &&
input_info.pixel->alpha_blend_source != ShaderAlphaBlendSource::None;
const auto& export_info = program.export_info[inst.Flags<ExportFlags>().index];
if (export_info.kind == ExportTargetKind::MrtZ) {