mirror of
https://github.com/KytyPS5/KytyPS5.git
synced 2026-10-20 10:56:58 +02:00
Implement vertex swizzle
This commit is contained in:
nmzik
@@ -5700,24 +5700,24 @@ TestCase VectorVop3FloatCompareNegSourceModifier() {
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{O::VMovB32, O::VCmpLtF32, O::BufferStoreDword, O::SEndpgm}};
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}
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TestCase VectorVop3CmpxWritesExecMask() {
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TestCase VectorVop3CmpxWritesScalarDstAndExecMask() {
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using O = ShaderOpcode;
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std::vector<u32> code;
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AppendVMovU32(&code, 0, 2);
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AppendVMovU32(&code, 1, 1);
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AppendVMovU32(&code, 2, 0);
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AppendVMovU32(&code, 30, 0);
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AppendVop3(&code, 0xd1, 5, Vgpr(0), Vgpr(1)); // v_cmpx_lt_u32, false
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AppendVMovU32(&code, 2, 7);
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AppendBufferStoreDword(&code, 2, 30);
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AppendEnd(&code);
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AppendVMovU32(&code, 0, 1);
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AppendVMovU32(&code, 1, 1);
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AppendVMovU32(&code, 2, 7);
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AppendVMovU32(&code, 30, 0);
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AppendVop3(&code, 0xd2, 5, Vgpr(0), Vgpr(1)); // v_cmpx_eq_u32 s[5:6], true
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code.push_back(EncodeSop1(0x0a, 126, 5)); // s_wqm_b64 exec, s[5:6]
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AppendBufferStoreDword(&code, 2, 30);
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AppendEnd(&code);
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return {"VectorVop3CmpxWritesExecMask",
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code,
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{0},
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{0},
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{O::VMovB32, O::VCmpxLtU32, O::BufferStoreDword, O::SEndpgm}};
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return {"VectorVop3CmpxWritesScalarDstAndExecMask",
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code,
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{0},
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{7},
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{O::VMovB32, O::VCmpxEqU32, O::SWqmB64, O::BufferStoreDword, O::SEndpgm}};
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}
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TestCase VectorVopcSdwaCmpxWritesExecMask() {
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@@ -5741,6 +5741,28 @@ TestCase VectorVopcSdwaCmpxWritesExecMask() {
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{O::VMovB32, O::VCmpxLtU32, O::BufferStoreDword, O::SEndpgm}};
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}
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TestCase VectorVopcCmpxPreservesVccForWqm() {
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using O = ShaderOpcode;
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std::vector<u32> code;
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AppendVMovU32(&code, 0, 1);
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AppendVMovU32(&code, 1, 1);
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AppendVMovU32(&code, 2, 7);
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AppendVMovU32(&code, 30, 0);
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code.push_back(EncodeSop1(0x04, 106, InlineU32(0))); // s_mov_b64 vcc, 0
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code.push_back(EncodeVopc(0xd2, Vgpr(0), 1)); // v_cmpx_eq_u32, true
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code.push_back(EncodeSop1(0x0a, 126, 106)); // s_wqm_b64 exec, vcc
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AppendBufferStoreDword(&code, 2, 30);
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AppendEnd(&code);
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return {"VectorVopcCmpxPreservesVccForWqm",
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code,
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{0},
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{7},
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{O::VMovB32, O::SMovB64, O::VCmpxEqU32, O::SWqmB64,
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O::BufferStoreDword, O::SEndpgm}};
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}
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TestCase VectorCompareInvertedMaskSelect() {
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using O = ShaderOpcode;
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@@ -8638,8 +8660,9 @@ std::vector<TestCase> MakeCases() {
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AddCase(Vop3CndmaskAllowsDataSourceModifier);
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AddCase(VectorCompareExecOps);
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AddCase(VectorVop3FloatCompareNegSourceModifier);
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AddCase(VectorVop3CmpxWritesExecMask);
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AddCase(VectorVop3CmpxWritesScalarDstAndExecMask);
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AddCase(VectorVopcSdwaCmpxWritesExecMask);
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AddCase(VectorVopcCmpxPreservesVccForWqm);
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AddCase(VectorCompareInvertedMaskSelect);
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AddCase(BranchSelect);
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AddCase(SimpleLoop);
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@@ -9,85 +9,122 @@ namespace {
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using namespace Libs::Graphics;
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void Check(bool value, const char* text) {
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if (!value) {
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std::fprintf(stderr, "ShaderVertexMetadataTests: failed: %s\n", text);
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std::abort();
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}
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void Check(bool value, const char *text) {
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if (!value) {
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std::fprintf(stderr, "ShaderVertexMetadataTests: failed: %s\n", text);
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std::abort();
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}
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}
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struct Fixture {
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std::array<uint16_t, static_cast<size_t>(AgcDirectResourceType::Last) + 1> offsets {};
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ShaderUserData user_data {};
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ShaderSemantic semantic {};
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ShaderMappedData mapped {};
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std::array<uint16_t, static_cast<size_t>(AgcDirectResourceType::Last) + 1>
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offsets{};
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ShaderUserData user_data{};
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ShaderSemantic semantic{};
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ShaderMappedData mapped{};
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Fixture() {
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offsets.fill(AGC_ILLEGAL_DIRECT_OFFSET);
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offsets[static_cast<size_t>(AgcDirectResourceType::PtrVertexBufferTable)] = 2;
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offsets[static_cast<size_t>(AgcDirectResourceType::PtrVertexAttribDescTable)] = 4;
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user_data.direct_resource_offset = offsets.data();
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user_data.direct_resource_count = static_cast<uint16_t>(offsets.size());
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mapped.user_data = &user_data;
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mapped.input_semantics = &semantic;
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mapped.num_input_semantics = 1;
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}
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Fixture() {
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offsets.fill(AGC_ILLEGAL_DIRECT_OFFSET);
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offsets[static_cast<size_t>(AgcDirectResourceType::PtrVertexBufferTable)] =
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2;
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offsets[static_cast<size_t>(
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AgcDirectResourceType::PtrVertexAttribDescTable)] = 4;
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user_data.direct_resource_offset = offsets.data();
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user_data.direct_resource_count = static_cast<uint16_t>(offsets.size());
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mapped.user_data = &user_data;
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mapped.input_semantics = &semantic;
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mapped.num_input_semantics = 1;
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}
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};
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void CheckRejected(const ShaderMappedData& data, const char* text) {
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ShaderVertexMetadata output;
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output.vertex_buffer_reg = 37;
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output.vertex_attrib_reg = 41;
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output.input_semantics_count = 7;
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std::string error;
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Check(!ShaderReadVertexMetadata(data, 64, &output, &error), text);
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Check(!error.empty(), "metadata rejection omitted its diagnostic");
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Check(output.vertex_buffer_reg == 37 && output.vertex_attrib_reg == 41 &&
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output.input_semantics_count == 7,
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"metadata rejection changed the prior output");
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void CheckRejected(const ShaderMappedData &data, const char *text) {
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ShaderVertexMetadata output;
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output.vertex_buffer_reg = 37;
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output.vertex_attrib_reg = 41;
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output.input_semantics_count = 7;
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std::string error;
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Check(!ShaderReadVertexMetadata(data, 64, &output, &error), text);
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Check(!error.empty(), "metadata rejection omitted its diagnostic");
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Check(output.vertex_buffer_reg == 37 && output.vertex_attrib_reg == 41 &&
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output.input_semantics_count == 7,
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"metadata rejection changed the prior output");
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}
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void TestValidAndInvalidMetadata() {
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Fixture fixture;
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ShaderVertexMetadata output;
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std::string error;
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Check(ShaderReadVertexMetadata(fixture.mapped, 64, &output, &error),
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"valid AGC vertex metadata was rejected");
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Check(output.vertex_buffer_reg == 2 && output.vertex_attrib_reg == 4 &&
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output.input_semantics_count == 1,
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"valid AGC vertex metadata was decoded incorrectly");
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Fixture fixture;
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ShaderVertexMetadata output;
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std::string error;
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Check(ShaderReadVertexMetadata(fixture.mapped, 64, &output, &error),
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"valid AGC vertex metadata was rejected");
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Check(output.vertex_buffer_reg == 2 && output.vertex_attrib_reg == 4 &&
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output.input_semantics_count == 1,
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"valid AGC vertex metadata was decoded incorrectly");
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auto missing_header = fixture.mapped;
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missing_header.user_data = nullptr;
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CheckRejected(missing_header, "missing AGC user-data header was accepted");
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auto missing_header = fixture.mapped;
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missing_header.user_data = nullptr;
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CheckRejected(missing_header, "missing AGC user-data header was accepted");
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Fixture missing_offsets;
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missing_offsets.user_data.direct_resource_offset = nullptr;
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CheckRejected(missing_offsets.mapped, "missing direct-resource offsets were accepted");
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Fixture missing_offsets;
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missing_offsets.user_data.direct_resource_offset = nullptr;
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CheckRejected(missing_offsets.mapped,
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"missing direct-resource offsets were accepted");
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Fixture excessive_resources;
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excessive_resources.user_data.direct_resource_count =
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static_cast<uint16_t>(excessive_resources.offsets.size() + 1);
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CheckRejected(excessive_resources.mapped, "excessive direct-resource count was accepted");
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Fixture excessive_resources;
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excessive_resources.user_data.direct_resource_count =
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static_cast<uint16_t>(excessive_resources.offsets.size() + 1);
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CheckRejected(excessive_resources.mapped,
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"excessive direct-resource count was accepted");
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Fixture excessive_semantics;
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excessive_semantics.mapped.num_input_semantics = ShaderVertexInputInfo::RES_MAX + 1;
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CheckRejected(excessive_semantics.mapped, "excessive vertex semantic count was accepted");
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Fixture excessive_semantics;
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excessive_semantics.mapped.num_input_semantics =
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ShaderVertexInputInfo::RES_MAX + 1;
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CheckRejected(excessive_semantics.mapped,
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"excessive vertex semantic count was accepted");
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Fixture excessive_register;
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excessive_register.offsets[
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static_cast<size_t>(AgcDirectResourceType::PtrVertexBufferTable)] = 63;
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CheckRejected(excessive_register.mapped, "out-of-domain vertex table SGPR was accepted");
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Fixture excessive_register;
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excessive_register.offsets[static_cast<size_t>(
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AgcDirectResourceType::PtrVertexBufferTable)] = 63;
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CheckRejected(excessive_register.mapped,
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"out-of-domain vertex table SGPR was accepted");
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Fixture missing_semantics;
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missing_semantics.mapped.input_semantics = nullptr;
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CheckRejected(missing_semantics.mapped, "missing vertex semantic array was accepted");
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Fixture missing_semantics;
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missing_semantics.mapped.input_semantics = nullptr;
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CheckRejected(missing_semantics.mapped,
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"missing vertex semantic array was accepted");
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}
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void TestVertexDstSelectors() {
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const auto zero = DecodeVertexDstSelector(0);
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const auto one = DecodeVertexDstSelector(1);
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Check(zero.kind == VertexDstSelectKind::Zero &&
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one.kind == VertexDstSelectKind::One,
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"vertex constant selectors were decoded incorrectly");
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for (uint8_t selector = 4; selector <= 7; selector++) {
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const auto component = DecodeVertexDstSelector(selector);
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Check(component.kind == VertexDstSelectKind::Component &&
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component.source_component == selector - 4,
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"vertex component selector was decoded incorrectly");
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}
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Check(DecodeVertexDstSelector(2).kind == VertexDstSelectKind::Reserved &&
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DecodeVertexDstSelector(3).kind == VertexDstSelectKind::Reserved,
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"reserved vertex selectors were accepted");
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Check(GetDstSel(DstSel(6, 5, 4, 7), 0) == 6 &&
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GetDstSel(DstSel(6, 5, 4, 7), 1) == 5 &&
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GetDstSel(DstSel(6, 5, 4, 7), 2) == 4 &&
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GetDstSel(DstSel(6, 5, 4, 7), 3) == 7,
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"BGRA vertex selector packing was decoded incorrectly");
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Check(VertexRawComponentCount(DstSel(7, 0, 0, 0), 1) == 4,
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"W-to-X did not widen the raw vertex interface to four components");
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Check(VertexRawComponentCount(DstSel(4, 4, 4, 4), 4) == 4 &&
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VertexRawComponentCount(DstSel(4, 0, 0, 1), 4) == 4,
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"replication or constant selectors changed raw vertex width");
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}
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} // namespace
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int main() {
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TestValidAndInvalidMetadata();
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std::puts("ShaderVertexMetadataTests: all cases passed");
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return 0;
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TestValidAndInvalidMetadata();
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TestVertexDstSelectors();
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std::puts("ShaderVertexMetadataTests: all cases passed");
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return 0;
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}
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+20
-15
@@ -1473,9 +1473,11 @@ void TestNewShaderRecompilerMoreAluFamilies() {
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"new decoder did not decode old-backed V_CMP_NEQ_F32");
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Check(Common::ContainsStr(result.decoded_dump, "v_cmp_neq_f32 s0, 0.500000, v1"),
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"new decoder did not decode old-backed V_CMP_NEQ_F32 SDWA scalar destination");
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Check(Common::ContainsStr(result.decoded_dump, "v_cmpx_lt_u32 exec_lo, v5.sdwa(sel=4") &&
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Common::ContainsStr(result.ir_dump, "CompareMaskLtU32 exec_lo"),
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"new decoder did not route V_CMPX SDWA destination to exec");
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Check(Common::ContainsStr(result.decoded_dump, "v_cmpx_lt_u32 vcc_lo, v5.sdwa(sel=4") &&
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Common::ContainsStr(result.ir_dump, "CompareMaskLtU32 vcc_lo") &&
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Common::ContainsStr(result.ir_dump, "MoveU32 exec_lo, vcc_lo") &&
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Common::ContainsStr(result.ir_dump, "MoveU32 exec_hi, vcc_hi"),
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"new decoder did not preserve V_CMPX SDWA destination and mirror its mask to exec");
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Check(Common::ContainsStr(result.decoded_dump, "v_cmp_nlt_f32"),
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"new decoder did not decode old-backed V_CMP_NLT_F32");
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Check(Common::ContainsStr(result.decoded_dump, "v_cmpx_nge_f32"),
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@@ -1774,10 +1776,12 @@ void TestNewShaderRecompilerMoreAluFamilies() {
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"VOP3-encoded VOP1 find-first-bit-low did not lower through shared IR");
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Check(Common::ContainsStr(result.ir_dump, "CompareGtF32"),
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"VOPC float compare did not lower to IR");
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Check(Common::ContainsStr(result.ir_dump, "CompareMaskGtF32 exec_lo"),
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"VOPC float compare-and-mask did not lower to exec mask IR");
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Check(Common::ContainsStr(result.ir_dump, "CompareMaskGtU32 exec_lo"),
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"VOPC uint compare-and-mask did not lower to exec mask IR");
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Check(Common::ContainsStr(result.ir_dump, "CompareMaskGtF32 vcc_lo") &&
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Common::ContainsStr(result.ir_dump, "MoveU32 exec_lo, vcc_lo"),
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"VOPC float compare-and-mask did not lower to VCC plus EXEC IR");
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Check(Common::ContainsStr(result.ir_dump, "CompareMaskGtU32 vcc_lo") &&
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Common::ContainsStr(result.ir_dump, "MoveU32 exec_hi, vcc_hi"),
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"VOPC uint compare-and-mask did not lower to VCC plus EXEC IR");
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Check(Common::ContainsStr(result.ir_dump, "CompareFalse vcc_lo, v6, v6"),
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"VOPC false compare did not lower to shared IR");
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Check(Common::ContainsStr(result.ir_dump, "CompareTrue vcc_lo, v6, v6"),
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@@ -1800,17 +1804,17 @@ void TestNewShaderRecompilerMoreAluFamilies() {
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"VOPC SDWA unordered-not-equal compare did not lower to scalar-destination IR");
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Check(Common::ContainsStr(result.ir_dump, "CompareUnordGeF32 vcc_lo, v6, v6"),
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"VOPC unordered-greater-equal compare did not lower to shared IR");
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Check(Common::ContainsStr(result.ir_dump, "CompareMaskUnordLtF32 exec_lo, v6, v6"),
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Check(Common::ContainsStr(result.ir_dump, "CompareMaskUnordLtF32 vcc_lo, v6, v6"),
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"VOPC unordered-less compare-and-mask did not lower to shared IR");
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Check(Common::ContainsStr(result.ir_dump, "CompareMaskUnordEqF32 exec_lo, v6, v6"),
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Check(Common::ContainsStr(result.ir_dump, "CompareMaskUnordEqF32 vcc_lo, v6, v6"),
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"VOPC unordered-equal compare-and-mask did not lower to shared IR");
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Check(Common::ContainsStr(result.ir_dump, "CompareMaskUnordLeF32 exec_lo, v6, v6"),
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Check(Common::ContainsStr(result.ir_dump, "CompareMaskUnordLeF32 vcc_lo, v6, v6"),
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"VOPC unordered-less-equal compare-and-mask did not lower to shared IR");
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Check(Common::ContainsStr(result.ir_dump, "CompareMaskUnordGtF32 exec_lo, v6, v6"),
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Check(Common::ContainsStr(result.ir_dump, "CompareMaskUnordGtF32 vcc_lo, v6, v6"),
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"VOPC unordered-greater compare-and-mask did not lower to shared IR");
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Check(Common::ContainsStr(result.ir_dump, "CompareMaskUnordNeF32 exec_lo, v6, v6"),
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Check(Common::ContainsStr(result.ir_dump, "CompareMaskUnordNeF32 vcc_lo, v6, v6"),
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"VOPC unordered-not-equal compare-and-mask did not lower to shared IR");
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Check(Common::ContainsStr(result.ir_dump, "CompareMaskUnordGeF32 exec_lo, v6, v6"),
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Check(Common::ContainsStr(result.ir_dump, "CompareMaskUnordGeF32 vcc_lo, v6, v6"),
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"VOPC unordered-greater-equal compare-and-mask did not lower to shared IR");
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Check(Common::ContainsStr(result.ir_dump, "CompareFalse vcc_lo, v5, v5"),
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"VOPC integer false compare did not lower to shared IR");
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@@ -2687,8 +2691,9 @@ void TestNewShaderRecompilerSignedCompareAlu() {
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"signed halfword greater-or-equal compare did not lower to IR");
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Check(Common::ContainsStr(result.ir_dump, "CompareLtU16"),
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"unsigned halfword less-than compare did not lower to IR");
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Check(Common::ContainsStr(result.ir_dump, "CompareMaskGtI32 exec_lo"),
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"signed compare-and-mask did not lower to exec mask IR");
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Check(Common::ContainsStr(result.ir_dump, "CompareMaskGtI32 vcc_lo") &&
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Common::ContainsStr(result.ir_dump, "MoveU32 exec_lo, vcc_lo"),
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"signed compare-and-mask did not lower to VCC plus EXEC IR");
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Check(SpirvContainsOpcode(result.spirv, 173), "SPIR-V binary does not contain OpSGreaterThan");
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Check(SpirvContainsOpcode(result.spirv, 177), "SPIR-V binary does not contain OpSLessThan");
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Check(SpirvContainsOpcode(result.spirv, 202),
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