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https://github.com/KytyPS5/KytyPS5.git
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shader: preserve wave-wide vector-store completion before publication
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@@ -86,7 +86,7 @@ constexpr OpcodeMap SOPK_OPCODE_LIST[] = {
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{0x08u, Opcode::S_CMP_LE_I32}, {0x09u, Opcode::S_CMP_EQ_U32}, {0x0au, Opcode::S_CMP_LG_U32},
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{0x0bu, Opcode::S_CMP_GT_U32}, {0x0cu, Opcode::S_CMP_GE_U32}, {0x0du, Opcode::S_CMP_LT_U32},
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{0x0eu, Opcode::S_CMP_LE_U32}, {0x0fu, Opcode::S_ADD_I32}, {0x10u, Opcode::S_MULK_I32},
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{0x13u, Opcode::S_SETREG_B32}, {0x17u, Opcode::S_WAITCNT}, {0x18u, Opcode::S_WAITCNT},
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{0x13u, Opcode::S_SETREG_B32}, {0x17u, Opcode::S_WAITCNT_VSCNT}, {0x18u, Opcode::S_WAITCNT},
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{0x19u, Opcode::S_WAITCNT}, {0x1au, Opcode::S_WAITCNT},
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{0x1bu, Opcode::S_SUBVECTOR_LOOP_BEGIN}, {0x1cu, Opcode::S_SUBVECTOR_LOOP_END},
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};
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@@ -234,6 +234,14 @@ void DecodeSopk(uint32_t pc, std::span<const uint32_t> code, uint32_t word_index
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inst.src_count = 1;
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return;
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}
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case Opcode::S_WAITCNT_VSCNT:
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inst.dst.kind = OperandKind::Null;
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inst.src1 = inst.src0;
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inst.src1.value = word & 0xffffu;
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inst.src1.signed_val = static_cast<int32_t>(inst.src1.value);
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DecodeScalarSource(sdst, pc, inst.src0);
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inst.src_count = 2;
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return;
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case Opcode::S_SETREG_B32:
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inst.dst.kind = OperandKind::Null;
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inst.src1.kind = OperandKind::LiteralConstant;
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@@ -535,6 +535,11 @@ std::string InstructionToString(const Instruction& inst) {
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return WithUnsupportedReason(inst, fmt::format("0x{:08x}: s_setreg_b32 {}, {}", inst.pc,
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OperandToString(inst.src0).c_str(),
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OperandToString(inst.src1).c_str()));
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case Opcode::S_WAITCNT_VSCNT:
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return WithUnsupportedReason(inst, fmt::format("0x{:08x}: {} {}, {}", inst.pc,
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magic_enum::enum_name(inst.opcode),
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OperandToString(inst.src0),
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OperandToString(inst.src1)));
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case Opcode::S_NOP:
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case Opcode::S_WAITCNT:
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case Opcode::S_WAITCNT_DEPCTR:
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@@ -625,6 +625,7 @@ enum class Opcode {
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S_NOP,
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S_WAITCNT,
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S_WAITCNT_VSCNT,
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S_WAITCNT_DEPCTR,
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S_BARRIER,
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S_BRANCH,
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@@ -181,8 +181,12 @@ void Translator::EmitControlNop() {
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ir.Emit(IR::ValueOpcode::ControlNop);
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}
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void Translator::EmitWaitcnt() {
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ir.Emit(IR::ValueOpcode::Waitcnt);
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void Translator::S_WAITCNT_VSCNT(const Decoder::Instruction& inst) {
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const auto count = inst.src1.value & 63u;
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if (inst.src0.kind != Decoder::OperandKind::Null || (count != 0u && count != 63u)) {
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EXIT("unsupported partial or register-based S_WAITCNT_VSCNT at 0x%08x", inst.pc);
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}
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if (count == 0u) ir.Emit(IR::ValueOpcode::StoreCompletion);
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}
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void Translator::S_BARRIER() {
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@@ -18,7 +18,8 @@ void Translator::EmitScalar(const Decoder::Instruction& inst) {
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case O::S_CSELECT_B64: ScalarSelect64(inst, inst.src1); return;
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case O::S_CMOV_B64: ScalarSelect64(inst, inst.dst); return;
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case O::S_SETREG_B32: EmitControlNop(); return;
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case O::S_WAITCNT: EmitWaitcnt(); return;
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case O::S_WAITCNT_VSCNT: S_WAITCNT_VSCNT(inst); return;
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case O::S_WAITCNT: return;
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case O::S_AND_SAVEEXEC_B32:
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S_SAVEEXEC(inst, IR::ValueOpcode::LogicalAnd, false, false, false);
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@@ -224,7 +225,7 @@ void Translator::EmitScalar(const Decoder::Instruction& inst) {
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case O::S_SLEEP:
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case O::S_SETPRIO:
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case O::S_TRAP: EmitControlNop(); return;
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case O::S_WAITCNT_DEPCTR: EmitWaitcnt(); return;
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case O::S_WAITCNT_DEPCTR: return;
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case O::S_BARRIER: S_BARRIER(); return;
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case O::S_SENDMSG: S_SENDMSG(inst); return;
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case O::S_TTRACEDATA: S_TTRACEDATA(); return;
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@@ -229,7 +229,7 @@ private:
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void ScalarMinMax32(const Decoder::Instruction& inst, IR::ValueOpcode value_opcode,
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IR::ValueOpcode compare_opcode);
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void EmitControlNop();
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void EmitWaitcnt();
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void S_WAITCNT_VSCNT(const Decoder::Instruction& inst);
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void S_BARRIER();
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void S_SENDMSG(const Decoder::Instruction& inst);
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void S_TTRACEDATA();
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