nmzik
|
f7226ca7dc
|
graphics: emit PS5 register object and primitive IDs to RT7
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
d172ab75ca
|
shader: reuse selector domains proven by prior resource accesses
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
bcf13e101e
|
shader: validate texture mip ranges and channel selectors
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
2caf2f7e4e
|
shader: retain runtime count bounds for finite descriptor choices
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
df92a08990
|
shader: report descriptor materialization rejection context
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
e291589177
|
shader: resolve GPU-selected parent pointers and bounded child image tables
Co-authored-by: fxpw <fxpw@outlook.com>
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
2285a25182
|
shader: prove narrowing loop masks through shared implication analysis
Co-authored-by: fxpw <fxpw@outlook.com>
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
a50e4de389
|
shader: recognize reversed unsigned greater-than resource bounds
Co-authored-by: fxpw <fxpw@outlook.com>
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
959bee4799
|
graphics: checkpoint live Vulkan pipeline cache after new compilations
Co-authored-by: fxpw <fxpw@outlook.com>
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
232e2f2593
|
shader: bound waterfall buffer descriptors with same-lane guards
Co-authored-by: fxpw <fxpw@outlook.com>
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
b4406b0467
|
graphics: render packed 11-11-10 UNorm targets with exact rounding
Co-authored-by: fxpw <fxpw@outlook.com>
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
fb213e8ae5
|
shader: share packed color component encoding
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
87d938139d
|
graphics: log complete per-target state before format resolution
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
2a4ccaa5d5
|
shader: share proven selector domains for paired images and samplers
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
9c04abacc5
|
shader: resolve shared selector keys once per materialization
Co-authored-by: fxpw <fxpw@outlook.com>
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
5916a184cc
|
shader: preserve affine image heap candidate domains
Co-authored-by: fxpw <fxpw@outlook.com>
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
fcab4e5d0d
|
shader: trace unsupported sampled image candidate provenance
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
fe23334ff0
|
shader: remove unreachable candidate diagnostic branches
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
81169d77ea
|
shader: materialize compact image and paired sampler tables
Co-authored-by: fxpw <fxpw@outlook.com>
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
7d24972b8f
|
shader: report rejected indirect buffer candidate context
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
1d3fd07fe6
|
shader: share indirect buffer format geometry lookup
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
28766a915b
|
audio: decode PS5 ATRAC9 discrete multichannel streams
Co-authored-by: fxpw <fxpw@outlook.com>
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
279bc95941
|
graphics: track HTile clears across PS5 depth array slices
Co-authored-by: fxpw <fxpw@outlook.com>
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
12c522bba5
|
graphics: log cached GPU completion beside dispatch submission ticks
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
65a6f30f51
|
shader: compare real nested descriptor pointer instructions
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
bb2d6dbeb3
|
shader: share scalar condition results with direct subgroup votes
Co-authored-by: fxpw <fxpw@outlook.com>
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
50844badbf
|
shader: map debug SPIR-V blocks to native RDNA2 PCs
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
c1f6838e40
|
shader: share repeated raw indirect buffer load bodies
|
2026-10-15 22:28:01 +02:00 |
|
nmzik
|
6455546f26
|
shader: admit bounded multi-component formatted buffer loads
Co-authored-by: fxpw <fxpw@outlook.com>
|
2026-10-15 22:28:00 +02:00 |
|
nmzik
|
dcc642551f
|
graphics: classify signed byte textures for native sampling
|
2026-10-15 22:28:00 +02:00 |
|
nmzik
|
dd429ef858
|
shader: decode high-half formatted buffer stores
Co-authored-by: fxpw <fxpw@outlook.com>
|
2026-10-15 22:28:00 +02:00 |
|
nmzik
|
bc2664cefa
|
shader: decode comparison gathers with explicit LOD
Co-authored-by: fxpw <fxpw@outlook.com>
|
2026-10-15 22:28:00 +02:00 |
|
nmzik
|
8b81f665a2
|
shader: separate indirect buffer candidates from tracked root limits
Co-authored-by: fxpw <fxpw@outlook.com>
|
2026-10-14 21:19:38 +02:00 |
|
nmzik
|
1039c54f5d
|
shader: share indirect buffer array access after an empty root
Co-authored-by: fxpw <fxpw@outlook.com>
|
2026-10-14 21:17:44 +02:00 |
|
nmzik
|
b24ce3440d
|
shader: track buffer liveness and offsets by resource count
Co-authored-by: fxpw <fxpw@outlook.com>
|
2026-10-14 21:11:14 +02:00 |
|
nmzik
|
2f6ee0e91d
|
shader: support RDNA2 high-half short buffer stores
Co-authored-by: fxpw <fxpw@outlook.com>
|
2026-10-14 20:55:50 +02:00 |
|
nmzik
|
6b1c4a7a71
|
test: model bounded scalar selector batches in native CFG coverage
|
2026-10-14 20:55:39 +02:00 |
|
nmzik
|
166b9a5eea
|
test: dispatch null texture coverage with the intended wave size
|
2026-10-14 20:47:25 +02:00 |
|
nmzik
|
5313181ecf
|
shader: bound workgroup selector prefixes from runtime starting indices
|
2026-10-14 20:39:25 +02:00 |
|
nmzik
|
ceccd746d8
|
shader: resolve workgroup-selected descriptor prefixes from dispatch arguments
Co-authored-by: fxpw <fxpw@outlook.com>
|
2026-10-14 20:29:48 +02:00 |
|
nmzik
|
82470c7181
|
shader: share workgroup and selector count resolution
|
2026-10-14 19:45:31 +02:00 |
|
nmzik
|
4843d8d942
|
shader: support packed D16 XYZW formatted buffer stores
Co-authored-by: fxpw <fxpw@outlook.com>
|
2026-10-14 19:35:08 +02:00 |
|
nmzik
|
c914435f20
|
shader: plan finite GPU-selected RGBA16 buffer stores
|
2026-10-14 19:13:16 +02:00 |
|
nmzik
|
7468e4f60a
|
shader: share descriptor dispatch for scalar and wide buffer stores
|
2026-10-14 19:01:14 +02:00 |
|
nmzik
|
b6da068313
|
shader: preserve typed candidates for unfiltered indirect image access
Co-authored-by: fxpw <fxpw@outlook.com>
|
2026-10-14 18:57:26 +02:00 |
|
nmzik
|
127cf8d46f
|
shader: route image stores through shared indirect descriptor access
Co-authored-by: fxpw <fxpw@outlook.com>
|
2026-10-14 18:39:40 +02:00 |
|
nmzik
|
e0586cc85a
|
shader: decode unsigned byte loads into preserved low halves
Co-authored-by: fxpw <fxpw@outlook.com>
|
2026-10-14 18:21:58 +02:00 |
|
nmzik
|
302240da70
|
shader: lower complete wave minima for sparse fragment subgroups
|
2026-10-14 18:03:48 +02:00 |
|
nmzik
|
892e70c8a1
|
graphics: bind unbound textures as native null descriptors
|
2026-10-14 17:56:47 +02:00 |
|
nmzik
|
7c9da0e56f
|
shader: share finite texture selection through masked first-lane reads
Co-authored-by: fxpw <fxpw@outlook.com>
|
2026-10-14 17:29:49 +02:00 |
|